ATSAMA5D28C-LD2G-CUR - SAMA5D2 SIP MPU 500MHz 2Gb LPDDR2
MPN: ATSAMA5D28C-LD2G-CUR ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $22.5 | $22.50 |
| 10 | $21.05 | $210.50 |
| 100 | $18.8 | $1,880.00 |
| 500 | $16.95 | $8,475.00 |
| 1,000 | $15.4 | $15,400.00 |
ATSAMA5D28C-LD2G-CUR Overview
The SAMA5D2 series belongs to the Arm Cortex-A5 based application processor family, designed as a low-power alternative to Cortex-A7/A9 MPUs while retaining the full Armv7-A instruction set. It targets the segment between microcontrollers and high-end Cortex-A53 application processors. The device runs Linux (mainline mainline kernel support), RTOS, or bare-metal code, and integrates a security subsystem (Secure boot, secure storage) suitable for IoT edge devices and industrial gateways. The 289-LFBGA 14x14 mm package provides a compact footprint while delivering high memory bandwidth through the integrated 16-bit LPDDR2 interface.
Key features that distinguish this part include the integrated 2 Gbit LPDDR2 memory (vs 1 Gbit DDR2 in the LD1G variants), the Cortex-A5 core with NEON and FPU, and the full security IP block. The SIP design eliminates the DDR PCB routing complexity that typically requires 4-layer boards with controlled impedance, allowing two-layer designs in many cases.
Typical applications include industrial HMI panels, IoT edge gateways, smart appliances with touch UI, point-of-sale terminals, building automation controllers, and low-power Linux-based sensor hubs. When designing with the ATSAMA5D28C-LD2G-CUR, ensure the PCB uses a 4-layer stack-up with proper ground pour under the BGA for thermal dissipation, since the integrated DDR memory concentrates heat in a small area.
Drop-in alternatives for ATSAMA5D28C-LD2G-CUR — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with ATSAMA5D28C-LD2G-CUR (same form factor and footprint) — differing in Package, Ethernet, USB, Operating Temperature, RoHS Status.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
ATSAMA5D28C-LD1G-CUR
✅ Drop-In✓ In Stock
$19.4 / Unit
View Datasheet →ATSAMA5D28C-LD2G-CU
✅ Drop-In📋 Reference alternative (not in catalog)
ATSAMA5D28B-CUR
✅ Drop-In✓ In Stock
$12.6 / Unit
View Datasheet →ATSAMA5D28B-CNR
✅ Drop-In✓ In Stock
$17.9 / Unit
View Datasheet →ATSAMA5D28A-CUR
✅ Drop-In✓ In Stock
$10.8 / Unit
View Datasheet →ATSAMA5D27C-D1G-CU
✅ Drop-In✓ In Stock
$19.1 / Unit
View Datasheet →ATSAMA5D28C-LD2G-CUR Maximum Ratings & Electrical Characteristics
| Core Architecture | Arm Cortex-A5 with NEON and FPU |
| Maximum CPU Frequency | 500 MHz |
| Core Count | 1 |
| Data Bus Width | 32-bit |
| Package | 289-LFBGA 14x14 mm |
| Integrated Memory | 2 Gbit LPDDR2 SDRAM |
| Cache (I-cache / D-cache) | 32 KB / 32 KB |
| Internal SRAM | 128 KB |
| Operating Temperature | -40 C to +85 C (industrial) |
| Supply Voltage - Core | 1.1 V to 1.32 V |
| Supply Voltage - I/O | 1.65 V to 3.6 V |
| Connectivity | 2x Gigabit Ethernet with TSN, USB 2.0 HS PHY, CAN-FD |
| Display Interfaces | LCD controller, MIPI DSI, RGB |
| Cryptography | AES, SHA, TRNG, secure boot |
| Mounting Type | Surface Mount (BGA) |
| RoHS Status | Compliant |
ATSAMA5D28C-LD2G-CUR 289-lfbga 14x14 mm Pin Configuration Guide
Pin configuration for ATSAMA5D28C-LD2G-CUR (289-lfbga 14x14 mm package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for ATSAMA5D28C-LD2G-CUR.
Refer to the datasheet for full pin configuration.
Typical Applications
ATSAMA5D28C-LD2G-CUR is suitable for 6 applications: Industrial HMI Touch Panels, IoT Edge Gateways, Smart Appliance Controllers, Point-of-Sale Terminals, Building Automation Controllers, Medical Device HMI Controllers.
Industrial HMI Touch Panels
The ATSAMA5D28C-LD2G-CUR's 500 MHz Cortex-A5 with NEON and 2 Gbit integrated LPDDR2 makes it ideal for industrial human-machine interface touch panels running Linux with Qt or Web-based UIs. The integrated LCD controller and MIPI DSI interface directly drive 4.3" to 7" capacitive touch displays without external bridge ICs. The SIP form factor with embedded DDR reduces PCB complexity to a 4-layer board, accelerating time-to-market for factory automation panels. Operating from -40 C to +85 C, the device handles factory floor temperatures reliably.
Recommended
IoT Edge Gateways
The ATSAMA5D28C-LD2G-CUR serves as the main processor in IoT edge gateways aggregating sensor data via dual Gigabit Ethernet with TSN support. The hardware cryptography engine (AES-256, SHA-256, TRNG) secures MQTT/TLS traffic to cloud backends, while 2 Gbit LPDDR2 buffers high-rate data streams. The CAN-FD interface connects to industrial sensor buses (CANopen, J1939) for predictive-maintenance applications. Linux mainline support ensures long-term security patches.
Recommended
Smart Appliance Controllers
The ATSAMA5D28C-LD2G-CUR powers next-generation smart appliances with voice control and rich touch interfaces, leveraging the Cortex-A5 NEON engine for local speech recognition preprocessing. The integrated 2 Gbit LPDDR2 supports larger neural network models for on-prem AI inference without cloud dependence. USB 2.0 with integrated HS PHY directly connects camera modules for visual food-recognition in smart ovens. The SIP reduces BOM cost versus discrete-DDR designs, critical for consumer price points.
Recommended
Point-of-Sale Terminals
The ATSAMA5D28C-LD2G-CUR provides the processing backbone for modern POS terminals running Linux-based payment applications. The secure-boot and hardware AES accelerators satisfy PCI-PTS certification requirements for payment card data. Dual Ethernet ports separate payment network traffic from back-office connectivity, with TSN guaranteeing QoS for transaction flows. The integrated DDR2 SDRAM (2 Gbit) handles encrypted EMV chip-card processing and contactless NFC payment stacks without external memory.
Recommended
Building Automation Controllers
The ATSAMA5D28C-LD2G-CUR is well-suited for BACnet/Modbus building automation controllers managing HVAC, lighting, and access control subsystems. The CAN-FD interface aggregates field-bus sensors while dual Ethernet with TSN ensures deterministic communication for lighting control (DALI-2 gateway) and video intercom streams. The integrated LCD controller drives the local operator panel without an external graphics chip. Industrial -40 C to +85 C operation handles unheated equipment rooms.
Recommended
Medical Device HMI Controllers
The ATSAMA5D28C-LD2G-CUR supports IEC 62304-compliant medical device HMI controllers such as infusion pumps and patient monitors, where the Cortex-A5 provides the deterministic response times required for safety-critical UI updates. The hardware cryptography and secure boot enable FDA cybersecurity premarket submission requirements. The integrated 2 Gbit LPDDR2 supports high-resolution waveform displays and patient data logging without external DRAM complexity. Wide temperature range supports clinical environment variations.
Recommended
Recommended Products Summary
Engineering reference data for ATSAMA5D28C-LD2G-CUR — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | ATSAMA5D28C-LD1G-CUR | ATSAMA5D28C-LD2G-CU | ATSAMA5D28B-CUR | ATSAMA5D27C-D1G-CU |
|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 289-LFBGA 14x14 mm | 289-LFBGA 14x14 mm - same | 289-LFBGA 14x14 mm - same | 289-LFBGA 14x14 mm - same | 289-LFBGA 14x14 mm - same |
| Integrated Memory | 2 Gbit LPDDR2 | 1 Gbit LPDDR2 | 2 Gbit LPDDR2 | External DDR required | 1 Gbit DDR2 |
| CPU Core | Cortex-A5 500 MHz | Cortex-A5 500 MHz | Cortex-A5 500 MHz | Cortex-A5 500 MHz | Cortex-A5 500 MHz |
| Ethernet | 2x GbE with TSN | 2x GbE with TSN | 2x GbE with TSN | 2x GbE with TSN | 1x GbE (no TSN) |
| USB 2.0 HS PHY | Integrated | Integrated | Integrated | Integrated | External PHY required |
| Display Interfaces | LCD + MIPI DSI + RGB | LCD + MIPI DSI + RGB | LCD + MIPI DSI + RGB | LCD + RGB (no DSI) | LCD only |
| Packaging Form | Tape & Reel | Tape & Reel | Tray | Tape & Reel | Tray |
Key Differentiators
- Integrated 2 Gbit LPDDR2 in SIP eliminates DDR PCB complexity (vs ATSAMA5D27C-D1G-CU)
- Dual Gigabit Ethernet with TSN versus single Ethernet on older variants (vs ATSAMA5D28B-CUR)
- C silicon revision adds MIPI DSI and security features (vs ATSAMA5D28A-CUR)
Design Notes
Estimated: The 289-LFBGA SIP concentrates both the SoC die and the DDR memory die in a 14x14 mm footprint, with a typical theta_JA of approximately 25-30 C/W. At full load (Cortex-A5 @ 500 MHz with both Ethernet PHYs active and USB traffic), dissipation may approach 1.5-2 W, yielding a 50 C junction rise. Use a 4-layer PCB with a continuous ground plane directly under the BGA, and avoid cutting the ground plane for routing. For enclosed industrial enclosures with no airflow, derate ambient temperature by 10 C.
The integrated LPDDR2 interface eliminates the most challenging PCB layout task (matched-impedance DDR routing), but the remaining decoupling scheme is still critical. Place 100 nF X7R ceramic capacitors at every VDDCORE and VDDIO ball pair, with bulk 4.7 uF tantalum or polymer capacitors near the supply pins. Use Microchip's reference PCB design from the SAMA5D2-XULT evaluation board as a starting point - deviation from the reference stackup may cause signal integrity issues on the LPDDR2 interface.
Do not assume the LD2G and LD1G variants are interchangeable without re-validating memory-intensive workloads - the LD2G provides 2 Gbit versus 1 Gbit, which can mask memory leaks during development that only manifest on lower-density parts. Also, the 'C' silicon revision adds TSN Ethernet features not available on 'A' or 'B' revisions - if your software stack checks revision ID at boot, ensure it accepts the 'C' family. Secure boot requires signed images burned into QSPI flash before the first power-on.
Compliance Information
RoHS compliant per Microchip product page. Industrial temperature grade -40 C to +85 C. Not AEC-Q100 qualified - this MPU targets industrial/consumer HMI rather than automotive. Lead-free BGA balls standard.
