CGD65C025SP2 - 650V 25mΩ GaN HEMT 60A | Cambridge GaN Devices
MPN: CGD65C025SP2 ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $6.5 | $6.50 |
| 10 | $5.85 | $58.50 |
| 100 | $5.2 | $520.00 |
| 500 | $4.65 | $2,325.00 |
| 1,000 | $4.1 | $4,100.00 |
CGD65C025SP2 Overview
A GaN HEMT (Gallium Nitride High Electron Mobility Transistor) is a wide-bandgap power transistor that uses a two-dimensional electron gas channel formed at an AlGaN/GaN heterojunction to deliver far higher switching speeds and lower specific on-resistance than equivalently rated silicon MOSFETs. Within the broader power semiconductor hierarchy, the GaN HEMT sits alongside Si MOSFETs, SiC MOSFETs, and IGBTs as the high-frequency, high-efficiency option for sub-kilowatt to several-kilowatt switched-mode power supplies, motor drives, and photovoltaic inverters.
Key features highlighted in the Cambridge GaN Devices preliminary datasheet include 650 V drain-source breakdown, a typical R_DS(on) of 25 mΩ, 60 A continuous drain current capability, a wettable-flank BHDFN-9-1 surface-mount package for optical-inspection-friendly assembly, and fast turn-on characteristics that enable high-frequency operation and easy paralleling of multiple devices for higher current. The normally-off ICeGaN gate removes the negative-bias supply typically required by cascode or depletion-mode GaN implementations, simplifying gate-driver design.
Typical applications span telecom and server AC-DC and DC-DC converters, USB-PD and high-density laptop adapters, on-board chargers for electric vehicles, photovoltaic micro-inverters and string inverters, motor-drive front-end PFC stages, and Class-D audio amplifiers. The combination of 650 V rating and 25 mΩ R_DS(on) also makes this part attractive for 400 V bus architectures in EV traction inverters and energy-storage systems.
When designing with the CGD65C025SP2, prioritize keeping the power loop inductance below the datasheet-recommended budget by minimizing the source-return copper area between the device and the DC-link capacitance, and follow the manufacturer's recommended gate-drive voltage window for ICeGaN to avoid overdrive. This preliminary datasheet page synthesizes distributor availability data, drop-in alternatives, and PCB design considerations drawn together for engineers evaluating GaN for high-density power conversion.
Drop-in alternatives for CGD65C025SP2 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with CGD65C025SP2 (same form factor and footprint) — differing in Gate Technology, Manufacturer, Operating Mode, Package.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
CGD65A055S2
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$2.85 / Unit
View Datasheet →CGD65C025SP1
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
CGD65C025SP2 Maximum Ratings & Electrical Characteristics
| Manufacturer | Cambridge GaN Devices (CGD) |
| Part Number | CGD65C025SP2 |
| Transistor Type | N-Channel GaN HEMT (enhancement-mode, normally-off) |
| Gate Technology | ICeGaN® (no negative gate supply required) |
| Drain-Source Voltage (V_DS max) | 650 V |
| Continuous Drain Current (I_D) | 60 A |
| On-Resistance (R_DS(on)) | 25 mΩ (typical) |
| Package | BHDFN-9-1 (surface-mount, wettable flank) |
| Mounting Type | Surface Mount |
| Configuration | Single N-Channel |
| Operating Mode | Enhancement mode (normally-off) |
| Material | GaN-on-Si (Gallium Nitride on Silicon) |
| Switching Frequency Suitability | High frequency (fast turn-on, easy paralleling) |
| Datasheet Status | Preliminary (May 2024) |
| AEC-Q100 Qualification | unknown |
CGD65C025SP2 Pin Configuration
| Pin 1 | Source — Power source terminal of the GaN HEMT (high-current return) |
| Pin 2 | Gate — ICeGaN gate input (no negative drive required) |
| Pin 3 | Source — Source pad (Kelvin pin, connect to gate-driver return) |
| Pin 4 | Drain — Power drain terminal (high-voltage switching node) |
| Pin 5 | Source — Source bonding pad |
| Pin 6 | Source — Source bonding pad |
| Pin 7 | Source — Source bonding pad |
| Pin 8 | Source — Source bonding pad |
| Pin 9 | Source — Source bonding pad |
Safe Operating Area (estimated from 650 V / 60 A ratings)
Typical Applications
CGD65C025SP2 is suitable for 6 applications: Totem-Pole Bridgeless PFC for Server & Telecom Power Supplies, High-Density USB-PD and Laptop Adapters (65-240 W), On-Board Charger and EV Auxiliary DC-DC Converters, Photovoltaic Micro-Inverters and String Inverters, Industrial Motor-Drive PFC and Front-End Rectifiers, Class-D Audio Amplifier Output Stage.
Totem-Pole Bridgeless PFC for Server & Telecom Power Supplies
The CGD65C025SP2's 650 V breakdown voltage and 25 mΩ R_DS(on) make it well-suited to continuous-conduction-mode totem-pole PFC front ends used in 1-3 kW server and telecom rectifiers. Placed in the slow leg / fast leg of the bridgeless bridge, its near-zero reverse-recovery charge (Q_RR) eliminates the diode-bridge conduction losses and removes the need for an antiparallel silicon diode that would otherwise limit high-frequency operation above ~50 kHz. The ICeGaN normally-off gate means a single 12 V supply rail from an isolated gate driver is sufficient, removing the negative-bias supply that depletion-mode or cascode GaN typically require. Designers should pair the part with a UCC25640x or similar CCM totem-pole controller and keep the high-side/low-side power loop inductance below 5 nH by using a vertically stacked DC-link film/ceramic combo.
Recommended
High-Density USB-PD and Laptop Adapters (65-240 W)
Compact USB-PD adapters in the 65-240 W range benefit directly from the high switching frequency enabled by GaN. The CGD65C025SP2's 25 mΩ R_DS(on) and 650 V rating allow flyback, active-clamp flyback, or AHB topologies to run at 200-400 kHz versus the 65-100 kHz typical of silicon MOSFET designs, shrinking the transformer, output filter, and heatsink. The normally-off ICeGaN gate simplifies the primary-side start-up and bias architecture so that an auxiliary winding can be eliminated. Designers should leverage the BHDFN-9-1 wettable flank for high-reliability assembly of the primary-side power stage and verify creepage/clearance between the drain pad and adjacent low-voltage return tracks.
Recommended
On-Board Charger and EV Auxiliary DC-DC Converters
The 650 V drain-source breakdown of the CGD65C025SP2 provides ample margin above the 400 V EV bus, comfortably handling DC-link ringing during fast turn-on transitions. Its 25 mΩ on-resistance keeps conduction loss within budget at the 30-100 A load levels typical of 6.6-22 kW on-board chargers and auxiliary DC-DC converters. The BHDFN-9-1 surface-mount form factor supports the top-cooled or double-sided cooling layouts favored in OBC designs where the power module sits above an aluminum cold plate. Designers should validate AEC-Q100 grade availability and derate thermal performance to the 105 °C coolant temperature loop commonly used in EV thermal systems.
Recommended
Photovoltaic Micro-Inverters and String Inverters
In photovoltaic micro-inverters and 5-15 kW string inverters, the CGD65C025SP2 fits the boost PFC stage or the high-frequency primary side of the isolated DC-DC converter. Its 650 V rating supports the 600 V peak rectified 230 VAC line without additional clamping, while the 25 mΩ R_DS(on) keeps peak efficiency above 98 percent in 3-10 kW residential PV inverters. The normally-off ICeGaN gate and easy paralleling make module-level inverter stacks straightforward, allowing two devices to share a switching node without the gate-driver complexity of cascode GaN. Adequate DC-link capacitance placement and multilayer PCB stack-up are essential to keep the 1-2 nH power-loop inductance that high-frequency GaN switching demands.
Recommended
Industrial Motor-Drive PFC and Front-End Rectifiers
Industrial servo drives and variable-frequency motor drives commonly place a PFC stage ahead of the DC bus to comply with harmonic standards (EN 61000-3-2). The CGD65C025SP2's combination of 650 V breakdown, 25 mΩ R_DS(on), and high switching speed allows the PFC stage to operate above 100 kHz with maintained efficiency, shrinking the boost inductor and EMI filter. The normally-off ICeGaN gate means existing 15 V gate-drive signals from industrial motor-drive controllers can be used without negative-bias rails, easing migration from silicon IGBT front-ends. Designers should keep high dv/dt nodes away from analog feedback traces and use 4-layer FR4 with an uninterrupted return plane under the power stage.
Recommended
Class-D Audio Amplifier Output Stage
For high-power Class-D audio amplifiers above 500 W, the CGD65C025SP2 can replace the silicon MOSFET pair in the half-bridge output stage, switching above 1 MHz to push switching noise out of the audio band and reduce the output LC filter volume. The 650 V rating supports high-rail ±200 V BTL designs, and the 25 mΩ R_DS(on) keeps the 0.1% THD thermal envelope manageable in 1 kW monoblock subwoofer and PA amplifiers. Easy paralleling lets two devices share each half-bridge leg for 2-3 kW PA applications. Care should be taken to demagnetize the LC filter using Zobel networks and to provide ground isolation between the power stage and the audio-input ground reference to prevent audio-frequency hum loops.
Recommended
Recommended Products Summary
Engineering reference data for CGD65C025SP2 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | CGD65A055S2 | CGD65C025SP1 |
|---|---|---|---|
| Brand | Cambridge GaN Devices (CGD) | Cambridge GaN Devices (CGD) | Cambridge GaN Devices (CGD) |
| Package | BHDFN-9-1 (wettable flank, surface mount) | BHDFN-9-1 (wettable flank, surface mount) | BHDFN-9-1 (wettable flank, surface mount) |
| Drain-Source Voltage (V_DS) | 650 V | 650 V | 650 V |
| R_DS(on) (typical) | 25 mΩ | 55 mΩ | 25 mΩ |
| Gate Technology | ICeGaN enhancement-mode (normally-off) | ICeGaN enhancement-mode (normally-off, with current sense) | ICeGaN enhancement-mode (normally-off) |
| Negative Gate Bias Required | No | No | No |
| Integrated Current Sense | No | Yes | No |
| Mounting Type | Surface Mount | Surface Mount | Surface Mount |
Key Differentiators
- ICeGaN enhancement-mode gate eliminates negative-bias supply (vs Generic cascode GaN HEMT)
- Lowest R_DS(on) in CGD's 650 V BHDFN-9-1 family (vs CGD65A055S2)
- Wettable-flank BHDFN-9-1 package for AOI-friendly assembly (vs DFN-8 GaN HEMT without wettable flank)
Design Notes
The high dv/dt of the CGD65C025SP2 (edge rates down to a few nanoseconds) means the power loop inductance budget must be kept below 5 nH. Place the DC-link ceramic capacitor bank physically adjacent to the drain and source pads in the same vertical stack-up so the high-frequency loop area shrinks to the capacitor's own ESL. Use a 4-layer PCB with 2 oz copper on the inner power plane and a dedicated top-side 'switching node' pad for the drain to avoid coupling ringing into the gate trace.
Do not exceed the CGD ICeGaN gate-driver voltage window published in the preliminary datasheet; overdrive accelerates threshold-voltage shift and can permanently degrade R_DS(on). Use an isolated gate driver such as UCC23513 or ISO5852S sized for the CGD65C025SP2's required pull-up/pull-down peak current, and never drive the part directly from a logic-level MCU GPIO - the source-return inductance alone will corrupt the gate waveform.
Estimated: at 60 A continuous current with 1.5 V R_DS(on) hot-spot, conduction loss approaches 5.4 W. The BHDFN-9-1 land pattern must connect to a copper pour of at least 1 square inch on top and bottom layers with multiple thermal vias (0.3 mm drill, 1 mm pitch) for the thermal pad; otherwise junction temperature quickly exceeds 150 °C at room ambient. For continuous high-power operation, attach a small aluminum heat spreader or use the part in a top-cooled module.
Keep the gate-driver return trace (from source-sense pin to driver COM) short and direct - this is a high-frequency loop, not a power loop. Routing the gate signal over a void in the return plane guarantees ringing that may falsely enhance the device. Add a small ferrite bead or 1-2 Ω gate-source damping resistor only if the measured gate-edge overshoot exceeds the ICeGaN absolute-maximum rating in your layout.
Compliance Information
RoHS, REACH, AEC-Q100, lead-free, halogen-free, and conflict-minerals status are not stated in the verified web data and should be confirmed with Cambridge GaN Devices. The datasheet is a preliminary May 2024 release and a final datasheet may provide updated compliance information.
