EP2S130F1020C3 vs EP2S180F1020C3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S130F1020C3 sa pamamagitan ng Intel at EP2S180F1020C3 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2S130F1020C3 | EP2S180F1020C3 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Series | Stratix II | Stratix II |
| Family | Stratix II | — |
| Logic Elements / Cells | 132,540 | — |
| Logic Array Blocks (LABs) | 6,627 | 8,970 |
| User I/Os | 742 | — |
| Embedded Memory (TriMatrix) | [DATA_NEEDED: total Mbits] | — |
| DSP / Multiplier Blocks | [DATA_NEEDED: DSP block count] | — |
| Transceivers | Logic-rich SKU (no transceiver; transceiver variants use different suffix) | — |
| Maximum Internal Frequency | 778.82 MHz (per family datasheet) | — |
| Process Technology | 90 nm | — |
| Core Supply Voltage (VCCINT) | 1.15 V to 1.25 V | — |
| Packhaging / Kaso | 1020-BBGA (FC-FBGA), 33x33 mm | — |
| Supplier Device Package | 1020-FBGA (33x33) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0C to +85C (commercial, 'C' speed grade) | Commercial (0C to +85C) |
| Speed Grade | C3 (commercial, -3 speed) | C3 |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Device Family | — | EP2S180 |
| Equivalent Logic Elements (LEs) | — | 179,400 |
| Embedded Memory (RAM bits) | — | 9,383,040 |
| Maximum User I/Os | — | 742 |
| Packhaging | — | 1020-ball FBGA (flip-chip BGA) |
| Process Node | — | 90 nm, all-layer copper SRAM |
| Core Voltage | — | 1.2 V |
| DSP Blocks | — | Dedicated high-speed multipliers |
| Memory Interfaces Supported | — | DDR2 SDRAM, QDRII SRAM, RLDRAM II |
| I/O Standards | — | LVDS, LVPECL, SSTL, HSTL |
| Configuration Method | — | SRAM-based (volatile, requires boot device) |
| Development Toolchain | — | Quartus II / Quartus Prime |