EP3SL50F780C4LN vs EP3SE50F780C4LN Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP3SL50F780C4LN sa pamamagitan ng Intel at EP3SE50F780C4LN sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP3SL50F780C4LN EP3SE50F780C4LN
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND Aktibo
Series Stratix III L —
Family Stratix III L (Low-Power) Stratix III E
Logic Elements (LE) 47,500 —
Logic Array Blocks (LAB) 1,900 —
Total RAM Bits 2,184,192 —
User I/O Pins 488 —
Packhaging 780-BBGA, FCBGA (29x29 mm) 780-ball FC-FBGA
Uri ng Pagpapasok Surface Mount Surface Mount (BGA)
Process Technology 65 nm —
Core Voltage (VCCINT) 0.86 V to 1.15 V —
Temperature na Operasyon 0C to +85C (Commercial) 0°C to 85°C (Commercial)
Speed Grade C4 C4
Lead-Free / RoHS Yes (LN suffix indicates lead-free, enhanced) Yes (L suffix)
Level ng MSL [DATA_NEEDED: MSL moisture sensitivity level] —
Transceivers [DATA_NEEDED: number of integrated transceivers for F780 package] —
DSP Blocks [DATA_NEEDED: 18x18 multiplier count for EP3SL50] Yes (embedded multipliers)
Configuration SRAM-based, configured via Quartus II —
Logic Elements — 47,500
LABs (Logic Array Blocks) — 1,900
Embedded Memory — 5,760,000 bits
User I/Os — 488
Process Node — 65 nm
Core Voltage — 0.9 V
Maximum Toggle Frequency — 375 MHz
Configuration Modes — Passive Serial, Fast Passive, Active Serial (AS), Active Parallel (AP), JTAG
Block RAM Type — M9K + M144K
Memory Architecture — SRAM-based, reprogrammable
Tindminan RoHS — Compliant

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