H5AN8G4NAFR-UHC vs H5AN8G6NAFR-UHC Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng H5AN8G4NAFR-UHC sa pamamagitan ng SK hynix at H5AN8G6NAFR-UHC sa pamamagitan ng SK hynix. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | H5AN8G4NAFR-UHC | H5AN8G6NAFR-UHC |
|---|---|---|
| Brand | SK hynix | SK hynix |
| Kategorya | Memory ICs | Memory ICs |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Manufacturer | SK hynix (Hynix Semiconductor) | — |
| Uri ng Memory | DDR4 SDRAM (CMOS) | DDR4 SDRAM (CMOS) |
| Density | 8 Gbit | — |
| Organisasyon | 2G x4 | 512M x 16 |
| Supply Voltage (VDD) | 1.2 V | — |
| Speed Grade | UHC | — |
| Interface | Synchronous, dual rising/falling clock edges | — |
| Clock Input | Differential CK_t / CK_c | — |
| Packhaging | 78-ball FBGA | 96-ball FBGA (TFBGA) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | 0C to +85C |
| Tindminan RoHS | Compliant (Lead-Free & Halogen-Free) | [DATA_NEEDED: RoHS status] |
| Family Variants | H5AN8G4NAFR-xxC / H5AN8G8NAFR-xxC / H5AN8G6NAFR-xxC | — |
| Datasheet Revision | Rev. 1.2 (Jul. 2017), 45 pages | — |
| Level ng MSL | [DATA_NEEDED: moisture sensitivity level] | — |
| Packaging | [DATA_NEEDED: reel / tray quantity] | — |
| Memory Density | — | 8 Gbit |
| Volte ng Pagbibigay | — | 1.2 V |
| Rate ng Data | — | 2400 MT/s |
| Clock Architecture | — | Differential clock (CK_t / CK_c), fully synchronous |
| Refresh | — | Auto self-refresh |
| Precharge | — | Auto precharge function |
| Reset | — | Asynchronous reset function |
| Data Mask | — | DM function supported |
| Termination | — | Dynamic on-chip termination (ODT) |
| Calibration | — | ZQ calibration function |
| Error Checking | — | CRC function |
| Write Leveling | — | Write leveling function supported |