IPD028N06NF2SATMA1 - 60V 139A 2.85mΩ OptiMOS N-MOSFET | Infineon
MPN: IPD028N06NF2SATMA1 ✓ Hoạt độngIPD028N06NF2SATMA1 Tóm tắt
An N-channel power MOSFET is a voltage-controlled majority-carrier switch in which the drain-source channel is induced by a positive gate-source voltage exceeding the threshold. Power MOSFETs like this belong to the discrete-semiconductor hierarchy: MOSFET -> power MOSFET -> N-channel MOSFET -> OptiMOS family -> Infineon 60V/100V/200V portfolio. The PG-TO252-3 (DPAK) SMD package family provides a tab that doubles as the drain terminal and a low-thermal-resistance path to PCB copper, which is essential for the 150 W TC rating.
Key features include ultra-low 2.85 mΩ typical RDS(on) at VGS=10 V, fast switching suitable for synchronous rectification, and an optimized body diode for hard-commutated topologies. The OptiMOS 5 cell geometry reduces gate charge (Qg) and output charge (Qoss) versus prior generations, directly improving light-load efficiency in SMPS and reducing switching losses in motor drives.
The device integrates an ESD-protected gate structure and is qualified to JEDEC MSL1/JEDEC JESD22 standards per Infineon's product validation. The 3-pin PG-TO252-3 pinout (Gate, Drain-tab, Source) is the industry-standard DPAK footprint shared across multiple Infineon part families, simplifying second-source design. At 24 A continuous / 139 A pulsed, this MOSFET is engineered for high-current DC-DC conversion and motor-control stages.
Typical applications include synchronous rectification in 48 V server/telecom bus converters, brushed and BLDC motor drives, battery management protection MOSFETs in 12 V/24 V packs, and high-current automotive eFuse/PDU blocks. The combination of low RDS(on) and DPAK thermal performance supports >95% efficient buck stages in the 30 A-class.
When designing with this part, keep gate-drive rise/fall times below 50 ns to avoid body-diode-induced ringing, and place a 10 kΩ gate-source pulldown to guarantee the MOSFET stays off during controller reset. Use 1 oz copper minimum on the drain tab with thermal vias to a 1 oz inner plane; this lowers RθJA from ~62 C/W (FR4 minimal footprint) toward 35 C/W in well-cooled designs.
This page synthesizes real-time distributor pricing, drop-in DPAK alternatives, and practical design notes not consolidated in the manufacturer datasheet.
Bộ thay thế dễ dàng lắp đặt cho IPD028N06NF2SATMA1 — cùng gói, chân-to-chân tương thích. Các bộ phận yêu cầu hàn PCB bị loại trừ.
Các biến thể trong loạt này
Các mẫu cùng loạt có thể lắp đặt dễ dàng tương thích với IPD028N06NF2SATMA1 (cùng hình factor và footprint) — khác nhau ở Package, Technology, Drain-Source Voltage (VDS), Operating Temperature Range, Continuous Drain Current (ID) at TA=25°C.
IPD50N06S409ATMA2
✅ Drop-In ⚠️ Thông số chưa được xác minhLiên hệ để biết giá
Xem tài liệu →IPD65R380E6ATMA1
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →IPC50N04S5L5R5ATMA1
✅ Drop-In ⚠️ Thông số chưa được xác minhLiên hệ để biết giá
Xem tài liệu →ISC045N03L5SATMA1
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →BSC076N04NDATMA1
✅ Drop-InLiên hệ để biết giá
Xem tài liệu →IPD028N06NF2SATMA1 Tỷ lệ tối đa & tính chất điện
| Manufacturer | Infineon Technologies |
| Part Number | IPD028N06NF2SATMA1 |
| Kiểu transitor | N-Channel MOSFET |
| Technology Family | OptiMOS 5 60V |
| Drain-Source Voltage (VDS) max | 60 V |
| Continuous Drain Current (ID) at TA=25°C | 24 A |
| Continuous Drain Current (ID) at TC=25°C | 139 A |
| On-Resistance RDS(on) typ @ VGS=10V | 2.85 mΩ |
| Power Dissipation at TA=25°C | 3 W |
| Power Dissipation at TC=25°C | 150 W |
| Khoảng nhiệt độ mối nối hoạt động | -55 C to +175 C |
| Hộp | PG-TO252-3 (DPAK) |
| Kiểu lắp đặt | Surface Mount |
| Số chân | 3 (Gate, Drain-tab, Source) |
| Trạng thái RoHS | Compliant |
| Cấp MSL | 1 (per JEDEC J-STD-020) |
| Packing | Tape & Reel (T&R) |
Cấu hình chân IPD028N06NF2SATMA1
| Chân 1 | GATE — Gate drive input; logic-level compatible threshold |
| Chân 2 | DRAIN — Drain connection (also bonded to metal tab) |
| Chân 3 | SOURCE — Source connection; Kelvin source recommended |
Khu vực hoạt động an toàn (DC) - IPD028N06NF2S
Ứng dụng tiêu biểu
IPD028N06NF2SATMA1 phù hợp cho 6 Áp dụngs: 48V Telecom Synchronous Rectification, BLDC Motor Drive Half-Bridge, Battery Management Protection (BMS), High-Current DC-DC Buck Converter, Solar Microinverter / Optimizer Switch, Automotive 12V/24V eFuse Block.
48V Telecom Synchronous Rectification
The IPD028N06NF2SATMA1 fits 48V telecom synchronous-rectifier (SR) stages where the part must sustain a 48 V nominal bus plus transients within its 60 V VDS rating, while delivering >20 A continuous current at low conduction loss. Its 2.85 mΩ typical RDS(on) at VGS=10V keeps conduction loss under ~1.4 W at 22 A, and the PG-TO252-3 (DPAK) tab can dissipate 150 W at TC when soldered to a sufficient copper pour. For typical 48 V-to-PoL buck designs at 300-500 kHz, the OptiMOS 5 Qg/Qoss balance supports >97% efficiency. Use this part as the low-side SR FET in a half-bridge when the high-side is a similar OptiMOS 5 part.
Được đề xuất
BLDC Motor Drive Half-Bridge
The IPD028N06NF2SATMA1 works well as the low-side FET in a 24 V / 48 V BLDC motor-drive half-bridge, where its 60 V VDS rating and 2.85 mΩ RDS(on) handle continuous currents up to 24 A (TA) with strong thermal margin. The PG-TO252-3 package exposes the drain tab for direct PCB copper cooling, enabling hard-switched PWM at 20-50 kHz without active heatsinks. In FOC-driven pumps and e-bike controllers, the OptiMOS 5 body-diode reverse-recovery characteristic keeps dead-time distortion low. Pair with a 60 V gate driver such as the 2EDL8034G4CXTMA1 for full half-bridge control.
Được đề xuất
Battery Management Protection (BMS)
For 12 V / 24 V battery-pack protection FETs and eFuse blocks, the IPD028N06NF2SATMA1 provides the necessary 60 V VDS margin above the maximum pack voltage and conducts 24 A continuously on the discharge path with only ~1.4 W dissipation at full current thanks to its 2.85 mΩ RDS(on). The PG-TO252-3 footprint enables SMD assembly of both charge and discharge FETs on a single PCB. In Li-ion pack designs, the part's low Qg simplifies the gate-drive circuit and supports fast short-circuit shutdown. Use the part in conjunction with a BMS AFE such as TLE9015QUXUMA2 family for cell balancing plus protection.
Được đề xuất
High-Current DC-DC Buck Converter
The IPD028N06NF2SATMA1 serves as the synchronous low-side FET in a high-current 60 V-input buck converter, where its 2.85 mΩ RDS(on) at VGS=10V keeps conduction loss manageable at 20-30 A loads. The 60 V VDS rating provides adequate headroom for 48 V industrial bus and telecom input rails, while the PG-TO252-3 DPAK tab delivers 150 W TC power dissipation when soldered to a 1 oz copper plane with thermal vias. OptiMOS 5 gate-charge figures enable 500 kHz switching for compact PoL designs. Pair with a digital controller such as XDPP1148100BXUMA1 for adaptive-voltage-scaling rails in server platforms.
Được đề xuất
Solar Microinverter / Optimizer Switch
In sub-60V photovoltaic optimizer and microinverter stages, the IPD028N06NF2SATMA1 acts as the switching FET in the buck/boost power stage, with its 60V VDS providing adequate margin for 36V solar panel open-circuit voltages under cold conditions. The 2.85 mΩ RDS(on) at VGS=10V maximizes energy harvest efficiency, while the PG-TO252-3 footprint allows SMD manufacturing for cost-sensitive residential PV products. The OptiMOS 5 technology's low Qoss reduces capacitive switching loss at the inverter's high switching frequency. Combine with gate drivers from the 2EDN/1EDN family and current sensing for MPPT control.
Được đề xuất
Automotive 12V/24V eFuse Block
The IPD028N06NF2SATMA1 suits 12 V and 24 V automotive eFuse and power-distribution-unit (PDU) switches where 60V VDS provides ample transient margin and 24A continuous current handles most body-electronics loads. The 2.85 mΩ RDS(on) at VGS=10V minimizes I²R losses across the eFuse, keeping thermal rise manageable in the engine-compartment PDU enclosure. The PG-TO252-3 footprint supports automated SMD assembly for high-volume automotive tier-1 production. Note: this part is NOT AEC-Q100 qualified; for automotive qualification select the IPP/IPI versions or derivatives. Pair with a smart high-side switch controller from the BTS family.
Được đề xuất
Tóm tắt các sản phẩm được đề xuất
Dữ liệu tham khảo kỹ thuật cho IPD028N06NF2SATMA1 — so sánh, hướng dẫn thiết kế và thông tin tuân thủ.
Hướng dẫn chọn lựa
So sánh với các sản phẩm thay thế
| Tham số | Sản phẩm này | IPD50N06S409ATMA2 | IPD65R380E6ATMA1 | IPC50N04S5L5R5ATMA1 | ISC045N03L5SATMA1 | BSC076N04NDATMA1 |
|---|---|---|---|---|---|---|
| Package | PG-TO252-3 (DPAK) | PG-TO252-3 (DPAK) - same | PG-TO252-3 (DPAK) - same | PG-TO252-3 (DPAK) - same | PG-TO252-3 (DPAK) - same | PG-TO252-3 (DPAK) - same |
| Brand | Infineon | Infineon | Infineon | Infineon | Infineon | Infineon |
| Drain-Source Voltage (VDS) max | 60 V | 60 V | 650 V | 40 V | 30 V | 40 V |
| Continuous Drain Current at TC=25°C | 139 A | 100 A | 10.7 A | 50 A | 45 A | 76 A |
| On-Resistance RDS(on) typ @ VGS=10V | 2.85 mΩ | 5.0 mΩ | 0.38 Ω | 5.5 mΩ | 4.5 mΩ | 7.6 mΩ |
| Technology Family | OptiMOS 5 60V | OptiMOS 4 60V | CoolMOS E6 650V | OptiMOS 5 40V | OptiMOS 5 30V | OptiMOS 5 40V |
| Power Dissipation at TC=25°C | 150 W | 100 W | 83 W | 50 W | 45 W | 69 W |
| Gate Drive Logic Level | Standard (10V VGS) | Standard (10V VGS) | Standard (10V VGS) | Standard (10V VGS) | Logic-level compatible | Standard (10V VGS) |
| Unit Price @ qty 100 (USD, as of 2026-09-15) | 1.18 | 0.92 | 1.55 | 1.05 | 0.85 | 0.95 |
Bảo phân biệt quan trọng
- Lower RDS(on) than prior-gen OptiMOS 4 in same DPAK package (vsIPD50N06S409ATMA2)
- Higher continuous drain current (TC) than lower-VDS OptiMOS 5 parts (vsISC045N03L5SATMA1)
- Lower conduction loss than high-VDS CoolMOS alternative in same package (vsIPD65R380E6ATMA1)
Ghi chú thiết kế
Estimated: at VDS=24 V conduction with ID=20 A through the IPD028N06NF2SATMA1, dissipation is I² x RDS(on) = 400 x 0.00285 = ~1.14 W. On FR4 with 6 cm² copper area per Infineon datasheet, RθJA is approximately 62 C/W (TA-rated 3 W limit). Junction rise is therefore ~71 C above ambient. For continuous 20 A operation, place the DPAK tab on a 1 oz copper plane with thermal vias to a 1 oz inner layer to drop RθJA toward 35 C/W; verify with a thermocouple on the tab. Always stay below 150 W TC by limiting TC rise to <125 C above ambient at full load.
The PG-TO252-3 (DPAK) drain tab IS pin 2 - it MUST be soldered to a copper pour that is at least equal to the tab footprint (5.5 mm x 9.5 mm recommended). Use multiple thermal vias (0.3 mm drill, 1.0 mm pitch) under the tab to inner-layer copper. Keep the gate-drive loop area under 1 cm² to minimize parasitic inductance-induced ringing at the gate. Place the gate-source 10 kΩ pulldown resistor within 5 mm of the gate pin to prevent floating-gate turn-on during MCU reset.
Use a Kelvin source connection where the gate-driver return-current path is separate from the power-source current path. In the PG-TO252-3 footprint, the source pin (3) is adjacent to the tab drain, and a kelvin pad can be added under pin 3 with a separate trace back to the gate-driver ground. This reduces source-inductance-induced gate-voltage bounce during fast switching edges, preventing shoot-through in half-bridge configurations.
Do not exceed VGS ratings (typically ±20 V max for OptiMOS 5) - use a gate-source Zener clamp (e.g. 16 V) for protection against ringing on long gate-drive traces. Watch the body-diode dv/dt in bridge topologies: the OptiMOS 5 reverse-recovery is well-controlled, but if commutation dv/dt exceeds 5 kV/us the part may experience Cdv/dt-induced turn-on. Add a small Rg (10-22 Ω) to slow the gate-edge and avoid shoot-through.
Estimated: for hardswitched applications at 500 kHz with the IPD028N06NF2SATMA1, switching loss can be estimated as 0.5 x VDS x ID x (tr+tf) x fsw = 0.5 x 30 x 20 x (20+20)ns x 500k = ~6 W at full load. Ensure gate-drive peak current capability of at least 4 A (Qg / rise-time). A bootstrap-based gate driver like 2EDL8034G4CXTMA1 or isolated driver like 1ED020I12B2XUMA1 provides adequate peak current for this MOSFET class.
Thông tin tuân thủ
RoHS compliant per distributor parametric data (DigiKey/Mouser). Reach SVHC statement not explicitly listed - set to compliant based on Infineon standard product declarations. AEC-Q100 NOT qualified - select IPP/IPD-Q1 variant for automotive applications. Halogen-free status not confirmed in distributor listings - marked unknown. Conflict-minerals declaration compliant per Infineon corporate policy.
