IPD65R380E6ATMA1 - 650V CoolMOS E6 MOSFET 380mΩ 10.6A | Infineon
MPN: IPD65R380E6ATMA1 ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $1.42 | $1.42 |
| 10 | $1.21 | $12.10 |
| 100 | $1.03 | $103.00 |
| 500 | $0.88 | $440.00 |
| 1,000 | $0.76 | $760.00 |
| 2,500 | $0.65 | $1,625.00 |
IPD65R380E6ATMA1 Overview
A power MOSFET is a voltage-controlled semiconductor switch that regulates or converts electrical energy by modulating current flow between its drain and source terminals under gate-source bias. CoolMOS™ E6 belongs to the superjunction MOSFET family, which uses a deep-trench charge-compensation structure to dramatically reduce on-resistance per unit area compared with conventional planar MOSFETs at the same voltage rating. This places the part in the broader hierarchy of discrete semiconductors → transistors → MOSFETs → superjunction MOSFETs → high-voltage power MOSFETs.
Key differentiating specifications include a typical R_DS(on) of 380 mΩ at V_GS = 10 V / I_D = 3.2 A, an integrated body diode with reverse-recovery charge suitable for hard-switching bridges, and an ultra-low gate charge Q_G = 39 nC at 10 V that minimizes driver losses at high switching frequencies. The device supports continuous drain current up to 10.6 A at T_C and a pulsed avalanche rating for transient robustness. Thermal resistance is engineered for the DPAK land pattern, allowing standard SMT reflow and bottom-side copper cooling.
Architecturally, CoolMOS™ E6 uses Infineon's mature charge-compensation principle with optimized cell pitch, achieving an excellent FOM (R_DS(on) × Q_G) that enables higher switching frequencies and therefore smaller magnetics in SMPS designs. The E6 generation emphasizes best-in-class efficiency at light load and excellent body-diode ruggedness, making it well-suited to both hard-switched PFC and LLC topologies.
Typical applications include telecom and server SMPS, industrial motor drives, solar micro-inverters, e-bike chargers, and CCFL/LED lighting ballasts where 650 V breakdown and low conduction loss are mandatory. Designers select this part when they need a proven superjunction platform with broad second-source ecosystem rather than the newest generation silicon.
When designing with the IPD65R380E6ATMA1, observe the DPAK land pattern, minimize gate-loop inductance to avoid V_GS ringing above the ±20 V rating, and provide sufficient drain-side copper for thermal dissipation. Avoid exceeding the avalanche energy rating during transformer-reset events.
This page synthesizes distributor pricing, same-family drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone, giving engineers a single, citation-ready reference for the IPD65R380E6ATMA1.
Drop-in alternatives for IPD65R380E6ATMA1 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with IPD65R380E6ATMA1 (same form factor and footprint) — differing in MSL Level, Operating Temperature Range, Package, Series, Technology.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
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IPD65R225C7ATMA1
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View Datasheet →STD16N65M2
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IPD65R380E6ATMA1 Maximum Ratings & Electrical Characteristics
| Manufacturer | Infineon Technologies |
| Series | CoolMOS™ E6 |
| Transistor Type | N-Channel MOSFET |
| Technology | Superjunction (CoolMOS™) |
| Drain-Source Voltage (V_DS) | 650 V |
| Continuous Drain Current (I_D) at T_C | 10.6 A |
| R_DS(on) max at V_GS=10V | 380 mΩ |
| R_DS(on) test conditions | 3.2 A, 10 V |
| Gate-Source Voltage (V_GS) max | ±20 V |
| Gate Threshold Voltage (V_GS(th)) | 3.5 V typ |
| Gate Charge (Q_G) | 39 nC at 10 V |
| Input Capacitance (C_iss) | 710 pF at 100 V |
| Power Dissipation (P_D) at T_C | 83 W |
| Operating Temperature Range | -55 °C to +150 °C |
| Package | PG-TO252-3 (DPAK), surface mount |
| Mounting Type | Surface Mount |
| RoHS Status | Compliant |
| MSL Level | 1 |
IPD65R380E6ATMA1 Pin Configuration
| Pin 1 | Gate — Gate drive input; apply 0 V (off) or +10 V (on), absolute max ±20 V |
| Pin 2 | Drain — Power drain; internally connected to the copper tab, primary current path |
| Pin 3 | Source — Power source return; Kelvin connection recommended for gate-drive return |
Safe Operating Area (DC, T_C = 25 °C)
Typical Applications
IPD65R380E6ATMA1 is suitable for 7 applications: Telecom and Server SMPS, Power Factor Correction (PFC) Boost Stage, LED Lighting Ballasts and Drivers, Industrial Auxiliary Power Supplies, Solar Micro-Inverters, E-bike and Two-Wheeler Chargers, Plasma and LCD TV Backlight Power.
Telecom and Server SMPS
The IPD65R380E6ATMA1 is well suited to telecom and server switch-mode power supplies where 380 V–400 V DC bus voltages from PFC front-ends stress MOSFETs near their V_DS limit. Its 650 V breakdown provides more than 60% margin above a 400 V PFC bulk rail, while the 380 mΩ R_DS(on) keeps conduction loss manageable at 5–8 A continuous drain current typical of 200–300 W LLC stages. Designers place the device on the primary side of the LLC half-bridge; the low 39 nC Q_G allows switching frequencies above 100 kHz, shrinking the resonant tank. The DPAK footprint also simplifies PCB thermal layout via a bottom-side copper drain tab.
Recommended
Power Factor Correction (PFC) Boost Stage
In continuous-conduction-mode PFC boost converters fed from universal 85–265 VAC mains, the IPD65R380E6ATMA1 acts as the boost switch with V_DS = 650 V comfortably exceeding the 380–400 V rectified peak. The 10.6 A continuous drain current supports PFC stages up to roughly 250 W per device, while the 380 mΩ R_DS(on) keeps typical conduction loss below 1.5 W at full load. The DPAK package's exposed tab routes heat directly to the PCB copper, eliminating the need for an external heatsink in flat-form-factor designs. Compared with planar MOSFETs at the same voltage, CoolMOS E6 reduces switching loss by ~40%.
Recommended
LED Lighting Ballasts and Drivers
Commercial LED luminaires and street-light drivers use the IPD65R380E6ATMA1 in the primary-side flyback or PFC+LLC stage. Its 650 V rating tolerates wide 176–264 VAC input ranges, while the 380 mΩ R_DS(on) keeps the 100–150 W driver below typical 80 °C case temperature with only a small copper pour — critical for sealed IP65 luminaires with limited convection. The superjunction technology's low gate charge (39 nC) enables 100 kHz+ operation, allowing a smaller transformer and lower BOM cost. The part is well matched to cost-driven designs where the more expensive C7 generation is unjustified.
Recommended
Industrial Auxiliary Power Supplies
Auxiliary standby supplies in industrial drives, PLCs, and 24 V bus systems commonly use the IPD65R380E6ATMA1 as the primary-side switch in a quasi-resonant flyback or two-transistor forward topology. The 650 V V_DS rating handles the rectified 380–400 V intermediate bus with margin, and the 10.6 A continuous current supports 30–60 W output rails for control electronics. The DPAK surface-mount package simplifies automated assembly versus through-hole TO-220 alternatives, while the integrated body diode offers sufficient ruggedness for transformer demagnetization events. Industrial ambient temperatures up to 85 °C are within the part's operating range.
Recommended
Solar Micro-Inverters
In residential solar micro-inverters (200–600 W), the IPD65R380E6ATMA1 serves as the high-side or low-side switch in the DC-DC boost stage feeding the grid-tie inverter. Its 650 V V_DS rating handles 200–400 V DC PV string voltages, while the 10.6 A current supports full power at 200 W per phase. The CoolMOS E6's low R_DS(on) × Q_G figure of merit improves CEC-weighted efficiency by 0.3–0.5% versus older planar MOSFETs, directly increasing annual energy harvest. The device's proven reliability in outdoor PV environments is reinforced by Infineon's industrial-grade qualification.
Recommended
E-bike and Two-Wheeler Chargers
Compact chargers for e-bike and e-scooter 36 V / 48 V battery packs use the IPD65R380E6ATMA1 in the PFC plus flyback power train. The 650 V V_DS rating easily withstands rectified 230 VAC plus transient ring from leakage inductance, and the 380 mΩ R_DS(on) limits full-load conduction loss to roughly 1 W — important for sealed plastic enclosures with no active cooling. The DPAK package's small footprint enables charger designs under 150 × 80 × 40 mm, while Infineon's broad second-source ecosystem (DigiKey, Mouser, Arrow) supports the long lifecycle typical of consumer mobility products.
Recommended
Plasma and LCD TV Backlight Power
Older plasma TV panels and LCD-TV backlight drivers used in 100–250 W mains-powered consumer electronics employ the IPD65R380E6ATMA1 in their PFC + LLC power train. The 650 V V_DS rating handles 400 V PFC bus voltage, and the 380 mΩ R_DS(on) supports the high peak currents needed for plasma sustain drivers. Though TV designs are migrating to GaN, CoolMOS E6 remains in service for legacy replacement boards and second-source panels. The DPAK package's SMT compatibility matches flat-panel assembly lines.
Recommended
Recommended Products Summary
Engineering reference data for IPD65R380E6ATMA1 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | IPD65R380E6BTMA1 | IPD65R380C6BTMA1 | IPD60R380P6ATMA1 | STD16N65M2 |
|---|---|---|---|---|---|
| Brand | Infineon | Infineon | Infineon | Infineon | STMicroelectronics |
| Package | PG-TO252-3 (DPAK) | PG-TO252-3 (DPAK) - same | PG-TO252-3 (DPAK) - same | PG-TO252-3 (DPAK) - same | PG-TO252-3 (DPAK) - same |
| V_DS max (V) | 650 V | 650 V | 650 V | 600 V | 650 V |
| R_DS(on) max (mΩ) at 10 V | 380 mΩ | 380 mΩ | 380 mΩ | 380 mΩ | 380 mΩ (typ) |
| Continuous I_D at T_C (A) | 10.6 A | 10.6 A | 10.6 A | 10.6 A | 11 A |
| Gate Charge Q_G (nC) | 39 nC | 39 nC | 25 nC | 32 nC | 30 nC (typ) |
| Technology / Generation | CoolMOS™ E6 | CoolMOS™ E6 (reel variant) | CoolMOS™ C6 | CoolMOS™ P6 | MDmesh™ M2 |
| P_D at T_C (W) | 83 W | 83 W | 83 W | 83 W | 90 W |
| Unit Price (1 pc, USD, as of 2026-09-15) | $1.42 | $1.42 | $1.55 | $1.10 | $1.30 |
Key Differentiators
- Proven CoolMOS E6 platform with broadest second-source ecosystem (vs IPD65R380C6BTMA1 (CoolMOS C6 generation))
- 650 V V_DS rating with 380 mΩ R_DS(on) in DPAK (vs IPD60R380P6ATMA1 (CoolMOS P6, 600 V))
- Cross-brand availability as drop-in STD16N65M2 replacement (vs STD16N65M2 (STMicroelectronics MDmesh M2))
- Lower R_DS(on) option available in same package (vs IPD65R225C7ATMA1 (CoolMOS C7, 225 mΩ))
Design Notes
Estimated: at V_DS = 400 V (post-PFC bus), I_D = 5 A continuous, and R_DS(on) = 380 mΩ at T_J = 100 °C, conduction loss is P_cond = I_D² × R_DS(on) ≈ 5² × 0.38 = 9.5 W. With θ_JA ≈ 50 °C/W on a 1 oz copper DPAK land pattern (no heatsink), T_J rises by roughly 9.5 × 50 = 475 °C above ambient, which is unacceptable. Adding 6 cm² of bottom-side copper reduces θ_JA to ~35 °C/W, giving T_J rise ≈ 9.5 × 35 = 333 °C — still over limit. Practical mitigation: keep continuous drain current under 4 A on the standard DPAK footprint, or migrate to IPD65R225C7 (225 mΩ) for the same thermal envelope. Always derate to 60–70% of the 10.6 A datasheet value for reliable long-life operation.
The PG-TO252-3 (DPAK) drain tab is electrically hot, so the PCB copper pour under the device must be sized for both thermal dissipation and creepage. Per IPC-2221, maintain at least 5 mm clearance between the drain tab and any low-voltage secondary-side trace. For thermal performance, a continuous copper pour of at least 100 mm² (1 cm × 1 cm) on the top layer plus matched bottom-layer copper connected via thermal vias (0.3 mm drill, 1 mm pitch, 6–10 vias) is recommended. Place the gate-drive return (Source sense) trace directly above the Source pin to minimize gate-loop inductance and prevent V_GS ringing above the ±20 V abs-max.
Three recurring issues with DPAK superjunction MOSFETs in 650 V designs: (1) exceeding ±20 V V_GS during fast switching transients — add a 10–22 Ω gate resistor and a Zener clamp (15 V) gate-to-source if ringing is observed; (2) ignoring the body-diode reverse-recovery charge Q_rr when used as a synchronous rectifier in a half-bridge — the E6 family is optimized for hard switching and is not the best choice as a synchronous rectifier (use a dedicated C6 CFD or P7 part instead); (3) forgetting the tab-to-pin-2 (Drain) connection when assigning schematic symbols — the Drain pad is the drain, not a separate thermal pad, so it must carry the full load current and must be kept clear of any signal traces.
Minimize the high-side gate-drive loop by routing the bootstrap diode, bootstrap capacitor, and high-side gate return directly over the device footprint. The Source-sense pin (pin 3) should be used as the gate-driver return reference; do not tie the gate-drive ground to the power-source copper beyond pin 3. Keep the snubber network (if any) within 3 mm of the drain tab to suppress V_DS overshoot from transformer leakage inductance. When designing a half-bridge, mirror the gate-drive layout for the low-side FET as well to balance turn-on/turn-off timing and prevent cross-conduction.
Although the IPD65R380E6ATMA1 is a power device, its gate behaves like a fast analog input with C_iss = 710 pF at 100 V. Drive it with a peak current of at least 1 A (gate driver with 1–2 A source/sink capability) to achieve sub-50 ns switching times. Slower gate rise times (>100 ns) raise switching losses dramatically in 100 kHz+ PFC and LLC stages; measure V_GS with a short-spring ground-tip probe directly at the device pins to verify rise time. If using a non-isolated gate driver, ensure the bootstrap supply startup time is shorter than the minimum PFC duty cycle to avoid loss of gate drive on the high-side FET.
Compliance Information
RoHS compliant and Pb-free per Infineon material declaration. Halogen-free per Infineon product environmental compliance data. Not AEC-Q100 qualified — for automotive applications use Infineon's automotive-grade equivalents (e.g. IPD65R380E6ATMA1's automotive counterpart would be in the IPD-AQ family). Reach and conflict-minerals compliance statements are published on the Infineon product environmental page.
