EP2SGX130GF40C3N vs EP2SGX130GF40C4NES 比較
詳細並排比較 EP2SGX130GF40C3N 由 Intel 與 EP2SGX130GF40C4NES 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EP2SGX130GF40C4NES - 132K LE Stratix II GX FPGA, 6.375Gbps SERDES, 1508-FBGA | Intel
EP2SGX130GF40C4NES ⚠ 最後購買機會規格比較
| 參數 | EP2SGX130GF40C3N | EP2SGX130GF40C4NES |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 最後購買 |
| Family | Stratix II GX | Stratix II GX |
| Logic Elements | 132,540 | 132,540 |
| Embedded Memory | 6.7 Mbits | Approximately 4.5 Mbits (TriMatrix) |
| Embedded Multipliers (18x18) | 252 | — |
| User I/O Count | 734 | — |
| Transceiver Count | 40 channels | — |
| Max Transceiver Data Rate | 6.375 Gbps | — |
| Process Technology | 90 nm | 90 nm CMOS |
| Core Voltage | 1.2 V | 1.2 V |
| 封裝 | 1508-ball FC-FBGA | — |
| 安裝類型 | Surface Mount (flip-chip BGA) | Surface Mount (flip-chip BGA) |
| 工作溫度 | 0C to +85C (commercial) | Commercial Extended (per N suffix) |
| Speed Grade | C3 | C4 (speed grade -4) |
| Configuration Mode | Passive Serial / Fast Passive Parallel / JTAG | — |
| RoHS 狀態 | Compliant | — |
| Logic Blocks / ALMs | — | Approximately 53,000 ALMs |
| Maximum Transceiver Data Rate | — | 6.375 Gbps |
| Transceiver Channels | — | Up to 20 (4 to 20, device-dependent) |
| User I/O Pins | — | 734 |
| Total Package Pins | — | 1508 (FC-FBGA ball grid) |
| Package Code | — | GF40 (FC-FBGA, 40x40 mm, 1.0 mm pitch) |
| Internal Operating Frequency | — | Up to 717 MHz |
| PLL Blocks | — | 8 |
| DSP Blocks | — | Yes (variable, see datasheet) |
| Lead-Free / RoHS | — | Yes (LEAD FREE per datasheet family code) |
| MSL 等級 | — | Per JEDEC J-STD-020, typically MSL-4 or higher [DATA_NEEDED: exact MSL level] |
| JEDEC Standard Reference | — | MS-034AAU-1 |