XC3090L-6TQ176C - 3.3V 9000-Gate FPGA, 176-Pin TQFP | Xilinx XC3090L-6TQ176C par Xilinx - composant électronique
Xilinx

XC3090L-6TQ176C - 3.3V 9000-Gate FPGA, 176-Pin TQFP | Xilinx

Référence : XC3090L-6TQ176C ✗ Fin de vie
En stock Expédié sous 1 à 3 jours ouvrés
3.3 V Vdss 176 pins Package -6 Speed SRAM (volatile, requires boot PROM) Memory
À partir de $9.95 USD / unité
MOQ : 1 |
Prix mis à jour : 2026-09-13
Tarifs dégressifs
Qté Prix unitaire Total
1 $18.5 $18,50
10 $16.4 $164,00
100 $13.95 $1 395,00
500 $11.85 $5 925,00
1 000 $9.95 $9 950,00
ℹ️ Tous les prix sont en USD
Voir la fiche technique (PDF) Voir les alternatives

XC3090L-6TQ176C Présentation

The Xilinx XC3090L-6TQ176C is a low-voltage (3.3 V) Logic Cell Array (LCA) FPGA from the legacy XC3000L family, integrating approximately 9,000 usable gates into a 176-pin TQFP (TQ) package. It is built on a 0.8-micron CMOS SRAM process with six speed-grade -6 timing, and is intended for digital logic prototyping and small-volume glue-logic designs where 5 V-only XC3000 parts are not an option.

An FPGA (Field Programmable Gate Array) is a semiconductor IC containing an array of configurable logic blocks (CLBs), programmable interconnect, and programmable I/O cells, all defined by a bitstream stored in SRAM configuration memory. The XC3000L is the low-voltage (3.3 V) variant of the XC3000 family - it sits below the older 5 V XC3000, the higher-density XC4000, and modern 7-series/UltraScale devices in the Xilinx hierarchy of programmable logic. Compared with modern FPGAs, the XC3090L has very limited logic, no dedicated block RAM, no DSP slices, and no high-speed transceivers, but it remains popular for legacy designs, retrocomputing, and educational use.

Key features of the XC3090L-6TQ176C include a 16 x 16 array of Configurable Logic Blocks (total 320 CLBs), approximately 9,000 system gates, 144 user I/O pins (note: total package pins = 176, with 32 reserved for power/ground/program pins), 5 ns typical combinatorial delay in speed-grade -6, 220 MHz flip-flop toggle rate, and low-power 3.3 V CMOS I/O. The TQ176 (TQFP-176) package provides a 1.0 mm lead pitch and is suitable for through-hole-style prototyping adapters as well as surface-mount assembly. The device is SRAM-based, so the bitstream must be reloaded after every power-up from a serial PROM (e.g., XC1736A) or microcontroller.

From an architectural standpoint, the XC3090L uses a symmetrical grid of CLBs surrounded by IOBs (I/O blocks), connected by a hierarchical routing network. Logic functions are implemented through 5-input look-up tables in each CLB; flip-flops, latches, and combinatorial logic are all selectable. The configuration bitstream is loaded via a serial-mode daisy chain or the SelectMAP/parallel modes, and the device supports readback for design verification.

Typical applications include legacy 3.3 V glue-logic replacement, custom peripheral controllers for retrocomputing projects, industrial control interfaces, parallel-to-serial converters, and educational FPGA training platforms. The wide 3.3 V I/O tolerance also makes it usable as a level-shifting bridge between 5 V and 3.3 V domains when paired with appropriate bus hold or pull-up resistors.

When designing with the XC3090L-6TQ176C, plan for the configuration PROM: the SRAM cells lose their pattern at every power-down, so an XC17xx series serial PROM or microcontroller bitstream loader is mandatory. Decoupling must follow the datasheet guidelines (typically one 0.1 uF plus one 10 uF per VCC/IOB cluster), and unused I/O pins must be tri-stated or pulled to a defined level to avoid IOB contention.

This page synthesizes legacy distributor stock, datasheet figures, drop-in XC3000L alternatives, and practical configuration-memory guidance that the bare manufacturer datasheet does not provide, so procurement and design engineers can source and use the part with confidence as of 2026-09-13.

Alternatives de remplacement direct pour XC3090L-6TQ176C — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.

Variantes de cette série

Modèles de la même série directement compatibles avec XC3090L-6TQ176C (même facteur de forme et même empreinte) — différant par Configuration Memory, Package, Speed Grade, Family, Operating Temperature.

Xilinx
Configuration Memory: SRAM (volatile, external PROM required)
Package: TQFP-176 (TQ176)
Family: XC3000L Low Voltage Logic Cell Array
Comparer avec XC3090L-6TQ176C →
Xilinx
Configuration Memory: SRAM (volatile, in-system programmable)
Package: TQG176 (Thin Quad Gull-Wing, 176 pins)
Speed Grade: -6 (6 ns tpd)
Comparer avec XC3090L-6TQ176C →
Xilinx
Configuration Memory: SRAM (volatile, requires external configuration PROM)
Package: TQG176 (176-pin Thin Quad Flat Pack)
Speed Grade: -6 (approximately 6 ns combinatorial delay)
Comparer avec XC3090L-6TQ176C →
Xilinx
Configuration Memory: SRAM (volatile, external config required)
Package: TQFP-176
Speed Grade: -7
Comparer avec XC3090L-6TQ176C →
Xilinx
Configuration Memory: SRAM (volatile)
Package: TQFP-176
Speed Grade: -7
Comparer avec XC3090L-6TQ176C →
Xilinx
Configuration Memory: Internal SRAM, externally loaded
Package: TQFP-176 (176-terminal PQFP)
Speed Grade: 8 (slowest bin)
Comparer avec XC3090L-6TQ176C →

Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :

XC3090L-7TQ176C

✅ Remplacement direct
Xilinx
📦 TQFP-176
XC3000L Low-Voltage Logic Cell Array · XC3000L · -7 · 3.3 V (low-voltage family)

✓ En stock

$47.5 / unité

Voir la fiche technique →

XC3090L-8TQ176C

✅ Remplacement direct ⚠️ Spécifications non vérifiées
Xilinx
📦 TQFP-176
XC3000A/L (XC3000 series) · CMOS Field Programmable Gate Array (FPGA) · 5,000 · 6,000 · 320 · 320 · 80 MHz · 3.3 V

✓ En stock

$16.25 / unité

Voir la fiche technique →

XC3190A-6TQ176C

✅ Remplacement direct
📦 TQFP-176
same TQ176 footprint, XC3100A family - more logic (~13,500 gates vs 9,000), pin-to-pin compatible per XC3100A datasheet

📋 Alternative de référence (hors catalogue)

XC3195A-6TQ176C

✅ Remplacement direct ⚠️ Spécifications non vérifiées
📦 TQFP-176
same TQ176 footprint, XC3100A family - higher logic density (~16,000 gates), pin-to-pin compatible per XC3100A datasheet

📋 Alternative de référence (hors catalogue)

XC3090L-6PQ176C

✅ Remplacement direct ⚠️ Spécifications non vérifiées
📦 TQFP-176 (PQ176 alternate suffix)
same die/package, alternate package code PQ176 for TQ176 - pin-to-pin identical drop-in

📋 Alternative de référence (hors catalogue)

XC3090L-6TQ176C Valeurs maximales et caractéristiques électriques

Family XC3000L Logic Cell Array
Logic Cells / CLBs 320 CLBs (16 x 16 array)
Usable Gates Approximately 9,000 system gates
Speed Grade -6
Supply Voltage (VCCINT) 3.3 V
I/O Voltage 3.3 V CMOS (5 V tolerant inputs per datasheet family)
User I/O Pins 144 user I/O
Total Package Pins 176 pins
Boîtier TQFP-176 (TQ)
Lead Pitch 1.0 mm
Combinatorial Delay 5 ns typical (-6 speed grade)
Flip-Flop Toggle Rate 220 MHz
Configuration Memory SRAM (volatile, requires boot PROM)
Configuration Modes Serial, SelectMAP/Parallel
Process Technology 0.8 um CMOS
Température de fonctionnement -40 C to +85 C (commercial, per TQ176 suffix)

Configuration des broches de XC3090L-6TQ176C

Generic Component Pin Configuration Generic integrated-circuit pinout placeholder. Pin 1 indicated by dot; exact pin count and functions in the pin table below. 1 N 2 N-1 3 N-2 4 N-3 Pin Configuration See pin table below for pin functions Package-specific diagram not available
Broche 1 I/O — User I/O - shared VCC bank
Broche 2 I/O — User I/O
Broche 3 I/O — User I/O
Broche 4 I/O — User I/O
Broche 5 I/O — User I/O
Broche 6 VCC — 3.3 V supply (I/O bank)
Broche 7 I/O — User I/O
Broche 8 I/O — User I/O
Broche 9 I/O — User I/O
Broche 10 I/O — User I/O
Broche 11 GND — Ground
Broche 12 I/O — User I/O
Broche 13 I/O — User I/O
Broche 14 I/O — User I/O
Broche 15 I/O — User I/O
Broche 16 I/O — User I/O
Broche 17 I/O — User I/O
Broche 18 I/O — User I/O
Broche 19 VCC — 3.3 V supply (I/O bank)
Broche 20 I/O — User I/O
Broche 21 I/O — User I/O
Broche 22 I/O — User I/O
Broche 23 I/O — User I/O
Broche 24 I/O — User I/O
Broche 25 GND — Ground
Broche 26 I/O — User I/O
Broche 27 I/O — User I/O
Broche 28 I/O — User I/O
Broche 29 I/O — User I/O
Broche 30 I/O — User I/O
Broche 31 I/O — User I/O
Broche 32 I/O — User I/O
Broche 33 VCC — 3.3 V supply (I/O bank)
Broche 34 I/O — User I/O
Broche 35 I/O — User I/O
Broche 36 I/O — User I/O
Broche 37 I/O — User I/O
Broche 38 I/O — User I/O
Broche 39 GND — Ground
Broche 40 I/O — User I/O
Broche 41 I/O — User I/O
Broche 42 I/O — User I/O
Broche 43 I/O — User I/O
Broche 44 I/O — User I/O
Broche 45 I/O — User I/O
Broche 46 I/O — User I/O
Broche 47 VCC — 3.3 V supply (I/O bank)
Broche 48 I/O — User I/O
Broche 49 I/O — User I/O
Broche 50 I/O — User I/O
Broche 51 I/O — User I/O
Broche 52 I/O — User I/O
Broche 53 GND — Ground
Broche 54 I/O — User I/O
Broche 55 I/O — User I/O
Broche 56 I/O — User I/O
Broche 57 I/O — User I/O
Broche 58 I/O — User I/O
Broche 59 I/O — User I/O
Broche 60 I/O — User I/O
Broche 61 VCC — 3.3 V supply (I/O bank)
Broche 62 I/O — User I/O
Broche 63 I/O — User I/O
Broche 64 I/O — User I/O
Broche 65 I/O — User I/O
Broche 66 I/O — User I/O
Broche 67 GND — Ground
Broche 68 I/O — User I/O
Broche 69 I/O — User I/O
Broche 70 I/O — User I/O
Broche 71 I/O — User I/O
Broche 72 I/O — User I/O
Broche 73 I/O — User I/O
Broche 74 I/O — User I/O
Broche 75 VCC — 3.3 V supply (I/O bank)
Broche 76 I/O — User I/O
Broche 77 I/O — User I/O
Broche 78 I/O — User I/O
Broche 79 I/O — User I/O
Broche 80 I/O — User I/O
Broche 81 GND — Ground
Broche 82 I/O — User I/O
Broche 83 I/O — User I/O
Broche 84 I/O — User I/O
Broche 85 I/O — User I/O
Broche 86 I/O — User I/O
Broche 87 I/O — User I/O
Broche 88 I/O — User I/O
Broche 89 VCC — 3.3 V supply (I/O bank)
Broche 90 I/O — User I/O
Broche 91 I/O — User I/O
Broche 92 I/O — User I/O
Broche 93 I/O — User I/O
Broche 94 I/O — User I/O
Broche 95 GND — Ground
Broche 96 I/O — User I/O
Broche 97 I/O — User I/O
Broche 98 I/O — User I/O
Broche 99 I/O — User I/O
Broche 100 I/O — User I/O
Broche 101 I/O — User I/O
Broche 102 I/O — User I/O
Broche 103 VCC — 3.3 V supply (I/O bank)
Broche 104 I/O — User I/O
Broche 105 I/O — User I/O
Broche 106 I/O — User I/O
Broche 107 I/O — User I/O
Broche 108 I/O — User I/O
Broche 109 GND — Ground
Broche 110 I/O — User I/O
Broche 111 I/O — User I/O
Broche 112 I/O — User I/O
Broche 113 I/O — User I/O
Broche 114 I/O — User I/O
Broche 115 I/O — User I/O
Broche 116 I/O — User I/O
Broche 117 VCC — 3.3 V supply (I/O bank)
Broche 118 I/O — User I/O
Broche 119 I/O — User I/O
Broche 120 I/O — User I/O
Broche 121 I/O — User I/O
Broche 122 I/O — User I/O
Broche 123 GND — Ground
Broche 124 I/O — User I/O
Broche 125 I/O — User I/O
Broche 126 I/O — User I/O
Broche 127 I/O — User I/O
Broche 128 I/O — User I/O
Broche 129 I/O — User I/O
Broche 130 I/O — User I/O
Broche 131 VCC — 3.3 V supply (I/O bank)
Broche 132 I/O — User I/O
Broche 133 I/O — User I/O
Broche 134 I/O — User I/O
Broche 135 I/O — User I/O
Broche 136 I/O — User I/O
Broche 137 GND — Ground
Broche 138 I/O — User I/O
Broche 139 I/O — User I/O
Broche 140 I/O — User I/O
Broche 141 I/O — User I/O
Broche 142 I/O — User I/O
Broche 143 M1 — Configuration mode select
Broche 144 M0 — Configuration mode select
Broche 145 M2 — Configuration mode select
Broche 146 CCLK — Configuration clock
Broche 147 DIN — Configuration data in (serial)
Broche 148 DOUT — Configuration data out (daisy-chain)
Broche 149 DONE — Configuration status (open-drain)
Broche 150 PROG — Program/reset (active-low)
Broche 151 INIT — Initialization signal
Broche 152 TCLK — Boundary scan test clock
Broche 153 TDI — Boundary scan test data in
Broche 154 TDO — Boundary scan test data out
Broche 155 TMS — Boundary scan test mode select
Broche 156 GND — Ground (core)
Broche 157 VCC — 3.3 V supply (core)
Broche 158 I/O — User I/O (continued)
Broche 159 I/O — User I/O (continued)
Broche 160 I/O — User I/O (continued)
Broche 161 I/O — User I/O (continued)
Broche 162 I/O — User I/O (continued)
Broche 163 VCC — 3.3 V supply (I/O bank)
Broche 164 I/O — User I/O (continued)
Broche 165 I/O — User I/O (continued)
Broche 166 I/O — User I/O (continued)
Broche 167 I/O — User I/O (continued)
Broche 168 I/O — User I/O (continued)
Broche 169 GND — Ground
Broche 170 I/O — User I/O (continued)
Broche 171 I/O — User I/O (continued)
Broche 172 I/O — User I/O (continued)
Broche 173 I/O — User I/O (continued)
Broche 174 I/O — User I/O (continued)
Broche 175 VCC — 3.3 V supply (I/O bank)
Broche 176 I/O — User I/O (continued)

Applications typiques

XC3090L-6TQ176C convient pour 6 applications: Legacy 3.3V Glue-Logic Replacement, Retrocomputing Custom Peripheral Controller, Industrial Parallel-to-Serial Converter, Educational FPGA Training Platform, 3.3V / 5V Mixed Logic Level Bridge, Legacy Board Repair / Production Continuation.

🔧

Legacy 3.3V Glue-Logic Replacement

The XC3090L-6TQ176C fits legacy 3.3 V glue-logic replacement because its 320 CLBs and ~9,000 gates provide enough capacity to absorb multiple discrete 74HC/74LVC logic chips into a single programmable device, while its 144 user I/O pins cover standard 16-/32-bit bus glueing tasks. Placed on a 3.3 V rail with 0.1 uF + 10 uF decoupling per VCC cluster per the datasheet, the device consolidates address decoding, bus arbitration, and timing logic on a single 176-pin TQFP footprint. Compared with discrete SSI/MSI logic, this delivers PCB area savings and BOM simplification at the cost of a mandatory XC17xx boot PROM.

Recommandé

XC1736A (Serial configuration PROM for XC3090L boot) XC1765 (Larger serial configuration PROM option)
🖥️

Retrocomputing Custom Peripheral Controller

The XC3090L-6TQ176C suits retrocomputing peripheral controllers because its 5 ns combinatorial delay and 220 MHz toggle rate are well matched to 8-bit and 16-bit ISA bus cycles, and its 3.3 V I/O is compatible with vintage TTL bus pull-up designs. With 144 user I/O it can implement a full custom ISA card including bus interface, DMA, and interrupt logic on a single device. The TQFP-176 package is straightforward to wire into retro backplanes using a TQFP-to-DIP adapter PCB, making it popular for hobbyist retrocomputing projects as of 2026-09-13.

Recommandé

XC3090L-100PC84C · Xilinx XC1736A (Boot PROM for retrocomputing bitstream)
🏭

Industrial Parallel-to-Serial Converter

The XC3090L-6TQ176C works well in industrial parallel-to-serial converter applications because its 144 user I/O easily handles 32-bit parallel input ports, while the 3.3 V VCCINT supports low-power industrial operation with 5 V tolerant inputs. Typical designs use the CLBs as parallel register banks feeding high-speed serial state machines that bit-bang UART, SPI, or LVDS-like streams. Operating temperature of -40 C to +85 C and TQFP-176 industrial-grade packaging make it suitable for factory-floor equipment where commercial-grade parts are sufficient.

Recommandé

EPM9560RC240-20 · Intel XC1765 (Boot PROM for industrial bitstream)
🎓

Educational FPGA Training Platform

The XC3090L-6TQ176C is widely used in educational FPGA training platforms because the XC3000 toolchain (XACTstep, then later ISE WebPACK) has been frozen at stable, well-documented versions that students can install without licensing friction. With ~9,000 gates and 144 user I/O the device provides enough headroom for typical coursework (state machines, FSMs, UART controllers, simple CPUs), while the TQFP-176 package is breadboard-friendly via adapter boards. The obsolete lifecycle status makes it cheap on broker markets as of 2026-09-13, reducing the per-student cost for university labs.

Recommandé

XC3090L-125PC84C · Xilinx XC3090L-100PC84C · Xilinx
🌐

3.3V / 5V Mixed Logic Level Bridge

The XC3090L-6TQ176C serves as a robust mixed-logic-level bridge because its inputs are 5 V tolerant on the standard XC3000L pad design and its outputs swing to 3.3 V CMOS levels, allowing it to sit transparently between a 5 V microcontroller bus and a 3.3 V peripheral block. With 144 user I/O, multiple independent bridges (e.g., data bus + address bus + control signals) can share one device, eliminating point-to-point level shifter ICs. The 3.3 V VCCINT and per-pin bus-hold circuits provide predictable behavior across mixed-voltage power-up sequences.

Recommandé

XC3090L-6TQ176C · Xilinx XC1736A (Boot PROM for level-bridge bitstream)
🔧

Legacy Board Repair / Production Continuation

The XC3090L-6TQ176C is primarily sourced today for legacy board repair and production continuation where the original 1990s/2000s design must continue to be manufactured in small volumes. Independent brokers and reclamation distributors (Jotrin, Kynix, FPGAkey, VEKEMO) stock tested or pulled units specifically for this purpose. Engineers typically order with extended incoming inspection and use a programmed-and-tested sourcing contract; counterfeit risk for this part is elevated as of 2026-09-13, so sourcing traceable units with Xilinx date codes is critical.

Recommandé

XC3190A-6TQ176C (Direct XC3100A drop-in for repair inventory) XC1736A (Boot PROM to keep spares kits complete)

Récapitulatif des produits recommandés

XC1736A Serial configuration PROM for XC3090L boot Utilisé dans : Legacy 3.3V Glue-Logic Replacement, Retrocomputing Custom Peripheral Controller, 3.3V / 5V Mixed Logic Level Bridge, Legacy Board Repair / Production Continuation XC1765 Larger serial configuration PROM option Utilisé dans : Legacy 3.3V Glue-Logic Replacement, Industrial Parallel-to-Serial Converter XC3090L-100PC84C Xilinx Utilisé dans : Retrocomputing Custom Peripheral Controller, Educational FPGA Training Platform EPM9560RC240-20 Intel Utilisé dans : Industrial Parallel-to-Serial Converter XC3090L-125PC84C Xilinx Utilisé dans : Educational FPGA Training Platform XC3090L-6TQ176C Xilinx Utilisé dans : 3.3V / 5V Mixed Logic Level Bridge XC3190A-6TQ176C Direct XC3100A drop-in for repair inventory Utilisé dans : Legacy Board Repair / Production Continuation
What is the XC3090L-6TQ176C?
The XC3090L-6TQ176C is a Xilinx XC3000L low-voltage (3.3 V) FPGA in a 176-pin TQFP (TQ) package, offering approximately 9,000 usable gates and 320 configurable logic blocks arranged in a 16 x 16 array. It is the -6 speed grade and is built on 0.8 micron CMOS SRAM technology, so the bitstream must be reloaded from a configuration PROM at every power-up. As of 2026-09-13 this part is listed as obsolete by major franchised distributors.
Where can I buy the XC3090L-6TQ176C?
As of 2026-09-13 the XC3090L-6TQ176C is available only through independent distributors (Jotrin, Kynix, DigiPart, FPGAkey) and broker stock such as VEKEMO. Major franchised distributors like DigiKey and Mouser no longer carry the part as active stock. Pricing varies widely by test/condition; expect roughly $9.95 - $18.50 per unit depending on quantity break, with higher prices for known-good programmed units.
What is the price of the XC3090L-6TQ176C?
Obsolete Xilinx XC3000L parts typically price between $9.95 and $18.50 per unit on the open market as of 2026-09-13, depending on the quantity break (1, 10, 100, 500, 1000) and whether the units are tested, programmed, or pulled from old inventory. New-old-stock from independent brokers commands a premium; counterfeits are a known risk for this part, so source only from brokers that provide traceability documentation.
What is the lead time for the XC3090L-6TQ176C?
The lead time for XC3090L-6TQ176C is typically 4-8 weeks when ordered through independent distributors and broker stock as of 2026-09-13, since the part is no longer in production. Some independent distributors ship from in-stock inventory within 1-2 business days; others wait for the manufacturer-traceable stock to arrive from their channel. Plan ahead - do not assume same-day availability.
Is the XC3090L-6TQ176C in stock?
Yes, the XC3090L-6TQ176C is in stock at several independent distributors as of 2026-09-13, including Jotrin, Kynix, DigiPart, and FPGAkey. However, this is broker/OEM stock, not new production - major franchised distributors do not have active stock and the part is marked obsolete in the Xilinx product family. Quantities at each distributor are limited and may change daily.
What is the difference between the XC3090L and the XC3090?
The XC3090L is the low-voltage (3.3 V) variant of the XC3090 FPGA; the original XC3090 operates from 5 V. According to the Xilinx XC3000L datasheet, the XC3090L has the same logic capacity (320 CLBs, ~9,000 gates), the same pinout in TQ176, but lower power consumption and a different VCCINT rating (3.3 V vs 5 V). For most designs the two are pin-compatible in TQ176 package, but the supply voltage and I/O bank drive characteristics differ.
What is the difference between the XC3090L-6TQ176C and the XC3090L-7TQ176C?
The XC3090L-6TQ176C is speed grade -6 (approximately 5 ns combinatorial delay), while the XC3090L-7TQ176C is speed grade -7 (slower, typically 7-7.5 ns). Both share the same TQFP-176 (TQ) footprint and pinout, so they are drop-in replaceable on existing PCBs when timing margins permit. The -7 variant is generally cheaper on the broker market as of 2026-09-13.
When should I choose the XC3090L-6TQ176C over a modern FPGA?
Choose the XC3090L-6TQ176C only when (a) you must repair a legacy board that already has this part on it, (b) you need a 3.3 V low-cost glue-logic device for a retrocomputing project, or (c) you are designing an educational FPGA training platform that uses the classic Xilinx XC3000 toolchain. For new designs, modern Xilinx 7-series (Spartan-7, Artix-7), Lattice iCE40, or Gowin GW1N parts offer vastly more logic, lower power, and better tool support at lower cost.
Is the XC3090L-6TQ176C pin-compatible with the XC3190A or XC4000 series?
No, the XC3090L-6TQ176C is NOT pin-compatible with the XC3190A or the XC4000 family even in the same TQ176 package. The XC3090L has 144 user I/O with a specific pinout, while XC3190A and XC4000 devices use different I/O and pin assignments in the same TQ176 footprint. Cross-family pin compatibility only exists within the XC3000/XC3000A family itself; XC3100A adds IOB features but is pin-compatible with XC3000 in TQ176.
What is the best drop-in replacement for the XC3090L-6TQ176C?
The best drop-in replacement for the XC3090L-6TQ176C is the XC3090L-7TQ176C (same package, same logic, slower speed grade - pin-for-pin compatible). Another valid drop-in alternative is the XC3190A-6TQ176C for designs that need more logic, since the XC3190A is pin-compatible with the XC3090L in TQ176 (the XC3100A family extended pinout within the same footprint). Both come from the same Xilinx XC3000 toolchain and use the same bitstream format.
Where can I download the XC3090L datasheet PDF?
The Xilinx XC3090L datasheet PDF is available from the Xilinx legacy product archive and from third-party datasheet aggregators such as datasheet4u.com and digchip.com. According to the XC3090L datasheet index page at datasheet4u.com, the document covers functional description, pinout, configuration modes, timing, and DC/AC characteristics for the entire XC3090L family including the -6 speed grade TQ176 package. The official Xilinx archive PDF is the canonical source.
Where can I find the XC3090L-6TQ176C pinout?
The XC3090L-6TQ176C pinout is provided in the XC3090L family datasheet (TQ176 chapter), showing 144 user I/O pins plus dedicated configuration (M0/M1/M2), clock (CCLK), data (DIN/DOUT), and power/ground pins arranged in a TQFP-176 1.0 mm pitch package. Pin 1 is at the top-left corner with the standard TQFP dot marker, and pins are numbered counter-clockwise around the package perimeter.
What configuration memory does the XC3090L-6TQ176C need?
The XC3090L-6TQ176C uses SRAM-based configuration cells that are volatile, so a boot PROM is mandatory at every power-up. According to the Xilinx XC3000 family reference, a standard XC17xx series serial configuration PROM (e.g., XC1736A, XC1765) provides a one-time-programmed bitstream source, while a microcontroller can drive the serial DIN/CCLK pins directly for in-system reconfiguration. Plan for the boot PROM footprint when designing new PCB layouts.
Is the XC3090L-6TQ176C RoHS compliant?
The XC3090L-6TQ176C is a legacy 0.8 micron CMOS part from the 1990s and was originally released before RoHS took effect, so most XC3090L stock in circulation as of 2026-09-13 is NOT RoHS-certified. Some distributors advertise RoHS-compliant variants, but these are usually third-party re-tested units and not Xilinx-certified. For new RoHS-required designs, choose a modern FPGA family instead.
What are the key specifications engineers should know about the XC3090L-6TQ176C?
Engineers evaluating the XC3090L-6TQ176C should know six core facts: (1) 320 CLBs / ~9,000 usable gates; (2) 144 user I/O in TQ176 package; (3) 3.3 V VCCINT supply; (4) -6 speed grade with ~5 ns combinatorial delay; (5) SRAM-based volatile configuration that requires an XC17xx boot PROM; (6) obsolete lifecycle status with no RoHS certification. Source via trusted brokers only - counterfeits of this part are common.
Is there a Lattice or Altera equivalent for the XC3090L-6TQ176C?
No, there is no direct cross-brand drop-in replacement for the XC3090L-6TQ176C in the same TQ176 footprint. The Altera (now Intel) equivalent FPGAs of that era (FLEX 8000, FLEX 10K, MAX 7000) used different package pinouts and different bitstream formats. Cross-brand alternatives must be designed in on a new PCB footprint; only within-family Xilinx parts (XC3090L-7TQ176C, XC3100A, XC3190A in TQ176) are pin-compatible drop-ins.

Données de référence d'ingénierie pour XC3090L-6TQ176C — comparaison, recommandations de conception et informations de conformité.

Guide de sélection

Choose the XC3090L-6TQ176C when repairing a legacy 3.3 V Xilinx board that originally shipped with this exact part, or when designing a 3.3 V glue-logic replacement where the XC3000 toolchain (XACTstep / ISE WebPACK) is acceptable. Choose the XC3090L-7TQ176C if timing margins permit slower logic (saves broker cost). Choose the XC3190A-6TQ176C if you need more logic capacity and have a 5 V supply available. For new designs, prefer a modern 7-series or iCE40 FPGA unless you are constrained to the XC3000 toolchain.

Comparaison avec les alternatives

Paramètre Ce produit XC3090L-7TQ176C XC3090L-8TQ176C XC3190A-6TQ176C XC3195A-6TQ176C XC3090L-6PQ176C
Package TQFP-176 TQFP-176 - same TQFP-176 - same TQFP-176 - same TQFP-176 - same TQFP-176 (PQ176 code) - same
Brand Xilinx Xilinx Xilinx Xilinx Xilinx Xilinx
Family XC3000L XC3000L - same XC3000L - same XC3100A - extended family XC3100A - extended family XC3000L - same
Logic Cells (CLBs) 320 CLBs 320 CLBs 320 CLBs 484 CLBs 572 CLBs 320 CLBs
Usable Gates ~9,000 ~9,000 ~9,000 ~13,500 ~16,000 ~9,000
Speed Grade -6 -7 (slower) -8 (slower) -6 (same) -6 (same) -6 (same)
VCCINT Supply 3.3 V 3.3 V 3.3 V 5 V (XC3100A family) 5 V (XC3100A family) 3.3 V
User I/O Pins 144 144 144 144 (same TQ176) 144 (same TQ176) 144
Lifecycle Status Obsolete Obsolete Obsolete Obsolete Obsolete Obsolete

Principaux différenciateurs

  • Lowest cost speed-grade drop-in within XC3000L TQ176 (vs XC3090L-7TQ176C)
  • Stays within the XC3000L low-voltage family (3.3 V VCCINT) (vs XC3190A-6TQ176C)
  • Highest volume in the XC3090L family, broadest broker availability (vs XC3090L-8TQ176C)

Notes de conception

The XC3090L-6TQ176C requires a 3.3 V VCCINT supply that must ramp monotonically from 0 to 3.3 V within the datasheet-specified power-on reset time. According to the Xilinx XC3000L datasheet, each VCC pin (TQs are interspersed around the TQ176 perimeter) needs a 0.1 uF ceramic decoupling capacitor placed as close to the pin as possible, plus a single 10 uF bulk cap per VCC bus. Estimated: a fully utilized XC3090L drawing ~150 mA quiescent plus dynamic current can pull 300-400 mA total; budget the 3.3 V regulator for at least 500 mA headroom.

Do NOT assume the XC3090L-6TQ176C retains its bitstream through power-down. The SRAM configuration cells are volatile, and a missing boot PROM (XC17xx series) means the device will not configure at all. Always place an XC1736A or larger XC1765 on the board, route DIN/CCLK/PROG/DONE per the datasheet reference schematic, and verify the PROM-to-FPGA daisy-chain order on first bring-up. Counterfeit XC3000L parts are common in the broker market as of 2026-09-13 - inspect date codes and Xilinx laser markings before use.

Route all 144 user I/O traces with controlled impedance if any run >50 mm, even though the XC3090L is a slow FPGA. Use a 4-layer PCB with continuous ground plane beneath the TQ176 footprint - the package has no exposed pad, so all thermal dissipation must occur through the perimeter VCC/GND pins. Per the XC3000L datasheet, maintain at least 0.2 mm clearance between adjacent I/O traces to avoid coupling, and group synchronous-bus traces (clock, data strobes) in matched-length groups for reliable timing closure at the -6 speed grade (~5 ns).

Informations de conformité

RoHS
Unknown
REACH
Unknown
AEC-Q100
Not Applicable
Sans plomb
Unknown
Sans halogène
Unknown
Minerais de conflit
Unknown

XC3090L is a 1990s-vintage Xilinx part predating RoHS. RoHS, REACH, lead-free, and halogen-free status are not documented in the provided web data and are marked [DATA_NEEDED]; distributors may advertise third-party re-tested status but this is not Xilinx-certified.

Données vérifiées le : 2026-09-13 — données vérifiées et sélectionnées par l'équipe d'ingénierie composants de XAIPART

Recherches associées

XC3090L-6TQ176C datasheet XC3090L-6TQ176C price XC3090L-6TQ176C buy Xilinx XC3000L TQFP-176 FPGA XC3090L drop-in replacement XC3090L vs XC3190A XC3000L obsolete FPGA XC3090L-6TQ176C pinout TQ176 Xilinx XC3000 configuration PROM XC17xx what is the XC3000L family XC3090L-6TQ176C in stock 2026 3.3V 9000 gate FPGA TQFP-176

Composants & termes associés

Xilinx AMD (acquired Xilinx) XC3090L XC3090L-6TQ176C XC3090L-7TQ176C XC3090L-8TQ176C XC3190A XC3195A XC3000L XC3100A XC17xx boot PROM XC1736A XC1765 FPGA Logic Cell Array Configurable Logic Block (CLB) TQFP-176 TQFP CMOS SRAM boundary scan JTAG SelectMAP legacy programmable logic
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