MOSFET
제품 (1294)
BSZ068N06NSATMA1 - 60V, 6.8mΩ N-Channel OptiMOS 5 MOSFET | Infineon
The Infineon BSZ068N06NSATMA1 is an N-channel power MOSFET built on Infineon's OptiMOS™ 5 technology, rated for 60 V drain-source voltage and a maximum continuous drain current of 40 A (Tc), housed in a compact PG-TSDSON-8-FL (PQFN 3.3 x 3.3 mm) surface-mount package. Its headline parameters are a 60 V VDS rating, 6.8 mΩ maximum on-resistance, and 46 W power dissipation at TC, making it a benchmark for high-efficiency synchronous rectification in compact footprints. What is an N-channel power MOSFET? A metal-oxide-semiconductor field-effect transistor (MOSFET) is the workhorse switching device in modern power electronics. An N-channel MOSFET conducts electrons from drain to source when a positive gate-source voltage is applied. Low-voltage N-channel MOSFETs such as the BSZ068N06NS family form the synchronous-rectifier and high-side/low-side switch stages in buck converters, half-bridges, and full-bridges used in computing, telecom, and industrial power systems. Key features of the BSZ068N06NSATMA1 include 40 % lower RDS(on) than comparable legacy devices, a 40 % improvement in figure of merit (FOM = RDS(on) × Qg) over similar parts, RoHS compliance with halogen-free construction, and MSL1 moisture-sensitivity rating. The device is optimized for synchronous rectification, allowing 12 V and 24 V bus converters to achieve higher system efficiency than with previous-generation MOSFETs. The OptiMOS 5 process technology uses a trench-gate structure with an advanced epitaxial layer to minimize both conduction loss and switching loss. Compared with OptiMOS 3 predecessors, the BSZ068N06NSATMA1 halves conduction losses at full load and reduces gate charge by 30 %, enabling switching frequencies above 500 kHz without excessive driver loss. Typical applications include synchronous rectification in 12 V-48 V DC-DC converters, high-side/low-side switching in motor drives, OR-ing FETs in redundant power supplies, battery management for power tools and e-bikes, and hot-swap controllers in telecom boards. In each case, the 6.8 mΩ RDS(on) reduces I²R losses while the small TSDSON footprint saves PCB area. When designing with this MOSFET, ensure the gate driver can supply the miller plateau current (typically 4-6 A peak) and that the PCB layout minimizes parasitic source inductance to limit ringing. A 1 Ω gate resistor is recommended to dampen oscillations in low-side switch positions. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes that the bare manufacturer datasheet does not aggregate, helping engineers evaluate sourcing, second-source, and thermal trade-offs in a single view.
BSZ070N08LS5ATMA1 - 80V 7mΩ OptiMOS 5 N-FET | Infineon
The Infineon BSZ070N08LS5ATMA1 is an N-channel OptiMOS™ 5 power MOSFET in a logic-level variant, rated 80 V VDS max, 7 mΩ maximum RDS(on), and delivering 74 A continuous drain current at case temperature in a compact PG-TSDSON-8-FL (PQFN 3.3 x 3.3 mm) surface-mount package. This single-MOSFET combines Infineon's latest 80 V OptiMOS 5 silicon platform with a logic-level gate threshold, enabling direct drive from 4.5 V microcontrollers and buck-controller gate-drive outputs without an intermediate gate driver. The exposed lead-frame package (PG-TSDSON-8-FL) reduces package resistance while providing a thermal pad for bottom-side PCB cooling. According to the Infineon datasheet for the BSZ070N08LS5 family, the device is qualified for high-volume switching power applications with a maximum power dissipation of 69 W at Tc. A power MOSFET is a voltage-controlled semiconductor switch used in synchronous rectification, DC-DC conversion, and load switching. Within the broader taxonomy, this part belongs to: N-channel MOSFET -> enhancement-mode power MOSFET -> OptiMOS 5 family -> Infineon 80 V logic-level platform -> power-management discrete. The OptiMOS 5 generation targets lower RDS(on) per mm² and lower gate charge than prior OptiMOS generations, which directly improves conduction loss and switching loss in high-frequency SMPS designs. Key electrical features include a low 7 mΩ maximum on-resistance, a logic-level gate drive threshold for 4.5 V MCU compatibility, low Qg and Qgd figures that minimize driver losses, and an avalanche-rated body diode for robust handling of inductive transients. The PQFN 3.3 x 3.3 mm package provides low parasitic inductance and an exposed drain pad for direct PCB heatsinking. Compared with older OptiMOS 3 or STD-MOSFET equivalents, this part offers a noticeably lower figure-of-merit (FOM = RDS(on) × Qg), which is the principal engineering reason for its selection in modern high-density converters. Typical applications include synchronous buck converters for 48 V telecom and datacom rails, USB-PD and wireless-charging adapters, motor-drive half-bridges in battery-powered tools, and hot-swap / OR-ing switches on 12 V to 48 V distribution buses. The part's logic-level gate makes it particularly attractive as a low-side synchronous rectifier directly driven by a 5 V PWM controller. When designing with this device, gate-drive strength and dead-time optimization are critical: pair the BSZ070N08LS5ATMA1 with a gate driver capable of 1-2 A peak source/sink current, and minimize high-side/low-side dead-time to limit body-diode conduction losses. The exposed pad must be soldered to a sufficiently large copper pour to keep the junction temperature within the rated 150 °C maximum.
BSZ0901NSIATMA1 - 30V 40A OptiMOS N-MOSFET TSDSON-8 | Infineon
The Infineon BSZ0901NSIATMA1 is an N-channel power MOSFET built on Infineon's OptiMOS 25V platform, rated for 30 V VDS and delivering 25 A continuous drain current at 25 C case ambient (40 A at 25 C case / Tc) in a compact surface-mount PG-TSDSON-8-FL (also referenced as TSDSON EP 8-pin) package. The datasheet headline figures include 2.1 W power dissipation at Ta and 69 W at Tc, with the part supplied on 13-inch tape-and-reel per the ATMA1 suffix. What is an OptiMOS power MOSFET? OptiMOS is Infineon's trench-based power MOSFET family optimised for very low on-state resistance (RDS(on)) per unit silicon area and very low gate and output charge (Qg, Qoss). This class of N-channel MOSFETs is the standard building block for synchronous buck converters, load switches, hot-swap circuits and motor drive half-bridges in servers, datacom and telecom equipment where every milliohm of conduction loss and every nanosecond of switching loss translate directly into efficiency and thermal budgets. Key differentiating features of the BSZ0901NSIATMA1 are its 30 V drain-source rating that comfortably exceeds nominal 12 V bus rails with margin for transients, an extremely low gate charge that minimises driver losses at high switching frequencies, and the 3.3 mm x 3.3 mm PQFN/TSDSON footprint that places the source on the exposed pad for the lowest possible thermal impedance path. The part is designed specifically as the synchronous-rectifier or low-side switch in point-of-load DC/DC converters for computing and telecom hardware. Architecture-wise the device uses Infineon's OptiMOS trench cell technology with an integrated Schottky-like body diode optimised for synchronous-rectifier operation. Compared with older planar MOSFETs in the same footprint, this part typically cuts conduction losses in half at the same RDS(on) class and reduces switching losses by 30-50%, enabling higher-frequency operation (300 kHz to 1 MHz) without efficiency penalties in compact buck topologies. Typical applications include high-current synchronous buck converters on 12 V server and telecom rails, hot-swap / eFuse circuits on distributed backplanes, USB-PD and Type-C load switches, motor-drive low-side switches in 24 V industrial systems, and battery protection / OR-ing FETs in multi-cell Li-ion packs. The combination of 30 V rating, ultra-low Qg and the small TSDSON-8 footprint also makes it attractive for compact POL modules on FPGAs and SoCs. When designing with the BSZ0901NSIATMA1, observe the SOA carefully at high drain currents and low VDS, where thermal resistance dominates; in practice the part should be mounted on at least 1 square centimetre of copper pour on a 4-layer FR-4 board to stay within the 2.1 W Ta dissipation rating. The exposed pad is the main thermal and low-inductance source connection and must be soldered to the PCB land pattern specified in the manufacturer datasheet to achieve rated performance. This page synthesises distributor pricing from DigiKey, Mouser, LCSC and Arrow, drop-in TSDSON-8 alternatives, and practical design guidance not found in the bare datasheet.
BSZ0904NSIATMA1 - 30V 40A OptiMOS N-FET SyncFET | Infineon
The Infineon BSZ0904NSIATMA1 is an N-channel OptiMOS power MOSFET in the PG-TSDSON-8-FL (also referred to as PQFN 3.3x3.3, package code S308) optimized as a SyncFET for high-performance synchronous buck converters. Key headline parameters are a 30 V drain-source voltage rating, 40 A continuous drain current at Tc, and a maximum on-state resistance of 4 mΩ at VGS=4.5 V, all packaged in a thermally-enhanced 8-pin TSDSON with exposed pad. A MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) is a voltage-controlled three-terminal device used for switching and amplification. OptiMOS is Infineon's power MOSFET technology family targeting high-frequency, high-efficiency DC-DC conversion. SyncFETs are specifically designed low-side MOSFETs used in synchronous buck topologies, where their low Qg and integrated Schottky-like diode minimize switching losses and body-diode reverse-recovery losses. Within the power-semiconductor taxonomy, this places the part under: power MOSFET -> N-channel MOSFET -> OptiMOS 30V family -> discrete semiconductor. Differentiating features include the integrated monolithic Schottky-like diode that suppresses body-diode conduction and reduces dead-time losses, very low RDS(on) of 4 mΩ max at 4.5 V drive, 100% avalanche-tested ruggedness, JEDEC-qualified for target applications, Pb-free lead plating, RoHS compliance, and halogen-free molding compound. The 8x8 mm land pattern of the PG-TSDSON-8-FL gives a 3.3x3.3 mm body with a large exposed thermal pad enabling superior RthJC of typically 1.5 C/W. Typical applications include voltage regulator solutions in servers, datacom, telecom, and high-current point-of-load converters where OptiMOS 30V offers the lowest on-state resistance in small-footprint packages. The Infineon datasheet positions the part for demanding high-frequency buck converters where switching losses dominate. When designing with this device, prioritize a 4.5 V gate drive when possible to take full advantage of the lowest RDS(on), and place the gate-driver loop within a few millimeters to minimize parasitic inductance and ringing on the gate node. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.
BSZ0909NSATMA1 - 34V 36A N-Channel OptiMOS 25V MOSFET | Infineon
The Infineon BSZ0909NSATMA1 is an N-Channel OptiMOS 25V power MOSFET rated for 34V VDS and 9A continuous drain current (36A pulsed at TC), housed in the compact PG-TSDSON-8 (8-PowerTDFN) surface-mount package with integrated Schottky-like body diode. It is offered with 12 mOhm maximum R-DS(on) at VGS=10V and 17 nC total gate charge, and features 2.1 W power dissipation at TA=25C rising to 25 W at TC=25C. An N-Channel MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) is a voltage-controlled majority-carrier device that uses a positive gate-source voltage to create an n-type inversion channel between drain and source. Within the broader power-semiconductor taxonomy, the BSZ0909NSATMA1 sits as: N-Channel MOSFET -> enhancement-mode power MOSFET -> power transistor -> discrete semiconductor. OptiMOS is Infineon's low-voltage power-MOSFET platform tuned for synchronous rectification, hot-swap, OR-ing, and point-of-load switching. Key differentiating parameters include an ultra-low 1.31 nF C-iss at 15V VDS for fast switching edges, a 2V gate-source threshold for clean logic-level drive from 3.3V / 5V microcontrollers, and the TSDSON-8 footprint that occupies roughly 3.3 x 3.3 mm with a thermally efficient exposed pad. The device is qualified across -55C to +150C junction temperature and ships as RoHS-compliant. Typical applications for BSZ0909NSATMA1 include synchronous buck converters in servers, datacom and telecom Point-of-Load (POL) rails, DC motor drive stages, USB-PD and battery protection FETs, hot-swap controllers, and low-side load switches. In each case the 12 mOhm R-DS(on) minimises conduction loss while 17 nC Qg keeps gate-driver losses low at high switching frequencies. The most important design consideration is thermal management. Because the TSDSON-8's copper pad is the only effective heatsink, a multi-layer PCB with flooded top-layer copper directly under the exposed pad is required to keep Tj below 150C under continuous load. Designers must also respect SOA boundaries during pulsed load transients such as inrush or hot-plug events. This page combines verified distributor pricing, parametric cross-references, and application-specific design guidance curated specifically for power-electronics engineers evaluating OptiMOS-class parts for 25V-30V rails.
BSZ096N10LS5ATMA1 - 100V 9.6mΩ OptiMOS 5 N-Channel MOSFET | Infineon
The Infineon BSZ096N10LS5ATMA1 is an N-channel power MOSFET built on Infineon's OptiMOS 5 technology, rated for 100 V drain-to-source voltage with a typical on-resistance of 9.6 mΩ at VGS=10 V. It is housed in a PG-TSDSON-8-FL surface-mount package (also described as PQFN 3.3 x 3.3 mm) and is logic-level compatible with a VGS(th) in the low single-volt range, allowing direct drive from microcontrollers and gate-driver ICs. Continuous drain current is rated at 40 A at TC=25 °C with a maximum power dissipation of 69 W, and the ID max (silicon-limited) is listed at 62 A on the Infineon product family page. The suffix "ATMA1" denotes tape-and-reel packaging for high-volume SMT assembly. A power MOSFET is a voltage-controlled semiconductor switch that converts electrical energy efficiently by toggling between a low-resistance conducting state and a high-resistance blocking state. N-channel MOSFETs use electrons as the majority charge carrier and are preferred for low-side or high-side switching because their lower RDS(on) per unit silicon area delivers higher efficiency than P-channel equivalents at the same voltage class. OptiMOS 5 represents Infineon's fifth-generation trench MOSFET platform, optimised for low RDS(on) × Qg figure-of-merit, low gate charge, and improved thermal performance versus prior generations. This positions the BSZ096N10LS5 within the broader product hierarchy: N-channel MOSFET -> power MOSFET -> discrete semiconductor -> power management component. Key differentiating features of the BSZ096N10LS5ATMA1 include an industry-leading 9.6 mΩ maximum RDS(on) at 10 V VGS, integrated ESD protection on the gate, an optimised body diode for reduced switching losses, and a logic-level gate drive threshold that simplifies interface to 3.3 V microcontrollers. The PG-TSDSON-8-FL package exposes a large metal pad on the underside for thermal dissipation, enabling high continuous current handling in a footprint of roughly 3.3 x 3.3 mm. Typical applications include synchronous rectification in telecom and server DC-DC converters, hot-swap and OR-ing circuits in 48 V power distribution, motor drive half-bridges in industrial automation, high-side load switching in USB-PD adapters, and wireless-charging power stages. The OptiMOS 5 platform's combination of low RDS(on) and small Qg makes the part especially attractive where both conduction and switching losses must be minimised at high switching frequencies. When designing with this device, derate power dissipation based on the actual PCB copper area and ambient temperature, since the 69 W rating assumes TC=25 °C and the thermal pad must be fully soldered with thermal vias to an inner copper plane. The body diode's reverse recovery is characterised in the datasheet, but for hard-switched bridge topologies an external Schottky or SiC diode may still be advisable to minimise dead-time losses.
BSZ0994NSATMA1 - 30V 13A N-Channel OptiMOS 5 MOSFET | Infineon
The Infineon BSZ0994NSATMA1 is an N-channel enhancement-mode power MOSFET built on Infineon's OptiMOS 5 30V trench technology, rated for 30V VDS and 13A continuous drain current (Ta) in a compact 8-pin PG-TSDSON-8-25 (5x6 mm) surface-mount package with exposed thermal pad. The device is part of the OptiMOS 5 30V product family, which targets benchmark power density and energy efficiency in both standby and full-load operation. A power MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) is a voltage-controlled semiconductor switch used in power-conversion circuits. Within the broader hierarchy, MOSFETs belong to discrete semiconductors -> transistors -> field-effect transistors -> power MOSFETs, and are the workhorse switching element inside synchronous buck converters, load switches, hot-swap circuits, and motor-drive half-bridges. OptiMOS 5 represents Infineon's fifth-generation trench MOSFET process, optimized for low on-state resistance, low gate charge, and low figure-of-merit (FOM) to minimize conduction and switching losses. The BSZ0994NSATMA1 features a very low typical on-resistance (in the single-digit milliohm range per the OptiMOS 5 30V family datasheet) and a low gate charge, achieving best-in-class FOM for synchronous rectification in point-of-load converters. The device is housed in a source-down (PG-TSDSON-8-25) package, which keeps the source potential on the exposed pad for direct PCB heatsinking, reducing RthJA and simplifying thermal layout. Its 30V VDS rating provides ample headroom for 12V bus rails with transient tolerance up to automotive load-dump conditions. Typical applications include synchronous buck converters in computing and telecom, DC-DC point-of-load modules, OR-ing and hot-swap controllers, battery management protection circuits, and high-frequency motor-drive switches. The 30V class also suits 19V laptop adapters and USB-PD source designs. When designing with this part, ensure the gate driver can deliver sufficient peak current to charge the gate charge within the target switching period, and follow the recommended PG-TSDSON-8-25 land pattern with thermal vias beneath the exposed pad to minimize junction-to-ambient thermal resistance. This page synthesizes distributor pricing, drop-in OptiMOS 5 alternatives, and practical PCB layout guidance not found in the manufacturer datasheet alone.
BSZ100N03MSGATMA1 - 30V N-Ch OptiMOS 40A TSDSON-8 MOSFET | Infineon
The Infineon BSZ100N03MSGATMA1 is an N-channel OptiMOS power MOSFET rated for 30 V VDS, 40 A continuous ID (at TC) and 10 A (at TA), in a compact PG-TSDSON-8 (5x6 mm) surface-mount package. Part of Infineon's OptiMOS 25V/30V family, it combines ultra-low gate and output charge with very low on-state resistance, making it optimized for 5 V gate-drive synchronous rectification in DC-DC converters, notebook POL rails, VGA cores, and server/datacom voltage-regulator modules. A power MOSFET is the fundamental switching element in modern switch-mode power supplies (SMPS); in SMPS taxonomy, it sits under synchronous rectifier -> power MOSFET -> discrete semiconductor -> power management IC. The OptiMOS family is specifically engineered for low-voltage, high-frequency step-down converters where conduction loss, switching loss and figure-of-merit (FOM = RDS(on) x Qg) dominate system efficiency. The BSZ100N03MS uses trench MOSFET technology, which reduces cell pitch and on-resistance per unit silicon area. Key features include a typical RDS(on) in the single-digit milliohm range at VGS=10 V, low gate charge Qg for fast switching transitions, integrated body diode for synchronous-rectifier operation, and 100% avalanche-tested ruggedness per JEDEC target-application qualification. Pb-free plating, halogen-free molding compound per IEC 61249-2-21, and RoHS compliance make it suitable for environmentally restricted designs. The device is qualified to JEDEC standards for target applications, supports superior thermal resistance through its exposed-die TSDSON pad, and is rated for 2.1 W power dissipation at TA and 30 W at TC, enabling compact high-density layouts. Compared to standard MOSFETs, the low FOM enables higher switching frequencies (multi-MHz operation), reducing the size of inductors and output capacitors in the surrounding converter. Typical applications include high-efficiency synchronous buck converters in servers, datacom/telecom point-of-load (POL) regulators, notebook voltage rails, USB-PD and DC-DC modules, and motor-drive low-side switches. In SMPS designs, two BSZ100N03MS devices typically form a half-bridge: one as the high-side control FET and one as the low-side synchronous rectifier. When designing with this part, place it on a substantial copper pour (typically >6 cm² drain area on FR4) to achieve the rated thermal performance, keep the gate-drive loop compact to minimize switching loss, and ensure VGS does not exceed the ±20 V absolute maximum. Avoid body-diode conduction under continuous high dV/dt, as this can trigger unwanted turn-on in the high-side FET. This page synthesizes distributor pricing, parametric drop-in alternatives, and practical layout/thermal design notes that are not collated in the manufacturer datasheet alone, providing distinct value for engineers selecting a 30 V N-channel MOSFET in TSDSON-8.
BSZ110N08NS5ATMA1 - 80V 40A OptiMOS 5 N-MOSFET | Infineon
The Infineon BSZ110N08NS5ATMA1 is an N-channel power MOSFET built on Infineon's OptiMOS™ 5 technology, rated at 80 V drain-to-source voltage, 40 A continuous drain current (at Tc), and 11 mΩ maximum on-resistance. Housed in a space-saving PG-TSDSON-8-FL (PQFN 3.3 x 3.3) surface-mount package, it is engineered for synchronous rectification, DC-DC conversion, and high-frequency switching applications. A MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) is a voltage-controlled switch used to efficiently route and regulate power in electronic circuits. Within the broader semiconductor taxonomy, MOSFETs fall under discrete semiconductors -> transistors -> MOSFETs -> power MOSFETs. OptiMOS 5 represents Infineon's fifth-generation low-voltage power MOSFET platform, offering up to 44% reduction in both output capacitance and on-resistance versus prior generations, delivering higher system efficiency in a smaller footprint. Key features include an ultra-low RDS(on) of 11 mΩ max at VGS=10 V, optimized gate charge for high-frequency operation, and a power dissipation rating of 50 W at Tc. The PQFN 3.3 x 3.3 package provides an exposed thermal pad that minimizes junction-to-case thermal resistance, enabling sustained high-current operation without external heatsinking in typical application conditions. The device is rated for operation with case temperatures maintained per the derating diagram. The device is targeted specifically at synchronous rectification in switch-mode power supplies (SMPS), server and telecom DC-DC buck converters, and battery management systems. The optimized intrinsic body diode and low Qrr support reliable hard-switching and soft-switching topologies. The combination of low on-resistance and low gate charge makes it ideal for both the low-side and high-side positions in half-bridge and full-bridge converter stages. Typical applications include 48 V telecom bus converters, point-of-load (POL) regulators for processors and FPGAs, motor drive H-bridges, and eMobility battery protection circuits. The 80 V rating provides ample headroom for 12 V and 24 V automotive systems, while the 40 A current capability addresses high-current rail requirements in industrial and server power architectures. When designing with this part, ensure the PCB layout places the source pad directly over a copper thermal via array to the inner ground plane. The exposed pad must be soldered to achieve the rated thermal performance; insufficient thermal vias will cause excessive junction temperature rise at full load.
BSZ120P03NS3GATMA1 - -30V P-Ch 12mOhm OptiMOS P3 MOSFET | Infineon
Infineon BSZ120P03NS3GATMA1 is a -30 V P-channel OptiMOS P3 power MOSFET housed in a PG-TSDSON-8 (PQFN 3.3 x 3.3) surface-mount package. It is rated for -11 A continuous drain current at TA=25C (Tc up to -40 A) with typical on-resistance of 12 mOhm at VGS=-10 V, delivering low conduction loss for high-side load switching in compact PCB footprints. The OptiMOS P3 process technology provides excellent figure-of-merit (FOM = RDS(on) x Qg) for both switching and linear-region applications. A P-channel MOSFET is a metal-oxide-semiconductor field-effect transistor in which the body and drain are formed in an n-well, and conduction is by holes rather than electrons. P-channel parts simplify high-side switching because the device can be placed between the load and ground, allowing direct gate drive from logic-level signals without a charge pump in many topologies. This places P-channel MOSFETs in the hierarchy: MOSFET -> discrete semiconductor -> power switch -> power management. Key features include 12 mOhm maximum RDS(on) at VGS=-10 V, fast switching performance optimized by the OptiMOS P3 generation, low gate charge (Qg) for reduced driver loss, and an integrated ESD-protected gate structure. The 3.3 x 3.3 mm PQFN package has a small thermal pad that delivers low RthJA, allowing the part to dissipate 2.1 W on a standard 1-inch copper pad with adequate airflow, and 52 W on the die itself at Tc=25C. In application, the BSZ120P03NS3GATMA1 is typically used as a high-side load switch between a 5 V, 12 V or up to 24 V supply rail and the load, with a logic-level gate drive between 0 V and VCC. Its P-channel polarity eliminates the need for a bootstrap supply in many half-bridge and reverse-polarity protection circuits. Designers must respect SOA curves at low VDS, where silicon P-channels are inherently less rugged than N-channel counterparts. Typical applications include USB VBUS load switching, battery charging and power-path management, reverse-polarity protection in industrial and automotive subsystems, hot-swap controllers, motor and solenoid drivers, and LED matrix drivers. The wide VDS range and low gate charge also make it suitable for OR-ing diodes in redundant power systems. When designing with this device, ensure the VGS drive rail comfortably exceeds the VGS(th) (typ. -1.7 V) under worst-case cold conditions; at room temp a -3.3 V GPIO can fully enhance the part. Use a 10 kohm gate-source resistor to prevent unintended turn-on during transients, and respect SOA at low VDS for inductive loads. This page synthesizes distributor pricing, drop-in alternatives from the Infineon OptiMOS P3 family and qualified cross-brand substitutes, and practical thermal/layout design notes not found in the manufacturer datasheet alone.
BSZ130N03LSGATMA1 - 30V OptiMOS N-FET, 35A, PG-TSDSON-8 | Infineon
The Infineon BSZ130N03LSGATMA1 is an N-channel 30 V OptiMOS power MOSFET in the PG-TSDSON-8 (8-PowerTDFN) surface-mount package, rated for 10 A continuous drain current at 25 C ambient (Ta) and 35 A continuous drain current at 25 C case (Tc), with a maximum on-state resistance of 13 mOhm at VGS=10 V, ID=20 A and a typical gate threshold of 2.2 V at VGS=250 uA. Power dissipation is rated at 2.1 W (Ta) and 25 W (Tc), allowing compact high-current designs without external heatsinking at moderate loads. A power MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) is a voltage-controlled three-terminal switch used for switching and amplifying signals in power-conversion circuits. N-channel enhancement-mode MOSFETs are the dominant switch element in synchronous buck converters, low-side load switches, and DC-DC power stages because they offer low on-resistance, fast switching, and easy gate drive from standard logic-level or 10 V drivers. The BSZ130N03LSGATMA1 belongs to the OptiMOS 25V/30V family, a hierarchy of Infineon trench MOSFETs positioned between standard planar MOSFETs and higher-voltage OptiMOS 60V/80V/100V/120V/200V families for optimized low-voltage, high-current applications. Key features include an extremely low on-state resistance of 13 mOhm maximum at 10 V VGS, ultra-low gate charge Qg and output charge Qoss for minimal switching losses, a logic-compatible gate drive threshold, and an exposed-drain PG-TSDSON-8 package that provides a very low thermal resistance path from junction to PCB. These characteristics deliver high efficiency in high-frequency switching converters where both conduction loss (I2Rds(on)) and switching loss (proportional to Qg x Vdrive x fsw) directly impact total power loss. The OptiMOS 25V/30V silicon uses an advanced trench cell architecture that minimizes cell pitch while maintaining high avalanche ruggedness and low Qrr for synchronous-rectifier duty. The PG-TSDSON-8 (5 mm x 6 mm outline) package places the drain tab on the bottom of the package, allowing direct thermal sinking into the PCB copper pour and providing a Kelvin-source connection on pin 5 for cleaner gate drive. Typical applications include voltage regulator modules (VRMs) for servers, datacom and telecom point-of-load converters, synchronous rectification in 12 V buck and multi-phase VR topologies, DC-DC converter power stages, hot-swap and load-switch circuits, and battery protection in portable systems. The 30 V drain-source rating provides ample headroom above 12 V rails normally encountered in these systems. When designing with this device, ensure that the PCB thermal copper area (top-side copper plus via array to internal planes) is sized to keep junction temperature below 150 C at worst-case continuous load. For switching applications, keep the gate-drive loop (gate driver, gate resistor, source return) area minimal to avoid parasitic ringing on Vgs. This page synthesizes distributor pricing from DigiKey, Mouser, Octopart, and LCSC, pin-compatible drop-in alternatives from Infineon's OptiMOS family and from cross-brand equivalents in the Verified Web Data, and practical design notes not found in the manufacturer datasheet alone.
BSZ150N10LS3GATMA1 - 100V N-Ch OptiMOS 3 MOSFET | Infineon
The Infineon BSZ150N10LS3GATMA1 is an N-channel 100 V OptiMOS 3 power MOSFET rated for 40 A continuous drain current (Tc) and 15 mΩ maximum on-resistance (RDS(on)) in a compact PG-TSDSON-8 (PQFN 3.3 x 3.3 mm) surface-mount package. The part is specified for 2.1 W dissipation at TA=25 °C and 63 W at Tc=25 °C, making it well suited to high-efficiency, high power-density SMPS stages where board area is constrained. According to the Infineon product family description, this OptiMOS 3 generation achieves roughly 30 % lower RDS(on) and 30 % better figure of merit than the previous technology generation. A power MOSFET is a voltage-controlled semiconductor switch that uses a gate field to modulate current flow between the source and drain terminals. N-channel enhancement-mode MOSFETs such as this part are the workhorse switching element in synchronous buck/boost converters, half-bridges, and full-bridges on the low-side position, where their low gate charge and low on-resistance translate directly into lower conduction and switching losses. Within the broader component hierarchy, MOSFETs sit under discrete semiconductors, then transistors, then power switches, and ultimately under the power-management umbrella of a complete electronic system. Key differentiating features of the BSZ150N10LS3GATMA1 include 100 V drain-source voltage, 40 A continuous drain current, 15 mΩ maximum RDS(on) at VGS=10 V, an ultra-low on-resistance per unit area thanks to the OptiMOS 3 trench process, an exposed drain pad (PG-TSDSON-8) for very low thermal resistance, and a logic-level compatible gate threshold range. The part is also RoHS compliant and supports lead-free reflow profiles up to 260 °C peak. From an architectural standpoint, the PG-TSDSON-8 (Power-TDFN) package places the silicon die on an exposed lead-frame paddle that doubles as the drain connection, so the entire bottom of the package acts as a thermal path to the PCB copper. This drastically shrinks the RthJA versus traditional SO-8 packages and enables the 63 W Tc rating in a footprint of only about 3.3 x 3.3 mm. The OptiMOS 3 cell structure also provides excellent body-diode ruggedness, which matters for synchronous-rectifier and bridge applications where the intrinsic diode carries current during dead-time. Typical applications include high-frequency DC/DC converters, synchronous rectification in 48 V telecom and server power supplies, motor-drive H-bridges (12 V / 24 V / 48 V systems), battery management and protection FETs, hot-swap and e-fuse circuits, and Class-D audio amplifier output stages. The 100 V rating also makes it attractive for industrial 24 V/36 V bus converters where inductive voltage transients must be tolerated. When designing with this MOSFET, pay close attention to gate-drive voltage: the OptiMOS 3 family is specified for 10 V VGS to reach its lowest RDS(on), and at 4.5 V VGS the on-resistance rises noticeably. Also plan thermal copper area under the exposed pad — the 2.1 W TA rating is only achievable with a properly designed PCB land pattern, and derate aggressively above 25 °C ambient. This page synthesizes distributor pricing, same-brand and cross-brand drop-in alternatives, and practical design notes that go beyond the manufacturer datasheet to help engineers select, source, and apply the BSZ150N10LS3GATMA1 with confidence.
BSZ15DC02KDHXTMA1 - 20V Complementary N+P MOSFET | Infineon
The Infineon BSZ15DC02KDHXTMA1 is a 20V complementary power MOSFET in the OptiMOS™2 + OptiMOS™-P2 family, integrating one N-channel and one P-channel transistor in a common-drain TSDSON-8 (PG-TSDSON-8-FL) package. The N-channel device is rated at 5.1 A continuous drain current with a maximum RDS(on) of about 30 mΩ (per datasheet title block), while the P-channel device is rated at 3.2 A continuous drain current with RDS(on) of about 55 mΩ, and the total package power dissipation is 2.5 W at 25 °C. What is a complementary MOSFET pair? A complementary MOSFET array is a single package that contains both an N-channel and a P-channel enhancement-mode transistor, wired in a common-drain (back-to-back) or half-bridge topology. These parts sit inside the discrete semiconductor -> MOSFET -> power MOSFET hierarchy, and they exist to give designers a compact bidirectional switch or load-driver building block without having to place two separate single SO-8 devices side by side. Key features include a Super Logic level gate drive rating of 2.5 V, full enhancement-mode operation, avalanche ruggedness, and 175 °C maximum operating junction temperature. The part is qualified to AEC-Q101, lead-free (Pb-free), and RoHS compliant. With both polarities in one tiny 3.3 × 3.3 mm PQFN/TSDSON outline, it is intended for high-density portable and automotive loads. Typical applications include battery protection and load switching in smartphones and wearables, USB On-The-Go (OTG) and charger-path switches, small DC motor half-bridges, LED backlight drivers, and automotive body-control modules. The 2.5 V gate rating makes it directly compatible with 1.8 V/3.3 V microcontrollers, removing the need for a charge pump or level shifter. For thermal design, the 2.5 W rating assumes a JESD51-standard 4-layer test board with sufficient copper under the exposed pad. On a smaller footprint or single-layer board, derate proportionally. The common-drain pinout means source1 and source2 are bonded to pins 5/6/7/8, so the schematic symbol must reflect the dual-source layout shown in the manufacturer datasheet. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes that go beyond what the manufacturer datasheet alone provides.
BSZ180P03NS3EGATMA1 - 30V P-Channel OptiMOS P3 MOSFET | Infineon
The Infineon BSZ180P03NS3EGATMA1 is a P-channel power MOSFET built on Infineon's OptiMOS P3 process technology, rated for -30V VDS and delivering continuous drain current of 9 A (Ta) / 39.5 A (Tc) in a compact PG-TSDSON-8 (PQFN 3.3 x 3.3) surface-mount package. It features a maximum on-state resistance of 18 mΩ at VGS = -10 V, with low gate charge and figure-of-merit characteristics tuned for high-efficiency switching applications. A P-channel MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) is a voltage-controlled transistor where the drain-source channel is activated by applying a negative gate-source voltage. P-channel devices belong to the broader transistor hierarchy (MOSFET -> FET -> discrete semiconductor -> active component) and are commonly used on the high-side of a load when driven by low-voltage logic, eliminating the need for a bootstrap or charge-pump driver that an N-channel high-side switch would require. Key features include low RDS(on) of 18 mΩ maximum, an operating temperature range of -55°C to +150°C junction, fast switching performance with low gate charge QG, and RoHS-compliant lead-free PG-TSDSON-8 (PQFN 3.3x3.3) packaging. The OptiMOS P3 platform minimizes conduction and switching losses simultaneously, making it suited for both hard-switched and resonant topologies. The exposed-drain pad enables direct PCB thermal dissipation, supporting the 2.1 W (Ta) / 40 W (Tc) power dissipation envelope. Typical applications include load switching in portable and battery-powered devices, high-side OR-ing in redundant power systems, USB power distribution, battery management in notebooks and tablets, and motor/relay driver circuits in industrial and consumer equipment. The 3.3 x 3.3 mm PQFN footprint also enables high power density in space-constrained designs such as wearables and IoT endpoints. When designing with this part, ensure the gate drive voltage is sufficient to fully enhance the channel (VGS = -10 V recommended for the lowest RDS(on)) and keep the gate-source voltage within the absolute maximum ratings. Pay attention to avalanche energy limits and thermal copper-pour area to avoid exceeding the 150°C junction temperature.
BSZ215CHXTMA1 - 20V N+P Complementary MOSFET | Infineon
The Infineon BSZ215CHXTMA1 is a complementary N-channel and P-channel power MOSFET array housed in a PG-TSDSON-8 (PQFN 3.3 x 3.3) surface-mount package, with a 20V drain-source rating and 2.5W power dissipation capability. The N-channel section supports up to 5.1A continuous drain current and the P-channel section up to 3.2A, making this dual MOSFET ideal for compact synchronous buck/boost converters where complementary high-side and low-side switching is required. What is a complementary MOSFET array? A complementary MOSFET array integrates an N-channel and a P-channel enhancement-mode MOSFET within a single package, allowing designers to implement half-bridge, full-bridge, or push-pull switching topologies without placing two discrete transistors. As part of Infineon's OptiMOS low-voltage family, these parts sit within the broader MOSFET taxonomy: MOSFET -> enhancement-mode FET -> power semiconductor -> discrete semiconductor, and serve as fundamental building blocks of power conversion. Key features of the BSZ215CHXTMA1 include OptiMOS technology for low on-state resistance, enhancement-mode operation, AEC-Q101 automotive qualification, 100% lead-free construction, full RoHS compliance, and avalanche-rated ruggedness. The complementary die architecture allows circuit designers to use a single part for both high-side and low-side switches in synchronous converters, reducing PCB area, BOM count, and parasitic inductance. The BSZ215CHXTMA1 belongs to Infineon's low-voltage OptiMOS family, the market leader in high-efficiency solutions for power generation (solar micro-inverters), power supply (servers and telecom), and electric vehicle power consumption. Maximum on-state resistance is 55 mOhm on each channel (per Infineon product brief), with low gate charge enabling fast switching transitions suitable for high-frequency DC-DC converters above 1 MHz. Typical applications include synchronous buck/boost DC-DC converters, half-bridge motor drive stages, battery protection circuits, load switching, USB Type-C power delivery switches, and PoL (Point-of-Load) regulators in telecom and server systems. The combination of small package footprint and complementary channels enables compact power designs where board real estate is at a premium. When designing with this part, place both input and bootstrap capacitors as close to the gate and source pins as possible to minimize parasitic inductance, and ensure the gate-drive voltage respects the Vgs(th) rating of both channels. The exposed pad must be soldered to a sufficiently large copper pour to keep junction temperature within the -55C to +150C operating range. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet, providing engineers with a single source for selection, sourcing, and design-in guidance.
BSZ340N08NS3GATMA1 - 80V 23A OptiMOS 3 | Infineon
Infineon Technologies BSZ340N08NS3GATMA1 is an 80 V N-channel power MOSFET using OptiMOS 3 technology, rated for 6 A at Ta and 23 A at Tc, with RDS(on) up to 34 mOhm at 10 V and 12 A. It is supplied in a surface-mount PG-TSDSON-8 package. A power MOSFET is a voltage-controlled semiconductor switch that uses an insulated gate to control current between its drain and source. This N-channel device belongs to the MOSFET, discrete semiconductor, and power-switch hierarchy. Low RDS(on) reduces conduction loss, while the 80 V drain-source rating supports common low-voltage power-conversion, load-switch, and motor-control circuits. Key verified features include a maximum drain-source voltage of 80 V, maximum drain current of 6 A at Ta and 23 A at Tc, and RDS(on) of 34 mOhm at VGS = 10 V and ID = 12 A. The listed gate threshold is 3.5 V at 12 uA, total gate charge is 9.1 nC at 10 V, and output capacitance is 630 pF at 40 V. Its junction-temperature range is -55C to +150C. The OptiMOS 3 process targets low resistance and high switching efficiency in compact power stages. The PG-TSDSON-8 construction provides a small surface-mount footprint, but the exposed thermal pad and PCB copper must be used to remove heat. The listed ambient and case power dissipation values are 2.1 W at Ta and 32 W at Tc, subject to the manufacturer’s specified test conditions. Typical applications include DC-DC converters, synchronous rectifiers, motor drivers, battery power paths, load switches, and compact consumer or industrial equipment. The 80 V rating is appropriate for low-voltage rails, but designers must account for switching transients, gate drive voltage, current pulses, and junction temperature. Layout is critical in high-current switching circuits. Place the gate resistor and driver close to the gate, provide a low-induction source return, use multiple PCB vias for the exposed pad, and keep the switching loop small. Confirm RDS(on) at the actual gate voltage rather than assuming the 10 V condition applies to a 4.5 V or 5 V drive. This product page combines verified distributor and manufacturer data with application guidance, replacement criteria, and design notes. It emphasizes the distinction between a datasheet replacement and a truly pin-compatible, thermally valid drop-in MOSFET.
BSZ900N20NS3GATMA1 - 200V N-Ch MOSFET 15.2A | Infineon OptiMOS 3
The Infineon BSZ900N20NS3GATMA1 is a 200V N-channel power MOSFET built on Infineon's OptiMOS 3 technology, rated for 15.2A continuous drain current (Tc) and 62.5W power dissipation (Tc) in a surface-mount PG-TSDSON-8 (TDSON-8) package. It targets high-efficiency switching applications with a typical RDS(on) of 77 mΩ at VGS = 10 V, making it one of the lowest on-resistance 200V parts in its footprint class. A power MOSFET is a voltage-controlled semiconductor switch that regulates or converts power by rapidly toggling between low-resistance (on) and high-resistance (off) states. Within the power-semiconductor hierarchy it sits below IGBTs and above signal FETs, and within a switching power supply it typically performs either the high-side switch, low-side synchronous rectifier, or both. The OptiMOS 3 family specifically optimizes the figure of merit (FOM = RDS(on) × Qg) for 100V-300V rails, balancing conduction loss against switching loss in hard-switched topologies. Key features of the BSZ900N20NS3GATMA1 include 200V VDS, 15.2A continuous ID at 25°C case temperature, 77 mΩ RDS(on) max at VGS = 10 V, integrated ESD protection, and a logic-level compatible gate drive threshold. The TDSON-8 FL package exposes the drain tab for direct PCB cooling, providing a typical RthJA of 50 C/W on a standard 1 oz copper 1 sq inch pad — sufficient for the 62.5W Tc rating without an external heatsink in typical 48V-rail applications. The OptiMOS 3 cell architecture uses a trench-gate structure with a 200V-rated epitaxial layer, achieving low specific on-resistance while maintaining avalanche ruggedness. The part is characterized for both continuous-conduction and zero-voltage-switching (ZVS) operation, and its low Qrr supports use as a synchronous rectifier in 48V telecom bus converters, where reverse-recovery loss dominates at high switching frequencies (typically 100-300 kHz). Typical applications include synchronous rectification in 48V systems, isolated and non-isolated DC-DC converters (full-bridge, half-bridge, and active-clamp forward topologies), uninterruptible power supplies (UPS), motor-drive inverters for DC motors, and solar micro-inverters. The 200V rating provides 30% headroom above standard 48V and 60V telecom and industrial bus voltages, allowing safe operation under transient spikes. When designing with this device, ensure the gate-driver supply swings at least 10V for full RDS(on) rating, and place the gate-drive loop area minimal to avoid ringing. The exposed pad (drain) must be soldered to a sufficiently large copper pour (≥1 sq inch) to achieve the rated thermal performance; otherwise the device will derate well below 62.5W. This page synthesizes Infineon datasheet specifications, distributor pricing as of 2026-09-13, and practical design notes not found in the manufacturer datasheet.
BUK7Y2R0-40H - 40V, 2.0mΩ N-Channel MOSFET LFPAK56 | Nexperia
The Nexperia BUK7Y2R0-40H is an automotive-qualified N-channel MOSFET built on Nexperia's Trench 9 superjunction technology, housed in the robust LFPAK56 (SOT-669) power package. It is rated for 40 V drain-source voltage, 2.0 mΩ typical on-resistance, and continuous drain current up to 120 A, making it one of the lowest-RDS(on) parts in its class. What is an N-channel power MOSFET? An N-channel MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) is a voltage-controlled switch that conducts current between drain and source when a positive gate-source voltage is applied. Power MOSFETs sit within the broader category of discrete semiconductors, then field-effect transistors, then power transistors, and are the workhorse switches in DC-DC converters, motor drivers, and load management. The LFPAK56 package is a low-profile, clip-bonded surface-mount package optimized for high-current, low-thermal-resistance applications. Key features of the BUK7Y2R0-40H include a typical RDS(on) of just 2.0 mΩ at VGS = 10 V, an avalanche-rated single-pulse drain current, and a maximum junction temperature of 175°C suitable for automotive under-hood environments. Trench 9 superjunction geometry delivers an excellent figure-of-merit (FOM = RDS(on) × QG), minimizing both conduction and switching losses. Technically, the device uses a strip-cell Trench 9 layout that drastically reduces cell pitch while maintaining low gate charge (QG) and output capacitance (Coss). The copper-clip LFPAK56 bond replaces wire bonds, lowering source inductance and improving thermal performance (Rth(j-mb) typically around 0.9°C/W). The standard-level gate threshold (VGS(th) ~2-3 V) means it can be driven directly from logic-level signals at VGS = 4.5 V, simplifying gate driver design. Typical applications for the BUK7Y2R0-40H include 12 V automotive load switching, electric power steering (EPS), braking and chassis systems, body control modules, and high-current DC-DC converter primary-side switches. Its AEC-Q101 qualification makes it a fit for safety-relevant automotive electronics where reliability under thermal stress is mandatory. Designers should pay attention to gate-drive voltage: 10 V VGS gives the lowest RDS(on), but logic-level 4.5 V operation is acceptable at the cost of slightly higher on-resistance. SOA verification is essential for linear-mode or in-rush applications. This page synthesizes distributor pricing, drop-in alternatives, AEC-Q101 qualification details, and practical LFPAK56 PCB layout notes that are not consolidated on the Nexperia product page alone.
BUK9240-100A,118 - 100V 33A N-Ch TrenchMOS Logic Level FET | Nexperia
The Nexperia BUK9240-100A,118 is a logic-level N-channel enhancement-mode power MOSFET built on TrenchMOS technology, rated at 100 V VDS, 33 A continuous drain current (at TC), and 114 W power dissipation (at TC), housed in a surface-mount DPAK (SOT-428) package. Designed for high-current switching in thermally demanding environments, it features an ultra-low on-state resistance of approximately 33 mOhm at VGS = 10 V, enabling reduced conduction losses and higher system efficiency. The part is supplied on tape-and-reel (suffix ",118") and is qualified to AEC-Q101 for automotive critical applications. What is a logic-level power MOSFET? A logic-level MOSFET is an enhancement-mode N-channel FET whose gate threshold voltage (typically 1 V to 2.5 V) is low enough to be driven directly by 3.3 V or 5 V microcontroller GPIO pins, eliminating the need for a dedicated gate-driver IC. Power MOSFETs occupy the broader semiconductor category hierarchy: discrete semiconductors -> transistors -> MOSFETs -> power MOSFETs -> logic-level MOSFETs. TrenchMOS technology (a Nexperia/NXP trademark) reduces RDS(on) per unit silicon area by using a vertical trench gate structure instead of a planar gate, yielding very low on-state resistance in a small DPAK footprint. Key features of the BUK9240-100A include 175 degrees C maximum junction temperature, AEC-Q101 automotive qualification, low conduction losses due to 33 mOhm RDS(on), and suitability for logic-level gate drive sources (VGS(th) typically 1.5 V to 2.5 V). The device supports repetitive avalanche operation and is rated for high inrush current loads. TrenchMOS process geometry reduces gate charge (Qg) compared to older planar MOSFETs of similar RDS(on), enabling faster switching and lower drive losses. Architecturally, the part uses an N-channel enhancement structure: with VGS = 0 V the channel is off (normally-off device), and applying VGS greater than VGS(th) creates an inversion layer that conducts current from drain to source. The DPAK (TO-252 equivalent) package provides a low thermal-resistance path through the tab (typical Rth(j-a) around 50 C/W with proper PCB copper heatsink area, or around 1.5 C/W Rth(j-c) when mounted on a large heatsink). Compared with DPAK parts from competitors, the BUK9240-100A is positioned in the 100 V / 33 A sweet spot for 12 V and 24 V automotive subsystems. Typical applications include automotive transmission control, motor drives (DC brushed and small BLDC), solenoid and lamp drivers, high-side and low-side switching in 12 V/24 V automotive ECU power distribution, and ultra-high-performance power switching in industrial relay-replacement circuits. The 100 V rating provides ample derating margin for 24 V load-dump transients (which can reach 35 V to 40 V on automotive 24 V systems). When designing with this MOSFET, pay attention to gate-drive voltage: at VGS = 5 V the RDS(on) rises significantly compared to VGS = 10 V (typical logic-level MOSFET behavior), so always confirm the actual RDS(on) at the planned VGS. A small gate-source resistor (10 kOhm to 100 kOhm) is recommended to prevent accidental turn-on from dv/dt-induced Miller current in half-bridge topologies. This page synthesizes real-time distributor pricing, drop-in alternatives sourced from manufacturer cross-reference data, and practical PCB layout guidance that is not duplicated in the stock datasheet.
BUK9M85-60E - 60V 85mΩ N-Ch Logic Level MOSFET LFPAK33 | Nexperia
The Nexperia BUK9M85-60E is a logic-level N-channel enhancement-mode MOSFET rated at 60 V drain-source voltage and 85 mΩ maximum on-resistance, housed in an LFPAK33 (Power33) surface-mount package. It uses Nexperia's TrenchMOS technology and is qualified to the AEC-Q101 standard for high-performance automotive applications, with a continuous drain current rating of approximately 12.8 A at Tc and power dissipation up to 31 W. A logic-level MOSFET is a power MOSFET whose gate-threshold voltage and full-on gate-drive voltage are designed to be compatible directly with low-voltage logic outputs (3.3 V or 5 V microcontrollers, GPIO pins, gate-driver ICs) without requiring a charge pump or bootstrap. Within the power-semiconductor taxonomy, the BUK9M85-60E sits in the N-channel enhancement-mode MOSFET family, which is itself a subclass of power MOSFETs and ultimately a member of the broader discrete-semiconductor hierarchy. Nexperia's LFPAK33 (Power33) family represents the company's high-density, thermally-efficient surface-mount answer to the older DPAK footprint, delivering much lower thermal resistance in a similarly compact board area. Key features include 85 mΩ maximum R_DS(on) at V_GS = 10 V, 60 V V_DSS rating for 12 V and 24 V automotive bus systems, logic-level V_GS(th) for direct MCU drive, an integrated source-connected Schottky-like body diode, and a Kelvin-source LFPAK33 lead frame that reduces gate-loop inductance. These specifications deliver very low conduction loss at moderate currents while keeping switching transients under control. The device architecture pairs a trench gate with a Nexperia-designed source-connected clip and exposed-drain LFPAK33 pad, producing both low R_DS(on) and excellent thermal performance - approximately 4 °C/W junction-to-case. The 4-pin LFPAK33 footprint also provides a true Kelvin source connection at pin 4, decoupling the gate-drive return path from the high-current source path and significantly reducing gate-bounce and ringing. Typical applications include automotive 12 V and 24 V load switching (e.g., LED drivers, solenoid control, motor drivers), power-OR-ing and reverse-polarity protection, DC-DC converter low-side switches, hot-swap circuits, and general-purpose logic-controlled switching in industrial and consumer systems. The AEC-Q101 qualification makes it especially suited to under-hood and body-electronics modules where reliability is critical. When designing with this part, ensure that V_GS drive rises fully above the logic-level threshold (~2.1 V) and that the LFPAK33 thermal pad receives a sufficiently large copper pour on the PCB - particularly important at continuous currents approaching 10 A, where conduction losses dominate. The LFPAK33 footprint is also mechanically robust against vibration, an advantage in automotive environments.
BUZ71A - 50V 13A N-Channel Power MOSFET | STMicroelectronics
The STMicroelectronics BUZ71A is an N-channel 50V, 13A, 0.1 ohm (typical RDS(on)) StripFET power MOSFET in a TO-220 through-hole package, rated for 40W power dissipation and 175C operating junction temperature with 100% avalanche testing. A power MOSFET is a voltage-controlled semiconductor switch that dominates the power-management layer of modern electronics. As an enhancement-mode N-channel device, it conducts when the gate is driven above the source and offers far higher switching speed and lower gate-drive power than bipolar transistors. Power MOSFETs sit within the broader hierarchy of discrete semiconductors: transistor family, field-effect transistor (FET) class, metal-oxide-semiconductor (MOS) technology, used wherever efficient load switching is required. Key features of the BUZ71A include STStripFET cell geometry for low on-state resistance (0.1 ohm typical), avalanche-rugged technology that is 100% avalanche energy tested for inductive-load robustness, high continuous current capability of 13A at 25C case temperature, and a maximum operating temperature of 175C. Older Intersil and Motorola second sources specify 0.120 ohm maximum RDS(on) at 13A, confirming parametric equivalence across vendors. The device uses an enhancement-mode silicon-gate vertical DMOS structure. The StripFET layout minimizes channel resistance and gate charge, enabling efficient switching in regulators and converters where both conduction and switching losses matter. Gate drive requirements are modest, allowing direct drive from logic-level circuitry with adequate voltage headroom. Typical applications include switching regulators, switching converters, motor drivers, relay and solenoid drivers, and high-power bipolar transistor driver stages - exactly the application list cited in the manufacturer datasheet. It also fits general-purpose DC-DC bricks and lighting ballasts. Design consideration: verify gate-drive amplitude against the gate threshold specification and add a gate series resistor to damp parasitic ringing; at 13A, even 0.1 ohm RDS(on) dissipates roughly 17W (estimated: I^2 x R = 13^2 x 0.1), so heatsinking on the TO-220 tab is essential at high duty cycles. This page synthesizes distributor pricing, cross-referenced drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.
C3M0016120K - 1200V 16mΩ SiC MOSFET 115A TO-247-4 | Wolfspeed
The Wolfspeed C3M0016120K is a 1200 V, 16 mΩ, Industrial-qualified, N-Channel Silicon Carbide (SiC) power MOSFET in a TO-247-4 package with a Kelvin-source pin, delivering 115 A continuous drain current (Tc) and 556 W power dissipation (Tc). It is built on Wolfspeed's Gen 3 (C3M) planar SiC MOSFET technology, which combines a 1200 V blocking voltage with ultra-low on-resistance of 16 mΩ typical at 15 V gate drive. What is a SiC MOSFET? A Silicon Carbide MOSFET is a wide-bandgap (WBG) power transistor that operates like a silicon MOSFET but uses SiC as the semiconductor substrate. SiC's wider bandgap (3.26 eV vs 1.12 eV for Si) allows higher breakdown voltage, faster switching, and lower conduction loss per unit area, making SiC MOSFETs a subclass of power MOSFETs and a key member of the power semiconductor family used in high-efficiency switched-mode power conversion. Key features include a typical on-resistance of 16 mΩ at Vgs=15 V, a maximum continuous drain current of 115 A at Tc=25°C, an internally limited avalanche energy rating, a body diode with low reverse recovery charge (Qrr), and a maximum junction temperature of 175°C. The TO-247-4 package provides a Kelvin-source connection that decouples the gate-drive return path from the high-current source path, slashing gate ringing and improving switching loss figures. Architecturally, the device uses Wolfspeed's third-generation planar SiC process, which removes the JFET region pinch-off that limited earlier planar SiC parts. The result is a stable, robust RDS(on) over the full gate-drive range (12-18 V) and a positive temperature coefficient on resistance that supports easy paralleling in high-current modules. Typical applications include solar string inverters, EV onboard chargers and DC-DC converters, industrial motor drives, telecom rectifier stages, and induction heating. The 1200 V class is the sweet spot for 800 V EV traction buses and 1000 V solar arrays where legacy silicon IGBTs cannot meet switching-frequency targets. Design consideration: always use a dedicated gate driver with isolated 15 V/+/-5% output (per Wolfspeed Application Note PRD-04814) and place the gate-source resistor as close as possible to the Kelvin pin to exploit the TO-247-4 source-inductance reduction; otherwise you will lose the main switching-loss benefit of the 4-lead package. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.
C3M0021120K - 1200V 21mOhm SiC MOSFET | Wolfspeed | TO-247-4
The Wolfspeed C3M0021120K is a 1200 V, 21 mOhm N-channel silicon carbide (SiC) power MOSFET rated for 100 A (at Tc) and 469 W (at Tc), supplied in a 4-pin TO-247-4 through-hole package with a separate Kelvin driver-source pin. A silicon carbide power MOSFET is a unipolar switching transistor built on a wide-bandgap (3.26 eV) semiconductor instead of conventional silicon. Within the power-management hierarchy, it sits under power transistor -> MOSFET -> wide-bandgap semiconductor devices, and its wide bandgap allows thinner, more heavily doped drift regions, yielding lower specific on-resistance, lower switching losses, and higher junction temperature capability than comparable silicon superjunction MOSFETs. The C3M0021120K uses Wolfspeed's 3rd-generation C3M planar SiC MOSFET technology, optimized for industrial power conversion. Key features include a 1200 V drain-source breakdown rating, 21 mOhm on-resistance for low conduction loss, and a Kelvin source connection that decouples the gate-drive return path from power-source inductance, dramatically reducing switching losses in hard-switched converters. The separate driver-source pin is the defining architectural advantage of the TO-247-4 (K) package. By eliminating common-source inductance from the gate loop, the device achieves faster switching transitions with less ringing, enabling higher converter efficiency and higher switching frequency, which shrinks magnetics and capacitors in the power stage. Typical applications include solar inverters and energy storage systems, UPS and server power supplies, motor drives and industrial motor control, and high-voltage DC-DC converters. These systems benefit directly from the 1200 V blocking capability and low conduction losses at high current. Designers should drive the gate with +15 V on / -4 V off levels per Wolfspeed recommendations and lay out the Kelvin return trace as short as possible to preserve the switching-loss benefit. This page synthesizes distributor data, drop-in alternative analysis, and practical design guidance not found in the manufacturer datasheet alone. Pricing shown is as of 2026-10-11.
C3M0080120D - 1200V 80mOhm SiC MOSFET, TO-247-3 | Wolfspeed
The Wolfspeed C3M0080120D is a 1200 V, 80 mOhm Silicon Carbide (SiC) N-Channel Enhancement Mode power MOSFET in a TO-247-3 through-hole package, rated for 36 A continuous drain current (Tc) and 192 W power dissipation (Tc). It uses Wolfspeed's third-generation (C3M) planar SiC MOSFET technology, delivering lower on-resistance per area, faster switching, and zero reverse recovery charge compared with silicon IGBTs and superjunction MOSFETs. A Silicon Carbide MOSFET (SiC MOSFET) is a wide-bandgap (WBG) power transistor that switches high voltages and currents with far less loss than a silicon MOSFET or IGBT. Within the power-semiconductor taxonomy, SiC MOSFETs sit between silicon MOSFETs (limited to ~600-900 V practical breakdown) and emerging GaN HEMTs (typically <650 V). SiC is the dominant WBG technology for 1200 V-class traction, solar, and industrial drives, where switching frequencies of 50-200 kHz and junction temperatures of 175 C are routine. Key features of the C3M0080120D include an 80 mOhm typical Rds(on) at Vgs=15 V, a low gate charge (Qg typical values for the C3M family are in the tens of nC), an intrinsic body diode with negligible reverse recovery (Qrr), and a maximum operating junction temperature of 175 C. The TO-247-3 package provides a low thermal-resistance path and a standard through-hole footprint that drops into any 1200 V-class SiC design. Typical applications include EV onboard chargers and DC-DC converters, solar string inverters, industrial motor drives, telecom rectifiers, and solid-state circuit breakers. The C3M platform is designed for hard-switched and soft-switched topologies where its low switching loss and high-temperature tolerance reduce heatsink, magnetics, and cooling cost. When designing with the C3M0080120D, drive the gate at +15 V/-3 V to -5 V for best Rds(on) and immunity to parasitic turn-on; use a Kelvin-source TO-247 variant (C3M0080120J) if gate-loop inductance is a concern. Always derate to keep Tj below 150 C in hard-switched designs for long-term reliability.