Intel의 EPM9560RC208-20 - MAX 9000 CPLD 560 Macrocell 20ns | Intel EPM9560RC208-20 - 전자 부품
Intel

EPM9560RC208-20 - MAX 9000 CPLD 560 Macrocell 20ns | Intel

부품 번호: EPM9560RC208-20 ✗ 단종
재고 있음 영업일 기준 1~3일 내 발송
5.0 V Vdss 5.0 V TTL/CMOS compatible Rds(on) 208-pin RQFP (28x28 mm) Package 100 MHz Speed
문의하기 가격 문의
MOQ: 1 |
가격 업데이트: 2026-09-13
볼륨 가격
수량 단가 합계
1 $0 $0.00
10 $0 $0.00
100 $0 $0.00
500 $0 $0.00
1,000 $0 $0.00
ℹ️ 모든 가격은 USD 기준입니다
데이터시트 보기 (PDF) 대체품 보기

EPM9560RC208-20 개요

The Intel (Altera) EPM9560RC208-20 is a MAX 9000 family Complex Programmable Logic Device (CPLD) offering 560 macrocells, 12,000 usable gates, and a 20 ns pin-to-pin propagation delay, housed in a 208-pin RQFP (Power Quad Flat Pack) surface-mount package. It operates from a 5.0 V supply with in-system programmability (ISP) through the IEEE Std. 1149.1 JTAG interface.

A CPLD (Complex Programmable Logic Device) is a programmable logic IC that combines multiple logic array blocks and macrocells into a single non-volatile device, allowing designers to implement custom digital logic without fabricating an ASIC. Within the programmable logic hierarchy, a CPLD sits between simple PLDs and FPGAs: it offers lower density than an FPGA but provides deterministic, non-volatile, single-chip operation with predictable timing. The MAX 9000 family is built on Altera's third-generation Multiple Array MatriX (MAX) architecture using CMOS EEPROM technology.

Key features of the EPM9560RC208-20 include 560 macrocells organized into 35 logic array blocks, 153 user I/O pins, 12,000 gates of logic capacity, and a 20 ns pin-to-pin delay that supports system clock rates up to 100 MHz. The EEPROM-based configuration is retained without external configuration memory, eliminating the boot-time configuration step required by SRAM-based FPGAs.

The MAX 9000 architecture uses a continuous interconnect scheme that delivers uniform, predictable propagation delays independent of routing, which simplifies static timing analysis. The 5.0 V core and I/O operation provides direct TTL/CMOS compatibility for legacy 5 V systems, and the built-in JTAG boundary-scan interface supports both in-system programming and board-level test.

Typical applications include glue logic for legacy 5 V microprocessor buses, PCI and ISA interface bridging, industrial control state machines, and replacement of discrete 74-series logic in existing designs. The 208-pin RQFP package is form, fit, and functionally equivalent to the discontinued 208-pin CQFP version, per Altera's product discontinuance notice.

When designing with this device, note that the MAX 9000 family is a mature, legacy product line; verify current availability and consider migration to a modern CPLD or small FPGA for new designs. This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.

드롭인 대체품: EPM9560RC208-20 — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.

이 시리즈의 변형

다음과 드롭인 호환되는 동일 시리즈 모델: EPM9560RC208-20 (동일 폼 팩터 및 풋프린트) — 차이점: Package, Propagation Delay (tPD), Usable Gates, Pin-to-Pin Delay (tPD), Speed Grade.

Intel
Package: RQFP-208
Propagation Delay (tPD): 15 ns
Usable Gates: 10,000 gates
비교 대상: EPM9560RC208-20 →
Intel
Package: 208-pin RQFP (Plastic Quad Flat Pack)
비교 대상: EPM9560RC208-20 →
Intel
Package: 208-pin RQFP (Plastic Quad Flat Pack)
Pin-to-Pin Delay (tPD): 10 ns
비교 대상: EPM9560RC208-20 →
Altera
Package: 208-pin RQFP (S-PQFP-G208)
Propagation Delay (tPD): 12 ns
Usable Gates: 12000
비교 대상: EPM9560RC208-20 →
Altera
Package: 208-pin RQFP (Power Quad Flat Pack)
Usable Gates: 12,000 gates
Speed Grade: -15 (15 ns pin-to-pin)
비교 대상: EPM9560RC208-20 →
Intel
Package: 208-pin RQFP (Power Quad Flat Pack)
Pin-to-Pin Delay (tPD): 15 ns
Speed Grade: -15 (15 ns tPD)
비교 대상: EPM9560RC208-20 →
Intel
Package: 208-pin Power Quad Flat Pack (RQFP)
Usable Gates: 12,000 (typical)
Pin-to-Pin Delay (tPD): 16 ns
비교 대상: EPM9560RC208-20 →
Altera
Package: 208-pin RQFP (RC208)
Pin-to-Pin Delay (tPD): 17 ns
비교 대상: EPM9560RC208-20 →
Altera
Package: 208-pin RQFP (Power Quad Flat Pack)
Propagation Delay (tPD): 18 ns (speed grade -18)
Usable Gates: 12,000 gates
비교 대상: EPM9560RC208-20 →
Altera
Package: RQFP-208 (208-pin PQFP)
Propagation Delay (tPD): 19 ns
비교 대상: EPM9560RC208-20 →
Altera
Package: 208-pin RQFP (Power Quad Flat Pack)
Propagation Delay (tPD): 20 ns (speed grade -20)
비교 대상: EPM9560RC208-20 →
Intel
Package: 208-pin RQFP (PowerQuad Flat Pack)
Propagation Delay (tPD): 20 ns
Speed Grade: -20 (20 ns)
비교 대상: EPM9560RC208-20 →

빠른 비교 도구 — 나란히 비교할 대체 부품을 선택하십시오:

EPM9560RC208-15

✅ 드롭인
Altera
📦 208-pin RQFP
MAX 9000 · EEPROM-based Complex Programmable Logic Device (CPLD) · 12,000 gates · 560 macro cells · 15 ns · 117.6 MHz · 5.0 V · EEPROM (non-volatile)

✓ 재고 있음

가격 문의

데이터시트 보기 →

EPM9560RC208-19

✅ 드롭인
Altera
📦 208-pin RQFP
MAX 9000 · CPLD (Complex Programmable Logic Device) · 560 · 12,000 · 772 · 149 · 19 ns

✓ 재고 있음

$16.2 / 개

데이터시트 보기 →

EPM9560RC208-18

✅ 드롭인
Altera
📦 208-pin RQFP
MAX 9000 (EPM9560) · EEPROM-based Complex Programmable Logic Device (CPLD) · 12,000 gates · 560 macrocells · 18 ns (speed grade -18) · 117.6 MHz (family -15 grade reference) · 5 V · 3.3 V or 5 V

✓ 재고 있음

가격 문의

데이터시트 보기 →

EPM9560RC208-17

✅ 드롭인
Altera
📦 208-pin RQFP
MAX 9000 · CPLD (EPLD, in-system programmable) · 12,000 · 560 · 16 · 17 ns · 117.6 MHz · 212

✓ 재고 있음

$54.75 / 개

데이터시트 보기 →

EPM9560RC208-16

✅ 드롭인
Intel
📦 208-pin RQFP
MAX 9000 · CPLD (Complex Programmable Logic Device) · 560 macrocells · 12,000 gates · 12,000 (typical) · 16 ns · 117.6 MHz · 5 V

✓ 재고 있음

$52.4 / 개

데이터시트 보기 →

EPM9560RC208-15N

✅ 드롭인
Intel
📦 208-pin RQFP
MAX 9000 · CPLD (Complex Programmable Logic Device) · 560 · 12,000 · 16 · 212 (in 208-RQFP, see family datasheet) · 15 ns · 117.6 MHz

✓ 재고 있음

$19.85 / 개

데이터시트 보기 →

EPM9560RC208-20 최대 정격 & 전기적 특성

Device Family MAX 9000 (EPM9560)
Macrocells 560
Usable Gates 12,000
Logic Array Blocks 35
User I/O Pins 153
Pin-to-Pin Delay (tPD) 20 ns
최대 클록 주파수 100 MHz
공급 전압 5.0 V
Configuration Technology EEPROM (non-volatile)
In-System Programmability Yes, via IEEE Std. 1149.1 JTAG
패키지 208-pin RQFP (28x28 mm)
실장 유형 Surface Mount
동작 온도 0C to +70C (commercial)
I/O Standards 5.0 V TTL/CMOS compatible
Flip-Flops 772

EPM9560RC208-20 핀 구성

Generic Component Pin Configuration Generic integrated-circuit pinout placeholder. Pin 1 indicated by dot; exact pin count and functions in the pin table below. 1 N 2 N-1 3 N-2 4 N-3 Pin Configuration See pin table below for pin functions Package-specific diagram not available
핀 1 I/O — User I/O pin (per MAX 9000 datasheet)
핀 2 I/O — User I/O pin (per MAX 9000 datasheet)
핀 3 I/O — User I/O pin (per MAX 9000 datasheet)
핀 4 I/O — User I/O pin (per MAX 9000 datasheet)
핀 5 I/O — User I/O pin (per MAX 9000 datasheet)
핀 6 I/O — User I/O pin (per MAX 9000 datasheet)
핀 7 I/O — User I/O pin (per MAX 9000 datasheet)
핀 8 I/O — User I/O pin (per MAX 9000 datasheet)
핀 9 I/O — User I/O pin (per MAX 9000 datasheet)
핀 10 I/O — User I/O pin (per MAX 9000 datasheet)
핀 11 I/O — User I/O pin (per MAX 9000 datasheet)
핀 12 I/O — User I/O pin (per MAX 9000 datasheet)
핀 13 I/O — User I/O pin (per MAX 9000 datasheet)
핀 14 I/O — User I/O pin (per MAX 9000 datasheet)
핀 15 I/O — User I/O pin (per MAX 9000 datasheet)
핀 16 I/O — User I/O pin (per MAX 9000 datasheet)
핀 17 I/O — User I/O pin (per MAX 9000 datasheet)
핀 18 I/O — User I/O pin (per MAX 9000 datasheet)
핀 19 I/O — User I/O pin (per MAX 9000 datasheet)
핀 20 I/O — User I/O pin (per MAX 9000 datasheet)
핀 21 I/O — User I/O pin (per MAX 9000 datasheet)
핀 22 I/O — User I/O pin (per MAX 9000 datasheet)
핀 23 I/O — User I/O pin (per MAX 9000 datasheet)
핀 24 I/O — User I/O pin (per MAX 9000 datasheet)
핀 25 I/O — User I/O pin (per MAX 9000 datasheet)
핀 26 I/O — User I/O pin (per MAX 9000 datasheet)
핀 27 I/O — User I/O pin (per MAX 9000 datasheet)
핀 28 I/O — User I/O pin (per MAX 9000 datasheet)
핀 29 I/O — User I/O pin (per MAX 9000 datasheet)
핀 30 I/O — User I/O pin (per MAX 9000 datasheet)
핀 31 I/O — User I/O pin (per MAX 9000 datasheet)
핀 32 I/O — User I/O pin (per MAX 9000 datasheet)
핀 33 I/O — User I/O pin (per MAX 9000 datasheet)
핀 34 I/O — User I/O pin (per MAX 9000 datasheet)
핀 35 I/O — User I/O pin (per MAX 9000 datasheet)
핀 36 I/O — User I/O pin (per MAX 9000 datasheet)
핀 37 I/O — User I/O pin (per MAX 9000 datasheet)
핀 38 I/O — User I/O pin (per MAX 9000 datasheet)
핀 39 I/O — User I/O pin (per MAX 9000 datasheet)
핀 40 I/O — User I/O pin (per MAX 9000 datasheet)
핀 41 I/O — User I/O pin (per MAX 9000 datasheet)
핀 42 I/O — User I/O pin (per MAX 9000 datasheet)
핀 43 I/O — User I/O pin (per MAX 9000 datasheet)
핀 44 I/O — User I/O pin (per MAX 9000 datasheet)
핀 45 I/O — User I/O pin (per MAX 9000 datasheet)
핀 46 I/O — User I/O pin (per MAX 9000 datasheet)
핀 47 I/O — User I/O pin (per MAX 9000 datasheet)
핀 48 I/O — User I/O pin (per MAX 9000 datasheet)
핀 49 I/O — User I/O pin (per MAX 9000 datasheet)
핀 50 I/O — User I/O pin (per MAX 9000 datasheet)
핀 51 I/O — User I/O pin (per MAX 9000 datasheet)
핀 52 I/O — User I/O pin (per MAX 9000 datasheet)
핀 53 I/O — User I/O pin (per MAX 9000 datasheet)
핀 54 I/O — User I/O pin (per MAX 9000 datasheet)
핀 55 I/O — User I/O pin (per MAX 9000 datasheet)
핀 56 I/O — User I/O pin (per MAX 9000 datasheet)
핀 57 I/O — User I/O pin (per MAX 9000 datasheet)
핀 58 I/O — User I/O pin (per MAX 9000 datasheet)
핀 59 I/O — User I/O pin (per MAX 9000 datasheet)
핀 60 I/O — User I/O pin (per MAX 9000 datasheet)
핀 61 I/O — User I/O pin (per MAX 9000 datasheet)
핀 62 I/O — User I/O pin (per MAX 9000 datasheet)
핀 63 I/O — User I/O pin (per MAX 9000 datasheet)
핀 64 I/O — User I/O pin (per MAX 9000 datasheet)
핀 65 I/O — User I/O pin (per MAX 9000 datasheet)
핀 66 I/O — User I/O pin (per MAX 9000 datasheet)
핀 67 I/O — User I/O pin (per MAX 9000 datasheet)
핀 68 I/O — User I/O pin (per MAX 9000 datasheet)
핀 69 I/O — User I/O pin (per MAX 9000 datasheet)
핀 70 I/O — User I/O pin (per MAX 9000 datasheet)
핀 71 I/O — User I/O pin (per MAX 9000 datasheet)
핀 72 I/O — User I/O pin (per MAX 9000 datasheet)
핀 73 I/O — User I/O pin (per MAX 9000 datasheet)
핀 74 I/O — User I/O pin (per MAX 9000 datasheet)
핀 75 I/O — User I/O pin (per MAX 9000 datasheet)
핀 76 I/O — User I/O pin (per MAX 9000 datasheet)
핀 77 I/O — User I/O pin (per MAX 9000 datasheet)
핀 78 I/O — User I/O pin (per MAX 9000 datasheet)
핀 79 I/O — User I/O pin (per MAX 9000 datasheet)
핀 80 I/O — User I/O pin (per MAX 9000 datasheet)
핀 81 I/O — User I/O pin (per MAX 9000 datasheet)
핀 82 I/O — User I/O pin (per MAX 9000 datasheet)
핀 83 I/O — User I/O pin (per MAX 9000 datasheet)
핀 84 I/O — User I/O pin (per MAX 9000 datasheet)
핀 85 I/O — User I/O pin (per MAX 9000 datasheet)
핀 86 I/O — User I/O pin (per MAX 9000 datasheet)
핀 87 I/O — User I/O pin (per MAX 9000 datasheet)
핀 88 I/O — User I/O pin (per MAX 9000 datasheet)
핀 89 I/O — User I/O pin (per MAX 9000 datasheet)
핀 90 I/O — User I/O pin (per MAX 9000 datasheet)
핀 91 I/O — User I/O pin (per MAX 9000 datasheet)
핀 92 I/O — User I/O pin (per MAX 9000 datasheet)
핀 93 I/O — User I/O pin (per MAX 9000 datasheet)
핀 94 I/O — User I/O pin (per MAX 9000 datasheet)
핀 95 I/O — User I/O pin (per MAX 9000 datasheet)
핀 96 I/O — User I/O pin (per MAX 9000 datasheet)
핀 97 I/O — User I/O pin (per MAX 9000 datasheet)
핀 98 I/O — User I/O pin (per MAX 9000 datasheet)
핀 99 I/O — User I/O pin (per MAX 9000 datasheet)
핀 100 I/O — User I/O pin (per MAX 9000 datasheet)
핀 101 I/O — User I/O pin (per MAX 9000 datasheet)
핀 102 I/O — User I/O pin (per MAX 9000 datasheet)
핀 103 I/O — User I/O pin (per MAX 9000 datasheet)
핀 104 I/O — User I/O pin (per MAX 9000 datasheet)
핀 105 I/O — User I/O pin (per MAX 9000 datasheet)
핀 106 I/O — User I/O pin (per MAX 9000 datasheet)
핀 107 I/O — User I/O pin (per MAX 9000 datasheet)
핀 108 I/O — User I/O pin (per MAX 9000 datasheet)
핀 109 I/O — User I/O pin (per MAX 9000 datasheet)
핀 110 I/O — User I/O pin (per MAX 9000 datasheet)
핀 111 I/O — User I/O pin (per MAX 9000 datasheet)
핀 112 I/O — User I/O pin (per MAX 9000 datasheet)
핀 113 I/O — User I/O pin (per MAX 9000 datasheet)
핀 114 I/O — User I/O pin (per MAX 9000 datasheet)
핀 115 I/O — User I/O pin (per MAX 9000 datasheet)
핀 116 I/O — User I/O pin (per MAX 9000 datasheet)
핀 117 I/O — User I/O pin (per MAX 9000 datasheet)
핀 118 I/O — User I/O pin (per MAX 9000 datasheet)
핀 119 I/O — User I/O pin (per MAX 9000 datasheet)
핀 120 I/O — User I/O pin (per MAX 9000 datasheet)
핀 121 I/O — User I/O pin (per MAX 9000 datasheet)
핀 122 I/O — User I/O pin (per MAX 9000 datasheet)
핀 123 I/O — User I/O pin (per MAX 9000 datasheet)
핀 124 I/O — User I/O pin (per MAX 9000 datasheet)
핀 125 I/O — User I/O pin (per MAX 9000 datasheet)
핀 126 I/O — User I/O pin (per MAX 9000 datasheet)
핀 127 I/O — User I/O pin (per MAX 9000 datasheet)
핀 128 I/O — User I/O pin (per MAX 9000 datasheet)
핀 129 I/O — User I/O pin (per MAX 9000 datasheet)
핀 130 I/O — User I/O pin (per MAX 9000 datasheet)
핀 131 I/O — User I/O pin (per MAX 9000 datasheet)
핀 132 I/O — User I/O pin (per MAX 9000 datasheet)
핀 133 I/O — User I/O pin (per MAX 9000 datasheet)
핀 134 I/O — User I/O pin (per MAX 9000 datasheet)
핀 135 I/O — User I/O pin (per MAX 9000 datasheet)
핀 136 I/O — User I/O pin (per MAX 9000 datasheet)
핀 137 I/O — User I/O pin (per MAX 9000 datasheet)
핀 138 I/O — User I/O pin (per MAX 9000 datasheet)
핀 139 I/O — User I/O pin (per MAX 9000 datasheet)
핀 140 I/O — User I/O pin (per MAX 9000 datasheet)
핀 141 I/O — User I/O pin (per MAX 9000 datasheet)
핀 142 I/O — User I/O pin (per MAX 9000 datasheet)
핀 143 I/O — User I/O pin (per MAX 9000 datasheet)
핀 144 I/O — User I/O pin (per MAX 9000 datasheet)
핀 145 I/O — User I/O pin (per MAX 9000 datasheet)
핀 146 I/O — User I/O pin (per MAX 9000 datasheet)
핀 147 I/O — User I/O pin (per MAX 9000 datasheet)
핀 148 I/O — User I/O pin (per MAX 9000 datasheet)
핀 149 I/O — User I/O pin (per MAX 9000 datasheet)
핀 150 I/O — User I/O pin (per MAX 9000 datasheet)
핀 151 I/O — User I/O pin (per MAX 9000 datasheet)
핀 152 I/O — User I/O pin (per MAX 9000 datasheet)
핀 153 I/O — User I/O pin (per MAX 9000 datasheet)
핀 154 VCCINT — 5.0 V core power supply (per MAX 9000 datasheet)
핀 155 GND — Ground (per MAX 9000 datasheet)
핀 156 VCCIO — 5.0 V I/O power supply (per MAX 9000 datasheet)
핀 157 GND — Ground (per MAX 9000 datasheet)
핀 158 VCCINT — 5.0 V core power supply (per MAX 9000 datasheet)
핀 159 GND — Ground (per MAX 9000 datasheet)
핀 160 VCCIO — 5.0 V I/O power supply (per MAX 9000 datasheet)
핀 161 GND — Ground (per MAX 9000 datasheet)
핀 162 VCCINT — 5.0 V core power supply (per MAX 9000 datasheet)
핀 163 GND — Ground (per MAX 9000 datasheet)
핀 164 VCCIO — 5.0 V I/O power supply (per MAX 9000 datasheet)
핀 165 GND — Ground (per MAX 9000 datasheet)
핀 166 VCCINT — 5.0 V core power supply (per MAX 9000 datasheet)
핀 167 GND — Ground (per MAX 9000 datasheet)
핀 168 VCCIO — 5.0 V I/O power supply (per MAX 9000 datasheet)
핀 169 GND — Ground (per MAX 9000 datasheet)
핀 170 VCCINT — 5.0 V core power supply (per MAX 9000 datasheet)
핀 171 GND — Ground (per MAX 9000 datasheet)
핀 172 VCCIO — 5.0 V I/O power supply (per MAX 9000 datasheet)
핀 173 GND — Ground (per MAX 9000 datasheet)
핀 174 VCCINT — 5.0 V core power supply (per MAX 9000 datasheet)
핀 175 GND — Ground (per MAX 9000 datasheet)
핀 176 VCCIO — 5.0 V I/O power supply (per MAX 9000 datasheet)
핀 177 GND — Ground (per MAX 9000 datasheet)
핀 178 VCCINT — 5.0 V core power supply (per MAX 9000 datasheet)
핀 179 GND — Ground (per MAX 9000 datasheet)
핀 180 VCCIO — 5.0 V I/O power supply (per MAX 9000 datasheet)
핀 181 GND — Ground (per MAX 9000 datasheet)
핀 182 VCCINT — 5.0 V core power supply (per MAX 9000 datasheet)
핀 183 GND — Ground (per MAX 9000 datasheet)
핀 184 VCCIO — 5.0 V I/O power supply (per MAX 9000 datasheet)
핀 185 GND — Ground (per MAX 9000 datasheet)
핀 186 VCCINT — 5.0 V core power supply (per MAX 9000 datasheet)
핀 187 GND — Ground (per MAX 9000 datasheet)
핀 188 VCCIO — 5.0 V I/O power supply (per MAX 9000 datasheet)
핀 189 GND — Ground (per MAX 9000 datasheet)
핀 190 VCCINT — 5.0 V core power supply (per MAX 9000 datasheet)
핀 191 GND — Ground (per MAX 9000 datasheet)
핀 192 VCCIO — 5.0 V I/O power supply (per MAX 9000 datasheet)
핀 193 GND — Ground (per MAX 9000 datasheet)
핀 194 VCCINT — 5.0 V core power supply (per MAX 9000 datasheet)
핀 195 GND — Ground (per MAX 9000 datasheet)
핀 196 VCCIO — 5.0 V I/O power supply (per MAX 9000 datasheet)
핀 197 GND — Ground (per MAX 9000 datasheet)
핀 198 VCCINT — 5.0 V core power supply (per MAX 9000 datasheet)
핀 199 GND — Ground (per MAX 9000 datasheet)
핀 200 VCCIO — 5.0 V I/O power supply (per MAX 9000 datasheet)
핀 201 GND — Ground (per MAX 9000 datasheet)
핀 202 VCCINT — 5.0 V core power supply (per MAX 9000 datasheet)
핀 203 GND — Ground (per MAX 9000 datasheet)
핀 204 VCCIO — 5.0 V I/O power supply (per MAX 9000 datasheet)
핀 205 GND — Ground (per MAX 9000 datasheet)
핀 206 VCCINT — 5.0 V core power supply (per MAX 9000 datasheet)
핀 207 GND — Ground (per MAX 9000 datasheet)
핀 208 VCCIO — 5.0 V I/O power supply (per MAX 9000 datasheet)

일반적인 애플리케이션

EPM9560RC208-20 적합 용도: 6 애플리케이션s: Legacy 5V Microprocessor Glue Logic, PCI and ISA Bus Interface Bridging, Industrial Control State Machines, Discrete 74-Series Logic Replacement, Telecom Line Card Control Logic, Test and Measurement Instrumentation.

🏭

Legacy 5V Microprocessor Glue Logic

The EPM9560RC208-20 fits legacy 5.0 V microprocessor glue logic because its 153 user I/O pins and 5.0 V TTL/CMOS-compatible I/O interface directly with classic 8/16-bit MPU buses without level shifters. Its 560 macrocells and 12,000 gates absorb address decoding, wait-state generation, and chip-select logic that would otherwise require dozens of 74-series packages. The 20 ns pin-to-pin delay keeps combinational decode paths within a single bus cycle at 100 MHz system clocks. Because configuration is stored in non-volatile EEPROM, the device is live immediately at power-up, unlike SRAM-based FPGAs that need a boot configuration step. The trade-off is higher static power from the 5.0 V core compared with modern 1.8 V CPLDs.

추천

EPM9560RC208-15 · Altera EPM9480RC208-20 · Intel
🖥️

PCI and ISA Bus Interface Bridging

The EPM9560RC208-20 suits PCI and ISA bus bridging because its 153 I/O pins and 5.0 V signaling match the legacy 5 V PCI/ISA electrical environment, and its 560 macrocells implement target/slave state machines, address translation, and handshake logic in a single non-volatile device. The 20 ns pin-to-pin delay supports the 33 MHz PCI clock domain with margin, while the 100 MHz maximum clock rate covers faster local logic. EEPROM configuration means the bridge is active before the host CPU releases reset, avoiding the configuration latency of SRAM FPGAs. Designers should budget for the 5.0 V core power and confirm the RQFP thermal pad soldering for reliable operation.

추천

EPM9560RC208-19 · Altera EPM9560RC208-18 · Altera
🏭

Industrial Control State Machines

The EPM9560RC208-20 is well suited to industrial control state machines because its 560 macrocells and 772 flip-flops implement complex sequential logic, while the non-volatile EEPROM configuration guarantees deterministic startup in factory environments where a configuration PROM failure would halt the line. The 5.0 V I/O interfaces directly with legacy PLC backplanes and 24 V opto-isolated input conditioning, and the 20 ns pin-to-pin delay provides predictable timing for interlock logic. The 208-pin RQFP package offers 153 I/O for multi-axis or multi-station control. The main trade-off is the obsolete lifecycle status, so spare-parts planning is essential for long-lived industrial equipment.

추천

EPM9560RC208-16 · Intel EPM9560RC208-17 · Altera
🔧

Discrete 74-Series Logic Replacement

The EPM9560RC208-20 replaces banks of discrete 74-series logic because a single 208-pin RQFP consolidates 560 macrocells and 12,000 gates, shrinking board area and reducing component count versus dozens of SSI/MSI packages. The 5.0 V TTL/CMOS-compatible I/O preserves the original logic levels, so existing 5 V designs need no level translation, and the 20 ns pin-to-pin delay matches or exceeds typical 74F/74LS propagation delays. Non-volatile EEPROM configuration removes the need for external configuration memory. The trade-off is that the obsolete MAX 9000 family requires careful sourcing; for new designs, a modern CPLD is preferable.

추천

EPM9560RC208-15N · Intel EPM9560RC208-15 · Altera
🌐

Telecom Line Card Control Logic

The EPM9560RC208-20 fits telecom line card control logic because its 153 I/O pins and 560 macrocells handle per-channel control, alarm monitoring, and bus arbitration across multiple line interfaces, while the 5.0 V I/O matches legacy telecom backplane signaling. The 20 ns pin-to-pin delay and 100 MHz maximum clock support the control-plane timing of classic SONET/SDH and T1/E1 line cards. Non-volatile EEPROM configuration ensures the card is operational immediately after hot-swap power-up, which is critical for central-office equipment. The obsolete lifecycle means these parts are now sourced from remaining stock, so qualification of alternate speed grades is advisable.

추천

EPM9560RC208-18 · Altera EPM9560RC208-19 · Altera
🔧

Test and Measurement Instrumentation

The EPM9560RC208-20 suits test and measurement instrumentation because its 560 macrocells and 772 flip-flops implement trigger sequencers, pattern generators, and acquisition state machines, while the 20 ns pin-to-pin delay provides deterministic timing for time-critical measurement paths. The 5.0 V I/O interfaces directly with legacy instrument front-end logic and DAC/ADC control buses, and the non-volatile EEPROM configuration guarantees repeatable power-up behavior in benchtop equipment. The 208-pin RQFP provides 153 I/O for multi-channel instruments. Because the MAX 9000 family is obsolete, designers maintaining existing instruments should stock spare devices and validate faster speed grades as drop-in substitutes.

추천

EPM9560RC208-17 · Altera EPM9560RC208-16 · Intel

추천 제품 요약

EPM9560RC208-15 Altera 사용처: Legacy 5V Microprocessor Glue Logic, Discrete 74-Series Logic Replacement EPM9480RC208-20 Intel 사용처: Legacy 5V Microprocessor Glue Logic EPM9560RC208-19 Altera 사용처: PCI and ISA Bus Interface Bridging, Telecom Line Card Control Logic EPM9560RC208-18 Altera 사용처: PCI and ISA Bus Interface Bridging, Telecom Line Card Control Logic EPM9560RC208-16 Intel 사용처: Industrial Control State Machines, Test and Measurement Instrumentation EPM9560RC208-17 Altera 사용처: Industrial Control State Machines, Test and Measurement Instrumentation EPM9560RC208-15N Intel 사용처: Discrete 74-Series Logic Replacement
What is the EPM9560RC208-20?
The EPM9560RC208-20 is a MAX 9000 family Complex Programmable Logic Device (CPLD) from Intel (Altera) with 560 macrocells, 12,000 usable gates, and a 20 ns pin-to-pin delay in a 208-pin RQFP package. It is a 5.0 V EEPROM-based programmable logic device with in-system programmability through the IEEE Std. 1149.1 JTAG interface, per the MAX 9000 device family datasheet.
What are the key specifications of EPM9560RC208-20 that engineers should know?
The EPM9560RC208-20 offers 560 macrocells, 12,000 usable gates, 35 logic array blocks, 153 user I/O pins, and 772 flip-flops, with a 20 ns pin-to-pin propagation delay and 100 MHz maximum clock frequency. It operates from a 5.0 V supply in a 208-pin RQFP (28x28 mm) surface-mount package and is configured via non-volatile EEPROM, so no external configuration memory is required.
What is the difference between EPM9560RC208-20 and EPM9560RC208-20C?
The EPM9560RC208-20C is the same MAX 9000 EPM9560 die in the same 208-pin RQFP package, with the trailing C denoting a commercial temperature-grade ordering code. Both share 560 macrocells, 12,000 gates, and the 208-pin RQFP footprint. The -20 suffix indicates the 20 ns speed grade in both cases, so they are functionally interchangeable in commercial-temperature designs.
What is the best drop-in replacement for EPM9560RC208-20?
The best drop-in replacements are other EPM9560 devices in the same 208-pin RQFP package, such as the EPM9560RC208-15 (faster 15 ns speed grade) and EPM9560RC208-19. Because the MAX 9000 family uses a fixed pinout per package, these parts are pin-to-pin compatible and require no PCB changes; only the timing margin differs. Verify availability, as the EPM9560 line is a legacy product.
Can EPM9560RC208-15 replace EPM9560RC208-20?
Yes, the EPM9560RC208-15 is a pin-to-pin compatible drop-in replacement for the EPM9560RC208-20 because both are EPM9560 devices in the identical 208-pin RQFP package. The -15 is a faster speed grade with a 15 ns pin-to-pin delay versus 20 ns, so it exceeds the original timing specification. No PCB or pinout changes are required, though the faster grade may carry a price premium.
Where to buy EPM9560RC208-20 online?
The EPM9560RC208-20 is available through authorized and independent distributors including DigiKey, Octopart-listed suppliers, and specialty legacy-IC vendors such as Heisener and Xecor. As of 2026-09-13, distributor listings show inventory in the thousands of pieces, but pricing is quote-based because the MAX 9000 family is a mature, discontinued product line. Always verify authenticity and date codes when sourcing legacy CPLDs.
What is the price of EPM9560RC208-20?
Pricing for the EPM9560RC208-20 is quote-based rather than published, because the MAX 9000 family is a legacy product line with limited authorized distribution. As of 2026-09-13, distributor pages such as Heisener and Xecor list the part as request-a-quote, and Octopart aggregates bulk pricing from multiple independent distributors. Expect significant price variation by quantity, date code, and supplier; confirm current quotes before committing to a BOM.
What is the lead time for EPM9560RC208-20?
Lead time for the EPM9560RC208-20 is typically listed as to-be-confirmed by distributors, reflecting its status as a legacy MAX 9000 device. As of 2026-09-13, Heisener shows an estimated delivery window of roughly one week for expedited shipping, while other suppliers quote on request. Because the part is obsolete, lead times depend heavily on existing distributor stock rather than factory production.
Is EPM9560RC208-20 in stock?
Yes, EPM9560RC208-20 inventory is available from several independent distributors as of 2026-09-13. Heisener lists approximately 7,392 pieces, QTreeic lists about 3,986 pieces, and Octopart aggregates availability across seven distributors. Because the device is obsolete and no longer manufactured, stock is finite and depletes over time, so buyers should confirm current quantities directly with each supplier before design-in.
Where to download EPM9560RC208-20 datasheet PDF?
The EPM9560RC208-20 datasheet is available as the MAX 9000 Device Family data sheet from Intel (Altera) documentation and mirrored on distributor sites such as DigiKey and Digchip. The datasheet covers the full EPM9560 family, including the 208-pin RQFP pinout, macrocell architecture, timing model, and JTAG programming details. Always download from the manufacturer or an authorized distributor to ensure the latest revision.
Where to find EPM9560RC208-20 pinout?
The EPM9560RC208-20 pinout is documented in the MAX 9000 Device Family data sheet, which lists all 208 pins of the RQFP package including 153 user I/O pins, dedicated clock inputs, JTAG pins (TDI, TDO, TMS, TCK), and power/ground pins. Distributor product pages such as DigiKey also provide package and pin-count information. The 208-pin RQFP is form, fit, and functionally equivalent to the discontinued 208-pin CQFP.
Is EPM9560RC208-20 suitable for new 5V designs?
The EPM9560RC208-20 is not recommended for new designs because the MAX 9000 family is obsolete and no longer in production. It remains suitable for maintaining and repairing existing 5.0 V legacy systems, where its 560 macrocells, 153 I/O pins, and non-volatile EEPROM configuration provide deterministic single-chip logic. For new designs, migrate to a modern CPLD or small FPGA with an active lifecycle.
What is the difference between EPM9560RC208-20 and EPM9480RC208-20?
The EPM9560RC208-20 has 560 macrocells and 12,000 usable gates, while the EPM9480RC208-20 is a smaller MAX 9000 family member with 480 macrocells and fewer gates. Both share the 208-pin RQFP package and 5.0 V EEPROM-based architecture, but they are not pin-to-pin interchangeable because the logic capacity and internal array differ. Choose the EPM9560 when more logic density is required.
What is the best Intel equivalent for EPM9560RC208-20?
The best Intel (Altera) equivalent for the EPM9560RC208-20 is another EPM9560 ordering code in the same 208-pin RQFP package, such as the EPM9560RC208-15 or EPM9560RC208-19, which are pin-to-pin compatible and differ only in speed grade. Intel no longer manufactures the MAX 9000 family, so these equivalents are available only from remaining distributor stock rather than new production.

엔지니어링 참조 데이터: EPM9560RC208-20 — 비교, 설계 지침 및 규정 준수 정보.

선택 가이드

Choose the EPM9560RC208-20 when maintaining or repairing an existing 5.0 V design that already uses the MAX 9000 EPM9560 in the 208-pin RQFP package and requires a 20 ns pin-to-pin delay. If your timing analysis shows margin is tight, select the faster EPM9560RC208-15 or EPM9560RC208-16, which are pin-to-pin compatible drop-ins. If you need a lead-free finish for RoHS compliance, prefer the EPM9560RC208-15N. For new designs, do not select any MAX 9000 device: the family is obsolete, so migrate to a modern CPLD or small FPGA with an active lifecycle and equivalent I/O count. Always verify distributor stock and date codes, since remaining inventory is finite.

대체품과의 비교

파라미터 이 제품 EPM9560RC208-15 EPM9560RC208-19 EPM9560RC208-18 EPM9560RC208-17 EPM9560RC208-16 EPM9560RC208-15N
Package 208-pin RQFP 208-pin RQFP - same 208-pin RQFP - same 208-pin RQFP - same 208-pin RQFP - same 208-pin RQFP - same 208-pin RQFP - same
Brand Intel Intel Intel Intel Intel Intel Intel
Pin-to-Pin Delay (tPD) 20 ns 15 ns 19 ns 18 ns 17 ns 16 ns 15 ns
Macrocells 560 560 560 560 560 560 560
Usable Gates 12,000 12,000 12,000 12,000 12,000 12,000 12,000
User I/O Pins 153 153 153 153 153 153 153
Supply Voltage 5.0 V 5.0 V 5.0 V 5.0 V 5.0 V 5.0 V 5.0 V
Configuration Technology EEPROM (non-volatile) EEPROM (non-volatile) EEPROM (non-volatile) EEPROM (non-volatile) EEPROM (non-volatile) EEPROM (non-volatile) EEPROM (non-volatile)

주요 차별점

  • 20 ns speed grade balances timing margin and cost (vs EPM9560RC208-15)
  • Non-volatile EEPROM configuration (vs EPM9560RC208-19)
  • Lead-free option available via N-suffix variant (vs EPM9560RC208-15N)

설계 노트

Decouple every VCCINT and VCCIO pin with a 0.1 uF ceramic capacitor placed as close to the pin as possible, plus a bulk 10 uF capacitor per power rail. The MAX 9000 family operates from a 5.0 V supply with separate core and I/O rails; keep the core rail within the datasheet tolerance to avoid configuration retention issues. Estimated: at 100 MHz with typical toggle rates, dynamic current can reach several hundred milliamps, so size the regulator and copper for the worst-case load rather than the quiescent value.

The 208-pin RQFP requires careful land-pattern design: use the manufacturer-recommended footprint with a thermal/ground pad, and reflow-solder with a profile matched to the package's moisture sensitivity level. Route the JTAG signals (TCK, TMS, TDI, TDO) as short, controlled-impedance traces and keep them away from high-speed I/O to avoid programming failures. Provide a dedicated ground plane under the device to control return paths.

Do not assume the EPM9560RC208-20 is still in production: the MAX 9000 family is obsolete, so verify date codes and authenticity when sourcing from independent distributors. When substituting a faster speed grade such as the EPM9560RC208-15, re-run static timing analysis because the faster grade changes internal delays and may alter hold-time margins. Also confirm the JTAG chain order if multiple programmable devices share the scan chain.

규정 준수 정보

RoHS
Unknown
REACH
Unknown
AEC-Q100
Not Applicable
무연
Unknown
무할로겐
Unknown
분쟁 광물
Unknown

Compliance data for the EPM9560RC208-20 was not present in the verified web data; values are set to unknown rather than assumed. The N-suffix ordering code (e.g. EPM9560RC208-15N) indicates a lead-free finish, but the standard -20 part's finish is not confirmed.

데이터 검증일: 2026-09-13 — XAIPART 부품 엔지니어링 팀이 검증하고 관리한 데이터

관련 검색

EPM9560RC208-20 EPM9560RC208-20 datasheet Intel EPM9560RC208-20 MAX 9000 CPLD 560 macrocell 208-pin RQFP CPLD EPM9560RC208-20 replacement EPM9560RC208-20 vs EPM9560RC208-15 EPM9560RC208-20 buy price EPM9560RC208-20 pinout 5V CPLD glue logic obsolete what is the speed grade of EPM9560RC208-20 EPM9560RC208-20 lead time stock

관련 부품 & 용어

Intel Altera EPM9560RC208-20 EPM9560RC208-15 EPM9560RC208-19 MAX 9000 CPLD Complex Programmable Logic Device programmable logic device EEPROM IEEE Std. 1149.1 JTAG 208-pin RQFP Power Quad Flat Pack surface mount 5.0 V TTL/CMOS macrocell logic array block pin-to-pin delay in-system programmability RoHS PCI bus ISA bus glue logic
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