EP3SE110F780C4LN vs EP3SE50F780C4N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP3SE110F780C4LN sa pamamagitan ng Intel at EP3SE50F780C4N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP3SE110F780C4LN EP3SE50F780C4N
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Aktibo NRND
Family Stratix III E Stratix III E
Logic Elements (LE) 107,500 47,500
Logic Array Blocks (LABs) 4,300 —
Embedded Memory 8,936,448 bits —
User I/O Pins 488 —
Packhaging 780-BBGA, FCBGA (Fine-pitch) 780-Ball FBGA, 29 mm x 29 mm, 1.0 mm pitch
Supply Voltage Core 0.9 V (typical) —
Temperature na Operasyon 0C to +85C (Commercial) 0C to +85C (C4 commercial grade)
Speed Grade C4 —
Lead-Free / RoHS Yes (N suffix) —
Uri ng Pagpapasok Surface Mount (SMT) Surface Mount (BGA)
Process Technology 40 nm TSMC —
DSP Blocks Yes (18x18 multipliers) —
Level ng MSL 3 (per JEDEC J-STD-020) 3 (per JEDEC J-STD-020, FBGA package)
Tray Packaging Yes (per distributor listings) —
Embedded Memory Bits — 5,760,000
Embedded Memory (M9K/M144K blocks) — 488 (per family datasheet)
Number of LABs — 1900
Maximum User I/Os — 488
DSP Blocks (18x18 multipliers) — 432
PLLs — 12 (per family datasheet)
Maximum Operating Frequency — 717 MHz
Transceiver Channels — Up to 12 (per family, model-dependent)
Transceiver Data Rate — Up to 6.375 Gbps (per Stratix III E family)
Process Node — 40 nm
Volte ng Pagbibigay — Core 0.9 V, I/O 1.2 V-3.3 V (multi-rail)
Configuration Modes — JTAG, Passive Serial, Fast Passive Parallel
Tindminan RoHS — Lead-free / RoHS compliant
Hard Memory Controller — DDR2/DDR3 SDRAM (per Stratix III E family)

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