2EDN7524GXTMA1 vs 2ED21064S06JXUMA1 موازنہ
تفصیلی ساتھ ساتھ موازنہ از 2EDN7524GXTMA1 بذریعہ Infineon اور 2ED21064S06JXUMA1 بذریعہ Infineon. اہم خصوصیات، برقی پیرامیٹرز، پیکیجنگ، لائف سائیکل اسٹیٹس، قیمتوں اور دستیابی کا موازنہ کریں تاکہ آپ کی ڈیزائن ضروریات کے لیے بہترین کمپوننٹ کا تعین ہو سکے۔
Infineon
2EDN7524GXTMA1 - 5A Dual Low-Side Gate Driver for MOSFET/GaN | Infineon
2EDN7524GXTMA1 ✓ فعالخصوصیات کا موازنہ
| پیرامیٹر | 2EDN7524GXTMA1 | 2ED21064S06JXUMA1 |
|---|---|---|
| برانڈ | Infineon | Infineon |
| زمرہ | Power MOSFET Drivers | Power MOSFET Drivers |
| لائف سائیکل کی حالت | فعال | فعال |
| Product Type | Low-side gate driver IC | — |
| Number of Channels | 2 (dual) | — |
| Drive Current (Source/Sink) | 5 A peak | — |
| Input Logic | Non-inverting, TTL / 3.3 V CMOS-compatible | — |
| Input Voltage Tolerance | -10 V to +20 V on logic pins | — |
| Supply Voltage (VCC) | 4.5 V to 20 V [DATA_NEEDED: exact range] | 10 V to 20 V |
| Propagation Delay | 20 ns typical [DATA_NEEDED: exact figure] | — |
| Channel-to-Channel Delay Matching | 1 ns | — |
| رائز ٹائم | 5 ns typical [DATA_NEEDED: exact test condition] | — |
| فال ٹائم | 5 ns typical [DATA_NEEDED: exact test condition] | — |
| Output Stage | Rail-to-rail, separate source/sink | — |
| UVLO Protection | Yes | — |
| آپریٹنگ درجہ حرارت | -40 C to +125 C | -40C to +125C |
| پیکیج | PG-WSON-8-1 (3 mm x 3 mm) with exposed thermal pad | PG-DSO-14 (14-pin SOIC) |
| ماؤنٹنگ ٹائپ | Surface Mount | Surface Mount |
| MSL لیول | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| RoHS اسٹیٹس | Compliant | ROHS3 Compliant |
| Target Devices | Standard MOSFETs, superjunction MOSFETs, GaN HEMTs | — |
| فنکشن | — | High-Side and Low-Side Gate Driver |
| Configuration | — | Half-Bridge (2 outputs, non-inverting) |
| ٹوپولوجی | — | High-Side, Low-Side with integrated bootstrap diode |
| Maximum Offset / Boot Voltage | — | 650 V |
| Source Current (typical) | — | 0.29 A |
| Sink Current (typical) | — | 0.7 A |
| Rise Time (typical) | — | [DATA_NEEDED: rise time] |
| Fall Time (typical) | — | [DATA_NEEDED: fall time] |
| Propagation Delay (typical) | — | 100 ns |
| Channel-to-Channel Delay Match | — | [DATA_NEEDED: channel-to-channel delay match] |
| Under-Voltage Lockout | — | Yes (both channels) |
| Bootstrap Diode | — | Integrated |
| Input Logic Compatibility | — | 3.3 V / 5 V CMOS |
| Negative Gate Drive Robustness | — | -0.7 V |