2EDN7524GXTMA1 vs 2ED21064S06JXUMA1 مقارنة
مقارنة تفصيلية جنبًا إلى جنب لـ 2EDN7524GXTMA1 بواسطة Infineon و 2ED21064S06JXUMA1 بواسطة Infineon. قارن المواصفات الرئيسية والمعلمات الكهربائية والتغليف وحالة دورة الحياة والأسعار والتوافر لتحديد أفضل مكوّن لمتطلبات تصميمك.
Infineon
2EDN7524GXTMA1 - 5A Dual Low-Side Gate Driver for MOSFET/GaN | Infineon
2EDN7524GXTMA1 ✓ نشطمقارنة المواصفات
| المعامل | 2EDN7524GXTMA1 | 2ED21064S06JXUMA1 |
|---|---|---|
| العلامة التجارية | Infineon | Infineon |
| الفئة | Power MOSFET Drivers | Power MOSFET Drivers |
| حالة دورة الحياة | نشط | نشط |
| Product Type | Low-side gate driver IC | — |
| Number of Channels | 2 (dual) | — |
| Drive Current (Source/Sink) | 5 A peak | — |
| Input Logic | Non-inverting, TTL / 3.3 V CMOS-compatible | — |
| Input Voltage Tolerance | -10 V to +20 V on logic pins | — |
| Supply Voltage (VCC) | 4.5 V to 20 V [DATA_NEEDED: exact range] | 10 V to 20 V |
| Propagation Delay | 20 ns typical [DATA_NEEDED: exact figure] | — |
| Channel-to-Channel Delay Matching | 1 ns | — |
| زمن الصعود | 5 ns typical [DATA_NEEDED: exact test condition] | — |
| زمن السقوط | 5 ns typical [DATA_NEEDED: exact test condition] | — |
| Output Stage | Rail-to-rail, separate source/sink | — |
| UVLO Protection | Yes | — |
| درجة حرارة التشغيل | -40 C to +125 C | -40C to +125C |
| العلبة | PG-WSON-8-1 (3 mm x 3 mm) with exposed thermal pad | PG-DSO-14 (14-pin SOIC) |
| نوع التركيب | Surface Mount | Surface Mount |
| مستوى MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| حالة RoHS | Compliant | ROHS3 Compliant |
| Target Devices | Standard MOSFETs, superjunction MOSFETs, GaN HEMTs | — |
| الوظيفة | — | High-Side and Low-Side Gate Driver |
| Configuration | — | Half-Bridge (2 outputs, non-inverting) |
| البنية الطوبولوجية | — | High-Side, Low-Side with integrated bootstrap diode |
| Maximum Offset / Boot Voltage | — | 650 V |
| Source Current (typical) | — | 0.29 A |
| Sink Current (typical) | — | 0.7 A |
| Rise Time (typical) | — | [DATA_NEEDED: rise time] |
| Fall Time (typical) | — | [DATA_NEEDED: fall time] |
| Propagation Delay (typical) | — | 100 ns |
| Channel-to-Channel Delay Match | — | [DATA_NEEDED: channel-to-channel delay match] |
| Under-Voltage Lockout | — | Yes (both channels) |
| Bootstrap Diode | — | Integrated |
| Input Logic Compatibility | — | 3.3 V / 5 V CMOS |
| Negative Gate Drive Robustness | — | -0.7 V |