2EDN7524GXTMA1 vs 2ED21064S06JXUMA1 مقایسه
مقایسه دقیق کنار به کنار 2EDN7524GXTMA1 توسط Infineon و 2ED21064S06JXUMA1 توسط Infineon. مشخصات کلیدی، پارامترهای الکتریکی، بسته‌بندی، وضعیت چرخه عمر، قیمت‌گذاری و موجودی را مقایسه کنید تا بهترین قطعه را برای نیازهای طراحی خود تعیین کنید.
Infineon
2EDN7524GXTMA1 - 5A Dual Low-Side Gate Driver for MOSFET/GaN | Infineon
2EDN7524GXTMA1 ✓ فعالمقایسه مشخصات
| پارامتر | 2EDN7524GXTMA1 | 2ED21064S06JXUMA1 |
|---|---|---|
| برند | Infineon | Infineon |
| دسته‌بندی | Power MOSFET Drivers | Power MOSFET Drivers |
| وضعیت چرخه عمر | فعال | فعال |
| Product Type | Low-side gate driver IC | — |
| Number of Channels | 2 (dual) | — |
| Drive Current (Source/Sink) | 5 A peak | — |
| Input Logic | Non-inverting, TTL / 3.3 V CMOS-compatible | — |
| Input Voltage Tolerance | -10 V to +20 V on logic pins | — |
| Supply Voltage (VCC) | 4.5 V to 20 V [DATA_NEEDED: exact range] | 10 V to 20 V |
| Propagation Delay | 20 ns typical [DATA_NEEDED: exact figure] | — |
| Channel-to-Channel Delay Matching | 1 ns | — |
| زمان صعود | 5 ns typical [DATA_NEEDED: exact test condition] | — |
| زمان افت | 5 ns typical [DATA_NEEDED: exact test condition] | — |
| Output Stage | Rail-to-rail, separate source/sink | — |
| UVLO Protection | Yes | — |
| دمای کاری | -40 C to +125 C | -40C to +125C |
| بسته‌بندی | PG-WSON-8-1 (3 mm x 3 mm) with exposed thermal pad | PG-DSO-14 (14-pin SOIC) |
| نوع نصب | Surface Mount | Surface Mount |
| سطح MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| وضعیت RoHS | Compliant | ROHS3 Compliant |
| Target Devices | Standard MOSFETs, superjunction MOSFETs, GaN HEMTs | — |
| عملکرد | — | High-Side and Low-Side Gate Driver |
| Configuration | — | Half-Bridge (2 outputs, non-inverting) |
| توپولوژی | — | High-Side, Low-Side with integrated bootstrap diode |
| Maximum Offset / Boot Voltage | — | 650 V |
| Source Current (typical) | — | 0.29 A |
| Sink Current (typical) | — | 0.7 A |
| Rise Time (typical) | — | [DATA_NEEDED: rise time] |
| Fall Time (typical) | — | [DATA_NEEDED: fall time] |
| Propagation Delay (typical) | — | 100 ns |
| Channel-to-Channel Delay Match | — | [DATA_NEEDED: channel-to-channel delay match] |
| Under-Voltage Lockout | — | Yes (both channels) |
| Bootstrap Diode | — | Integrated |
| Input Logic Compatibility | — | 3.3 V / 5 V CMOS |
| Negative Gate Drive Robustness | — | -0.7 V |