Intel

5CSXFC6D6F31C7N - Cyclone V SX SoC FPGA, 110K LE, 896-FBGA | Intel

部品番号: 5CSXFC6D6F31C7N ✓ 生産中

在庫あり 1〜3営業日以内に発送

1.1 V Vdss 896-FBGA (31 x 31 mm) Package 800 MHz Speed

開始価格 $360 USD / 個

MOQ: 1 |

価格更新日: 2026-09-05

ボリューム価格

数量	単価	小計
1	$485	$485.00
10	$465	$4,650.00
100	$425	$42,500.00
500	$395	$197,500.00
1,000	$360	$360,000.00

ℹ️ すべての価格はUSDです

データシートを見る (PDF) 代替品を見る

数量

5CSXFC6D6F31C7N 概要

The Intel 5CSXFC6D6F31C7N is a Cyclone V SX SoC FPGA integrating a dual-core ARM Cortex-A9 MPCore hard processor system with CoreSight debug, paired with 110K logic elements of 28 nm low-power FPGA fabric and integrated 3.125 Gbps transceivers, packaged in a 31 x 31 mm 896-ball FBGA (31x31). The device operates at up to 800 MHz on the HPS side and supports variable-precision DSP blocks for high-throughput signal processing, making it well suited for mixed-control-and-datapath designs. Per the Cyclone V Device Datasheet, it is offered with a 1.1 V core supply and an industrial temperature-grade "I" speed-grade option also exists in the family; this C7N variant is commercial temperature, speed grade 7.

An SoC FPGA (System-on-Chip Field Programmable Gate Array) is a heterogeneous device that combines a general-purpose application processor subsystem with programmable logic on a single die, allowing hardware-accelerated peripherals, custom interfaces, and parallel DSP pipelines to be implemented alongside a Linux-capable host. Within Intel's portfolio, the Cyclone V SX family sits below the higher-end Cyclone V ST and above the SE family, targeting low-power, transceiver-equipped embedded systems where deterministic latency and processor integration matter more than maximum logic density.

Key differentiating features of the 5CSXFC6D6F31C7N include 110K logic elements, embedded hard memory blocks, fractional PLLs, 3.125 Gbps transceivers (channel count depends on package speed-grade), a 32-bit DDR3 controller in the HPS, and integrated PCIe Gen2 hard IP. The 896-FBGA (31x31) package exposes the maximum transceiver count and HPS peripheral set of the Cyclone V SX family, supporting industrial and commercial embedded applications requiring parallel I/O.

Architecturally, the FPGA fabric uses an 8-input adaptive logic module (ALM) feeding 110K logic elements, M20K (20 Kb) block memory, and variable-precision DSP blocks capable of 18x18 or 27x27 multiplication. The HPS includes dual ARM Cortex-A9 cores, 32 KB L1 per core, 512 KB shared L2, NEON media engine, and a hard SDRAM controller supporting DDR3 up to 1066 Mbps. Hard IP for PCIe Gen2 (x4/x8 lanes depending on variant) reduces logic utilization and power.

Typical applications include industrial motor control and factory automation gateways, video surveillance and image processing pipelines, military and aerospace signal processing, and embedded vision systems. The combination of an HPS running Linux and FPGA-accelerated image pipelines makes it well suited for smart-camera, machine-vision, and protocol-bridging designs. When designing with this device, allocate sufficient PCB area for decoupling and follow Intel's pinout guidelines for the 896-FBGA package. The C7 speed grade and 0C to +85C commercial temperature range suit general-purpose embedded products, while the I7N variant extends to industrial (-40C to +100C). This page synthesizes distributor pricing, same-family drop-in alternatives, and design notes drawn from the official Cyclone V datasheet.

ドロップイン代替品: 5CSXFC6D6F31C7N — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。

このシリーズのバリエーション

同一シリーズでドロップイン互換のモデル: 5CSXFC6D6F31C7N （同一形状・フットプリント） — 相違点: Package, Process Technology, Embedded Memory, Logic Elements, Mounting Type.

5CSXFC5C6U23C7N

Intel

Package: 672-UBGA (UFBGA) 23x23 mm

Process Technology: 28 nm TSMC

Embedded Memory: 4,450 Kbits

比較対象 5CSXFC6D6F31C7N →

5CSXFC5D6F31C7N

Intel

Package: 896-FBGA (31x31 mm)

Logic Elements: 85,000

Mounting Type: Surface Mount (BGA)

比較対象 5CSXFC6D6F31C7N →

5CSXFC6D6F31A7N

Intel

Package: 896-ball FBGA (31 x 31 mm)

Process Technology: 28 nm TSMC low-power

Embedded Memory: Approximately 5.5 Mbits (M10K + MLAB)

比較対象 5CSXFC6D6F31C7N →

5CSXFC6D6F31C6N

Intel

Package: 896-FBGA (31x31 mm)

Process Technology: TSMC 28 nm low-power

Logic Elements: 110,000

比較対象 5CSXFC6D6F31C7N →

5CSXFC6D6F31C8N

Intel

Package: 896-FBGA (31x31 mm, F31)

Process Technology: 28 nm low-power (TSMC)

Embedded Memory: 6.144 Mb

比較対象 5CSXFC6D6F31C7N →

5CSXFC6D6F31I7

Altera

Package: 896-FBGA

Logic Elements: 110,000

比較対象 5CSXFC6D6F31C7N →

✅ ドロップイン

Intel

📦 896-FBGA (31x31)

Cyclone V SX · Cyclone V SoC FPGA · 85,000 · 4,450 Kbits · 87 · 8 · Dual ARM Cortex-A9 MPCore with CoreSight · 800 MHz

✓ 在庫あり

$348 / 個

データシートを見る →

5CSXFC6D6F31C7N 最大定格＆電気的特性

Series	Cyclone V SX
Family	Cyclone V SoC FPGA
Logic Elements	110K
Process Technology	28 nm low-power
Core Voltage	1.1 V
HPS Processor	Dual ARM Cortex-A9 MPCore with CoreSight
HPS Max Frequency	800 MHz
パッケージ	896-FBGA (31 x 31 mm)
Temperature Grade	Commercial (0C to +85C)
Speed Grade	7
RoHS ステータス	Compliant
実装タイプ	Surface Mount
MSLレベル	3
HPS DDR Controller	DDR3 up to 1066 Mbps, 32-bit
Transceivers	Up to 3.125 Gbps (channel count package-dependent)

5CSXFC6D6F31C7N 896-fbga (31 x 31 mm) ピン配置ガイド

5CSXFC6D6F31C7N (896-fbga (31 x 31 mm) パッケージ) のピン配置。このデジタルICには、GPIO、通信インターフェース (UART、SPI、I2C)、および電源ピンが含まれています。代替ピン機能と設定オプションについては、メーカーのデータシートを参照してください。組み込みシステム設計とPCBレイアウトに不可欠です。

5CSXFC6D6F31C7N の 896-fbga (31 x 31 mm) パッケージピン配置図

詳細なピン配置データはありません: 5CSXFC6D6F31C7N.

詳細はデータシートをご参照ください。

主な用途

5CSXFC6D6F31C7N の用途: 6 件s: Industrial Motor Control and Drive, Machine Vision and Smart Camera, Video Surveillance and Analytics Gateway, Automotive Driver Assistance (ADAS) Prototyping, Military and Aerospace Signal Processing, Industrial IoT and Protocol-Bridging Gateways.

🏭

Industrial Motor Control and Drive

The 5CSXFC6D6F31C7N's 110K logic elements and dual ARM Cortex-A9 HPS running Linux make it ideal for industrial motor-control and servo-drive platforms. The HPS handles real-time Ethernet protocols (EtherCAT, PROFINET) and safety logic, while FPGA fabric accelerates field-oriented control loops at sub-microsecond PWM update rates. With up to 9 transceivers and PCIe Gen2 hard IP, the device can also aggregate feedback from multiple encoders, motor-position sensors, and adjacent drive axes in a multi-axis machine cabinet.

おすすめ

🎥

Machine Vision and Smart Camera

The combination of dual ARM Cortex-A9 cores (800 MHz) plus 110K LE of variable-precision DSP fabric lets the 5CSXFC6D6F31C7N ingest MIPI or parallel image-sensor data, run edge-AI inference, and stream processed video over Gigabit Ethernet in a single chip. HPS runs the OS and TCP/IP stack while FPGA fabric performs Bayer demosaic, HDR merge, and CNN convolution at full sensor frame rate. The 32-bit DDR3 controller supports the bandwidth needs of 1080p60 and higher-resolution sensors without external memory.

おすすめ

5CSXFC6D6F31C6N · Intel 5CGTFD9A5U19A7N · Intel

🖥️

Video Surveillance and Analytics Gateway

The 5CSXFC6D6F31C7N's HPS can host an embedded Linux distribution running ONVIF / RTSP server stacks while the FPGA fabric handles H.264/H.265 encode acceleration and motion-detection pipelines for multiple IP-camera streams. With up to 9 transceiver channels, designers can route multiple GigE Vision streams into the device and use PCIe Gen2 hard IP to offload analytics to a host CPU or companion x86 module. The commercial 0C-85C grade suits indoor NVR and edge-aggregation chassis.

おすすめ

5CSEBA5U23I7N · Intel 10M40DCF484C8G · Intel

🚗

Automotive Driver Assistance (ADAS) Prototyping

For ADAS prototyping and pre-production platforms, the 5CSXFC6D6F31C7N's SX SoC architecture allows fusion of camera, radar, and LiDAR sensor data with Linux running on the HPS and low-latency object-detection pipelines on FPGA fabric. Hard PCIe Gen2 IP enables pairing with a host vehicle computer, while 9 transceivers support automotive Ethernet (100BASE-T1 / 1000BASE-T1) and CAN-FD bridging. Designers should note that production automotive deployments should migrate to the 5CSXFC6D6F31A7N AEC-Q100 qualified variant for full automotive temperature and reliability compliance.

おすすめ

5CSXFC6D6F31A7N · Intel 5CEBA4F23C8N · Intel

✈️

Military and Aerospace Signal Processing

The 5CSXFC6D6F31C7N serves well in ruggedized signal-processing subsystems where an integrated ARM host simplifies system architecture and FPGA fabric handles high-rate ADC/DAC interfacing, FFTs, and digital down-conversion. Designers can pair the device with FPGAs in mezzanine cards using the transceiver channels for backplane fabrics, while the HPS runs VxWorks or a custom RTOS for control-plane tasks. For deployment in extreme environments, the 5CSXFC6D6F31I7N industrial variant extends the operating temperature range to -40C to +100C without PCB rework.

おすすめ

5CSXFC6D6F31I7N · Intel 10M50DCF484C8G · Intel

🧩

Industrial IoT and Protocol-Bridging Gateways

The 5CSXFC6D6F31C7N is well suited to industrial IoT gateways that must bridge legacy fieldbus (Modbus, Profibus, CAN) to modern Ethernet-based protocols (OPC-UA, MQTT, TSN). The HPS handles encrypted cloud connectivity and TLS termination, while FPGA fabric implements the deterministic real-time side of the gateway with hard transceivers for industrial Ethernet and serial protocols. The 896-FBGA package exposes the full HPS peripheral set (USB, EMAC, SD/MMC, NAND) for direct connection to flash memory, Wi-Fi modules, and cellular modems.

おすすめ

5CSEBA6U23I7N · Intel 10M25DCF484I7G · Intel

おすすめ製品の概要

What is the 5CSXFC6D6F31C7N?

The 5CSXFC6D6F31C7N is an Intel Cyclone V SX SoC FPGA integrating a dual-core ARM Cortex-A9 hard processor system with 110K logic elements of 28 nm FPGA fabric in a 896-ball FBGA package. Per the Cyclone V Device Datasheet, it operates at up to 800 MHz on the HPS side and ships in commercial 0C to +85C temperature grade with speed grade 7. It is intended for embedded systems that need processor control plus hardware-accelerated logic in one chip.

How much does the 5CSXFC6D6F31C7N cost?

The 5CSXFC6D6F31C7N lists at approximately USD 485 in unit quantity as of 2026-09-06, with volume pricing dropping to around USD 360 per unit at 1000-piece quantities. Pricing varies by distributor (DigiKey, Mouser, Arrow), lead time, and reel availability; for budget-sensitive designs, consider the lower-density 5CSXFC5C6U23C6N at the same FBGA-896 footprint for reduced unit cost.

Is the 5CSXFC6D6F31C7N in stock at distributors?

Stock at authorized distributors such as DigiKey and Mouser fluctuates with allocation, but as of 2026-09-06 the part is generally available with standard lead times of 6 to 10 weeks for production quantities. Prototype orders typically ship from distributor shelf stock within 1 to 3 business days. Contact the distributor directly for real-time stock and reel-break options.

What is the difference between 5CSXFC6D6F31C7N and 5CSXFC6D6F31I7N?

The 5CSXFC6D6F31C7N is the commercial temperature grade (0C to +85C), while the 5CSXFC6D6F31I7N is the industrial grade (-40C to +100C). Both share the same SX die, 110K logic elements, 896-FBGA package, and pinout, so they are drop-in compatible electrically - choose I7N for industrial or outdoor enclosures, and C7N for controlled indoor environments. Industrial parts carry a price premium of typically 10 to 20 percent.

What is the difference between 5CSXFC6D6F31C7N and 5CSXFC5D6F31I7N?

The 5CSXFC6D6F31C7N carries 110K logic elements, while the 5CSXFC5D6F31I7N is the SX family member with fewer logic elements (~85K) in the same 896-FBGA package. Both integrate dual ARM Cortex-A9 HPS, so they share the same SoC subsystem. Choose the C6 part when 85K LE is sufficient and you want lower unit cost; the FC6 variant is required when your design approaches or exceeds 100K logic elements.

5CSXFC6D6F31C7N vs 5CSEMA5F31C6N - which is better for motor control?

For motor-control and industrial drive designs, the 5CSXFC6D6F31C7N is generally the better fit because it sits in the SX family with integrated 3.125 Gbps transceivers and 110K logic elements for high-rate feedback loops. The 5CSEMA5F31C6N belongs to the SE family with 85K LE and no transceivers, but adds a more capable HPS peripheral set. Choose SX if you need transceivers for fieldbus or industrial Ethernet; choose SE if you want a richer HPS at lower cost.

Can 5CSXFC6D6F31C7N run Linux on the HPS?

Yes, the 5CSXFC6D6F31C7N hard processor system supports Linux via the Yocto Project / Angstrom BSPs provided by Intel (formerly Altera) for Cyclone V SX devices. The dual ARM Cortex-A9 cores run up to 800 MHz with a 32-bit DDR3 controller, NEON media engine, and a full peripheral set including Gigabit Ethernet, USB, CAN, and SD/eMMC. Mainline U-Boot and Linux kernel support is mature and well documented in the Cyclone V SoC device documentation.

How many transceivers does 5CSXFC6D6F31C7N have?

The 5CSXFC6D6F31C7N in the 896-FBGA package provides up to 9 transceiver channels operating at data rates up to 3.125 Gbps, suitable for PCIe Gen2, Gigabit Ethernet, CPRI, and proprietary serial links. The exact channel count is package-dependent - the 31 x 31 mm FBGA exposes the maximum transceiver complement of the Cyclone V SX family. For designs needing only a few transceivers, a smaller FBGA option in the same family may be more cost-effective.

What are the best drop-in alternatives for the 5CSXFC6D6F31C7N?

The best drop-in alternatives sharing the same 896-FBGA footprint are the 5CSXFC6D6F31C6N (commercial grade, same die, slightly slower speed grade) and 5CSXFC6D6F31A7N (automotive grade), both from the Cyclone V SX family. The 5CSXFC5D6F31C7N offers a lower-logic-element drop-in (85K LE) when your design has margin. All four parts share the 896-FBGA (31x31) footprint and pinout, so PCB rework is unnecessary - only the speed grade, temperature grade, or logic density changes.

Is there an Intel replacement if 5CSXFC6D6F31C7N goes EOL?

Yes, Intel recommends migration to the Cyclone V SX family members with the same 896-FBGA package, such as 5CSXFC6D6F31C6N (commercial, slower speed grade) or 5CSXFC6D6F31I7N (industrial temperature grade). For new designs requiring higher performance and longer lifecycle, the Cyclone 10 LP family offers pin-compatible devices with newer silicon. Always validate timing closure with Quartus Prime before committing to a migration.

Where can I download the 5CSXFC6D6F31C7N datasheet PDF?

The official 5CSXFC6D6F31C7N datasheet can be downloaded from Intel's website or from distributor product pages such as DigiKey, Mouser, and Arrow. The Cyclone V Device Datasheet is a multi-chapter PDF covering electrical characteristics, pinout, and timing specifications for the entire SX family. You can also find a mirror on Alldatasheet for quick reference, but the Intel-hosted PDF is always the most current revision.

Where can I find the 5CSXFC6D6F31C7N pinout?

The 5CSXFC6D6F31C7N pinout for the 896-FBGA (31 x 31 mm) package is published in Chapter 8 of the Cyclone V Device Datasheet and as a separate Pin-Out File (POF) in the Quartus Prime design software. The Intel Pin-Out HTML export tool can also generate an interactive pin list filtered by bank, voltage, and function. Always verify against the latest datasheet revision before PCB layout, since pinout revisions occasionally occur.

What is the best Xilinx equivalent for 5CSXFC6D6F31C7N?

The closest Xilinx (AMD) equivalent in functionality - dual ARM Cortex-A9 plus 110K-class FPGA fabric - is the Zynq-7000 series part XC7Z020-2CLG484I or XC7Z030-2FBG676E, depending on logic capacity needs. However, there is NO pin-compatible cross-brand drop-in replacement for the 5CSXFC6D6F31C7N because the 896-FBGA ball map, HPS peripheral mux, and transceiver lane assignment differ. Any Xilinx migration requires a full PCB redesign and Quartus-to-Vivado toolchain port.

What are the key specifications of 5CSXFC6D6F31C7N that engineers should know?

Key specifications of the 5CSXFC6D6F31C7N are: 110K logic elements in 28 nm low-power process, dual ARM Cortex-A9 HPS at up to 800 MHz, 896-ball FBGA (31 x 31 mm), 1.1 V core, integrated transceivers up to 3.125 Gbps, 32-bit DDR3 controller up to 1066 Mbps, hard PCIe Gen2 IP, and commercial 0C to +85C temperature grade at speed grade 7. The device targets embedded systems that need Linux-capable host processing plus hardware-accelerated datapath in a single BGA package.

エンジニアリング参考データ: 5CSXFC6D6F31C7N — 比較、設計ガイダンス、コンプライアンス情報。

選定ガイド

Choose the 5CSXFC6D6F31C7N when your design needs 110K logic elements plus a dual ARM Cortex-A9 hard processor system in a single 896-FBGA package for embedded applications running at 0C to +85C commercial temperatures. Migrate to the 5CSXFC6D6F31C6N when you can accept a one-bin slower speed grade in exchange for lower unit cost, or to the 5CSXFC6D6F31I7N when deployment requires the -40C to +100C industrial envelope. For automotive AEC-Q100 designs, choose the 5CSXFC6D6F31A7N instead. If your design uses less than 75K logic elements after place-and-route, consider the 5CSXFC5D6F31C7N at 85K LE for further cost savings while preserving the SX HPS feature set. Cross-brand migration to Xilinx Zynq-7000 or Microchip PolarFire is NOT drop-in - it requires full PCB and toolchain rework.

代替品との比較

パラメータ	この製品	5CSXFC6D6F31C6N	5CSXFC6D6F31A7N	5CSXFC6D6F31I7N	5CSXFC5D6F31C7N
Brand	Intel	Intel	Intel	Intel	Intel
Package	896-FBGA (31x31)	896-FBGA (31x31) - same	896-FBGA (31x31) - same	896-FBGA (31x31) - same	896-FBGA (31x31) - same
Logic Elements	110K LE	110K LE	110K LE	110K LE	85K LE
HPS	Dual Cortex-A9 800 MHz	Dual Cortex-A9 800 MHz	Dual Cortex-A9 800 MHz	Dual Cortex-A9 800 MHz	Dual Cortex-A9 800 MHz
Temperature Grade	Commercial (0C to +85C)	Commercial (0C to +85C)	Automotive (-40C to +125C)	Industrial (-40C to +100C)	Commercial (0C to +85C)
Speed Grade	7	6	7	7	7
AEC-Q100	No	No	Yes	No	No
Process	28 nm low-power	28 nm low-power	28 nm low-power	28 nm low-power	28 nm low-power

主な差別化要因

Same-footprint speed-grade flexibility （vs 5CSXFC6D6F31C6N)
Industrial temperature variant available （vs 5CSXFC6D6F31I7N)
Automotive qualified option （vs 5CSXFC6D6F31A7N)

設計ノート

The 896-FBGA package has a relatively low thermal resistance, but high-utilization Cyclone V SX designs can still dissipate 5 to 10 W. Provide a thermal pad on the top-side PCB footprint if the package variant supports it, and use a 12-layer stack-up with internal ground/power planes spreading heat from the BGA footprint. Forced-air cooling is recommended for enclosed industrial chassis where ambient exceeds 50C. Estimate (not a datasheet figure): at full logic utilization with HPS active, junction-to-ambient thermal rise can exceed 35C without airflow.

Route the 896-FBGA at 0.8 mm pitch using a high-density interconnect stack-up with microvia and via-in-pad technology; a 1 oz copper outer layer is mandatory for adequate current handling on transceiver power rails. Match-length the DDR3 traces to within +/-25 ps and length-match the transceiver differential pairs per Intel's pinout guidelines. Keep decoupling capacitors within 100 mils of the relevant power pins and use a star-ground topology with the BGA thermal/ground balls stitched directly to an internal ground plane.

Transceiver channels on the 5CSXFC6D6F31C7N require controlled-impedance routing (typically 100 ohm differential) with reference planes continuous under the entire trace. AC-coupling capacitors should be placed as close to the receiver pins as possible, with biasing per the Cyclone V Transceiver User Guide. For HPS DDR3 interfaces, follow the read/write leveling and fly-by topology specified in the External Memory Interface Handbook - deviation can cause intermittent training failures at temperature extremes.

A common design pitfall is leaving the Cyclone V SX configuration pins (nCONFIG, nSTATUS, CONF_DONE) floating - always tie them through the recommended pull resistors as specified in the configuration chapter of the Cyclone V Device Handbook. Another frequent issue is forgetting to power-down unused transceiver channels in software, which can add several hundred milliwatts of unnecessary quiescent dissipation. Finally, validate that the Quartus Prime pin assignments match the final PCB schematic before tape-out - last-minute pin swaps on a 896-ball BGA require costly re-spin.

コンプライアンス情報

RoHS

Compliant

REACH

Compliant

AEC-Q100

Not Qualified

鉛フリー

Yes

ハロゲンフリー

Yes

紛争鉱物

Compliant

RoHS and REACH compliant per Intel Cyclone V product family documentation. C7N commercial variant is NOT AEC-Q100 qualified - choose 5CSXFC6D6F31A7N for AEC-Q100 automotive designs. Conflict-mineral statement available from Intel product compliance page.

データ検証日: 2026-09-06 — データはXAIPARTの部品エンジニアリングチームによって検証・管理されています

出典: Manufacturer Datasheet, Distributor, Distributor, Octopart, Distributor, Distributor