UCC21520Q-Q1 - 4A/6A 5.7kVRMS Isolated Dual Gate Driver | TI
部品番号: UCC21520Q-Q1 ✓ 生産中| 数量 | 単価 | 小計 |
|---|---|---|
| 1 | $4.95 | $4.95 |
| 10 | $4.46 | $44.60 |
| 100 | $3.71 | $371.00 |
| 500 | $3.22 | $1,610.00 |
| 1,000 | $2.85 | $2,850.00 |
UCC21520Q-Q1 概要
An isolated gate driver is a power-management IC that transfers a low-voltage logic-level PWM signal across a galvanic isolation barrier to drive the gate of a power semiconductor floating at high voltage. Within the signal-chain hierarchy, it sits between the PWM controller or microcontroller and the power stage, combining the functions of a logic buffer, level shifter, and isolation barrier in a single device.
Key features include best-in-class propagation delay and pulse-width distortion, TTL- and CMOS-compatible input thresholds on INA, INB, and DIS pins that are independent of VDD, under-voltage lockout (UVLO) protection on all supply pins, and flexible dual-input configuration that allows the device to fit half-bridge, full-bridge, and dual low-side or high-side topologies. The 8-V UVLO variant ensures gate-drive integrity with SiC MOSFETs that require higher gate-source thresholds.
The capacitive isolation architecture uses an on-chip SiO2 barrier delivering reinforced isolation rated at 5.7 kVRMS, supporting functional safety requirements in automotive traction inverters, onboard chargers, and high-voltage servo drives. High CMTI tolerance allows reliable operation in the presence of fast dv/dt switching edges typical of GaN and SiC power stages.
Typical applications include automotive traction inverters, 48 V and high-voltage DC-DC converters, onboard chargers, solar string inverters, and industrial motor drives using SiC or IGBT power modules.
When designing, verify that the VDDA/VDDB UVLO threshold matches the gate-drive voltage requirements of the selected power switch, and keep the gate-drive loop inductance minimal with closely coupled return paths.
ドロップイン代替品: UCC21520Q-Q1 — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。
このシリーズのバリエーション
同一シリーズでドロップイン互換のモデル: UCC21520Q-Q1 （同一形状・フットプリント） — 相違点: Package, Input Threshold, Isolation Rating, Isolation Technology, CMTI.
クイック比較ツール — 並列比較する代替部品を選択:
UCC21520
✅ ドロップイン✓ 在庫あり
$1.55 / 個
データシートを見る →UCC21521DWR
✅ ドロップイン ⚠️ 仕様未検証✓ 在庫あり
$2.15 / 個
データシートを見る →UCC21530
✅ ドロップイン✓ 在庫あり
$1.75 / 個
データシートを見る →UCC21550
⚡ 同一パッケージ✓ 在庫あり
$1.25 / 個
データシートを見る →NCP51705
⚡ 同一パッケージ ⚠️ 仕様未検証📋 参考代替品（カタログ未掲載）
UCC21520Q-Q1 最大定格＆電気的特性
| 出力構成 | Dual-channel isolated gate driver |
| Peak Source Current | 4 A |
| Peak Sink Current | 6 A |
| Isolation Rating | 5.7 kVRMS (reinforced) |
| Isolation Technology | Capacitive (SiO2) |
| CMTI | 125 V/ns minimum |
| Maximum Switching Frequency | 5 MHz |
| UVLO | Yes, on all supply pins (8-V UVLO variant) |
| Input Threshold | TTL and CMOS compatible, independent of VDD |
| Control Pins | INA, INB, DIS (disable) |
| Target Power Devices | Power MOSFETs, IGBTs, SiC MOSFETs |
| パッケージ | 16-SOIC wide-body (DWQ), surface mount |
| Automotive Qualification | AEC-Q100 (Q1) |
| RoHS ステータス | Compliant |
UCC21520Q-Q1 ピン構成
| ピン 1 | VCCI — Input-side supply voltage |
| ピン 2 | GND — Input-side ground reference |
| ピン 3 | INB — Input B (TTL/CMOS compatible) |
| ピン 4 | INA — Input A (TTL/CMOS compatible) |
| ピン 5 | DIS — Disable input (high disables outputs) |
| ピン 6 | NC — No connect (isolation clearance) |
| ピン 7 | NC — No connect (isolation clearance) |
| ピン 8 | VDDA — Output A supply with UVLO |
| ピン 9 | OUTA — Gate drive output A (4-A source / 6-A sink) |
| ピン 10 | GND — Output A ground return |
| ピン 11 | NC — No connect (isolation clearance) |
| ピン 12 | NC — No connect (isolation clearance) |
| ピン 13 | VDDB — Output B supply with UVLO |
| ピン 14 | OUTB — Gate drive output B (4-A source / 6-A sink) |
| ピン 15 | GNDB — Output B ground return |
| ピン 16 | NC — No connect |
主な用途
UCC21520Q-Q1 の用途: 6 件s: Automotive Traction Inverter, Onboard Charger (OBC), Solar String Inverter, Industrial Motor Drives, High-Voltage DC-DC Converters, SiC Power Module Evaluation and Test Systems.
Automotive Traction Inverter
In traction inverters, the UCC21520Q-Q1 drives SiC MOSFET or IGBT half-bridge modules from a controller referenced to low-voltage chassis ground. Its 5.7-kVRMS reinforced isolation and minimum 125 V/ns CMTI survive the fast switching edges of 800-V SiC stages, while 4-A/6-A peak currents minimize switching losses that directly affect driving range. AEC-Q100 qualification supports the automotive quality flow required by OEMs. Place the driver close to the module gate terminals and use separate source return pins for each channel to limit loop inductance below 10 nH.
おすすめ
Onboard Charger (OBC)
Automotive onboard chargers use PFC and LLC power stages at high voltage, requiring reinforced isolation between the digital controller and floating power switches. The UCC21520-Q1 provides 5.7-kVRMS reinforced isolation in a compact 16-SOIC, and its dual-input configuration fits both half-bridge PFC and LLC topologies. The 8-V UVLO ensures SiC MOSFETs are not driven with insufficient gate voltage, preventing operation in the resistive region. At 100-kHz+ LLC switching, the driver's low propagation delay and pulse-width distortion preserve duty-cycle accuracy for resonant control.
おすすめ
Solar String Inverter
Solar string inverters drive IGBT or SiC half-bridges at 600 to 1500 V DC bus, where the UCC21520-Q1's reinforced isolation barrier meets grid-tied safety isolation requirements. High CMTI of at least 125 V/ns tolerates the dv/dt of fast power devices switching at 20 to 100 kHz, and the DIS pin allows safe shutdown during fault conditions detected by isolated sensing. The dual-channel architecture with interlock mode protects against shoot-through in half-bridge configurations, improving converter robustness in outdoor environments with wide temperature swings.
おすすめ
Industrial Motor Drives
Three-phase industrial motor drives use six gate-drive channels for IGBT or SiC power modules; the UCC21520-Q1 drives two of these channels with 4-A/6-A peaks, reducing gate resistor sizing constraints and switching loss. Best-in-class pulse-width distortion keeps phase currents balanced, minimizing torque ripple. TTL/CMOS-compatible inputs connect directly to 3.3-V MCU PWM outputs without level translation. Its UVLO on both supply pins prevents under-driven gate operation during VDDA/VDDB power-up, a common cause of power device degradation in servo and factory automation drives.
おすすめ
High-Voltage DC-DC Converters
Isolated DC-DC converters for 48-V to 400-V/800-V conversion use phase-shifted full-bridge or LLC topologies where the UCC21520-Q1 drives the primary-side bridges with reinforced isolation to the control side. Operation up to 5 MHz supports high-frequency designs that shrink magnetics, while low propagation delay enables tight phase-shift accuracy. The DIS pin supports fast system shutdown during overcurrent events detected within microseconds. Designers should provide a floating bias supply (for example, from UCC25800-Q1) for VDDB referenced to the switching node.
おすすめ
SiC Power Module Evaluation and Test Systems
Double-pulse testers and SiC module characterization rigs need gate drivers that switch at high dv/dt without corruption from common-mode transients. The UCC21520-Q1's minimum 125 V/ns CMTI and 5.7-kVRMS isolation maintain signal integrity during high-speed switching tests up to 5 MHz, enabling accurate measurement of switching energy and reverse recovery. Independent channel control via INA/INB allows single-channel double-pulse sequences, while the DIS input provides a hardware-safe enable path. Flexible dead-time control via input timing supports characterization of gate resistor combinations.
おすすめ
おすすめ製品の概要
エンジニアリング参考データ: UCC21520Q-Q1 — 比較、設計ガイダンス、コンプライアンス情報。
選定ガイド
代替品との比較
| パラメータ | この製品 | UCC21520 | UCC21521 | UCC21530 | UCC21550 | NCP51705 |
|---|---|---|---|---|---|---|
| Package | 16-SOIC wide-body (DWQ) | 16-SOIC (DW) - same | 16-SOIC (DW) - same | 16-SOIC (DW) - same | 16-SOIC (DW) | 16-SOIC |
| Brand | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | Texas Instruments | onsemi |
主な差別化要因
- Automotive AEC-Q100 qualification （vs UCC21520)
- Higher CMTI than UCC21530 （vs UCC21530)
- Active-high disable pin （vs UCC21521)
設計ノート
Keep the gate-drive loop (OUT pin, gate resistor, gate, source return) as small as possible. The DWQ wide-body SOIC provides 8 mm of creepage between input and output sides - do not route any low-voltage signals through the isolation clearance zone. Place 0.1 uF + 10 uF decoupling capacitors within 2 mm of VDDA/VDDB pins and connect the driver ground return directly to the power device source or emitter Kelvin terminal.
Size the floating bias supply (VDDB) for at least the average gate-drive current: Qg x fsw per channel, plus driver quiescent current. For a SiC MOSFET with 60 nC gate charge at 100 kHz, budget roughly 6 mA per channel plus margin. Verify the VDDB rail stays above the 8-V UVLO threshold during transients, or outputs will be forced low and cause erratic switching.
The DIS pin is active-high and overrides both inputs - do not leave it floating; tie it to GND with a pulldown if unused. Input thresholds are TTL/CMOS compatible and independent of VCCI, but slow-rising PWM edges can cause output chatter; use a Schmidt buffer or ensure controller edge rates are fast. When replacing UCC21520 with UCC21521, note the control pin polarity is inverted (EN vs DIS).
コンプライアンス情報
AEC-Q100 qualified per Q1 designation and TI datasheet title (Automotive). RoHS compliance per DigiKey listing.
