10M25SAE144I7G - MAX 10 FPGA 25K LE 144-LQFP | Intel / Altera
MPN: 10M25SAE144I7G ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $70.12 | $70.12 |
| 10 | $65.5 | $655.00 |
| 100 | $58 | $5,800.00 |
| 250 | $54.5 | $13,625.00 |
| 500 | $50.75 | $25,375.00 |
10M25SAE144I7G Overview
A MAX 10 FPGA is a non-volatile, flash-based programmable logic device that combines look-up tables, embedded memory blocks, digital signal processing blocks, phase-locked loops, and on-chip analog-to-digital converters in a single die. Within the broader programmable logic taxonomy, MAX 10 sits below Cyclone 10 LP in cost and power, above CPLDs such as MAX V in density and DSP capability, and is the lowest-cost Intel FPGA family with integrated ADC and instant-on flash configuration.
Key features include 25,000 logic elements, 45 embedded 18x18 multipliers, four 12-bit 1 MSPS analog-to-digital converters, 1.2 V core voltage, and support for LVDS, LVCMOS, SSTL, and other single-ended I/O standards. The device also integrates user flash memory for non-volatile data storage, dual configuration flash for instant-on operation, and an on-chip temperature-sensing diode. The 144-LQFP exposed-pad package (E144) provides up to 101 general-purpose user I/O with a 22x22 mm body footprint suitable for industrial reflow assembly.
The MAX 10 architecture uses a logic-element fabric with adaptive logic modules, embedded SRAM blocks, and DSP blocks optimized for fixed- and floating-point operations. The integrated 12-bit ADC supports up to 17 analog input channels via the dedicated analog package pins, while the flash-based configuration memory eliminates external boot PROMs and enables sub-10 ms instant-on behavior in safety-critical industrial systems.
Typical applications include industrial control and motor drive, machine vision pre-processing, factory automation I/O expansion, video bridging and display controllers, low-cost ASIC/ASSP replacement, and distributed I/O aggregation at the edge of industrial Ethernet networks. The combination of non-volatile flash configuration, integrated 12-bit ADC, and industrial temperature grade makes it well suited for glue-logic designs with analog sensing and instant-on behavior.
When designing with this part, ensure the exposed pad is soldered to a sufficiently large copper pour for thermal dissipation and ground integrity, since high-utilization designs in the E144 package can dissipate 1-2 W. Use Intel Quartus Prime Lite for synthesis, place-and-route, and timing closure at no additional cost. Vertical migration between MAX 10 density grades within the same E144 footprint enables seamless design scaling.
This page synthesizes distributor pricing across DigiKey, Mouser, and Arrow, cross-references drop-in same-package MAX 10 alternatives, and consolidates practical design guidance not found in the manufacturer datasheet.
Drop-in alternatives for 10M25SAE144I7G — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with 10M25SAE144I7G (same form factor and footprint) — differing in Package, Core Voltage, Logic Elements (LE), Operating Temperature, User Flash Memory.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
10M16SAE144I7G
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
10M40SAE144I7G
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$57.1 / Unit
View Datasheet →10M50SAE144I7G
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
10M25SAE144A7G
✅ Drop-In📋 Reference alternative (not in catalog)
10M25SCE144A7G
✅ Drop-In✓ In Stock
$47.21 / Unit
View Datasheet →10M08SAE144I7G
✅ Drop-In ⚠️ Specs Unverified✓ In Stock
$6.8 / Unit
View Datasheet →10M25SAE144I7G Maximum Ratings & Electrical Characteristics
| Series | MAX 10 |
| Family | MAX 10 FPGA |
| Logic Elements (LE) | 25,000 |
| Embedded Memory | 1,728 Kbits (691,200 bits) |
| Embedded Multipliers (18x18) | 45 |
| User I/O Pins | 101 |
| ADC Channels | 4 (12-bit, 1 MSPS) |
| User Flash Memory | Up to 1.6 Mbits |
| Process Node | 55 nm |
| Core Voltage | 1.2 V |
| Supply Voltage (Rails) | 3.0 V / 3.3 V |
| Operating Temperature | -40C to +100C (industrial, I7G grade) |
| Package | 144-LQFP Exposed Pad (E144), 22x22 mm |
| Mounting Type | Surface Mount |
| Configuration Memory | Internal flash (non-volatile, instant-on) |
| RoHS Status | Compliant |
| I/O Standards Supported | LVDS, LVCMOS, SSTL |
10M25SAE144I7G Pin Configuration
| Pin 1 | I/O — General-purpose user I/O (bank 1) |
| Pin 2 | I/O — General-purpose user I/O (bank 1) |
| Pin 3 | I/O — General-purpose user I/O (bank 1) |
| Pin 4 | I/O — General-purpose user I/O (bank 1) |
| Pin 5 | I/O — General-purpose user I/O (bank 1) |
| Pin 6 | I/O — General-purpose user I/O (bank 1) |
| Pin 7 | I/O — General-purpose user I/O (bank 1) |
| Pin 8 | I/O — General-purpose user I/O (bank 1) |
| Pin 9 | I/O — General-purpose user I/O (bank 1) |
| Pin 10 | I/O — General-purpose user I/O (bank 1) |
| Pin 11 | I/O — General-purpose user I/O (bank 1) |
| Pin 12 | I/O — General-purpose user I/O (bank 1) |
| Pin 13 | VCCIO1 — I/O bank 1 supply voltage |
| Pin 14 | I/O — General-purpose user I/O (bank 1) |
| Pin 15 | I/O — General-purpose user I/O (bank 1) |
| Pin 16 | I/O — General-purpose user I/O (bank 1) |
| Pin 17 | I/O — General-purpose user I/O (bank 1) |
| Pin 18 | I/O — General-purpose user I/O (bank 1) |
| Pin 19 | I/O — General-purpose user I/O (bank 1) |
| Pin 20 | I/O — General-purpose user I/O (bank 1) |
| Pin 21 | I/O — General-purpose user I/O (bank 1) |
| Pin 22 | I/O — General-purpose user I/O (bank 1) |
| Pin 23 | I/O — General-purpose user I/O (bank 1) |
| Pin 24 | I/O — General-purpose user I/O (bank 1) |
| Pin 25 | GND — Ground |
| Pin 26 | I/O — General-purpose user I/O (bank 2) |
| Pin 27 | I/O — General-purpose user I/O (bank 2) |
| Pin 28 | I/O — General-purpose user I/O (bank 2) |
| Pin 29 | I/O — General-purpose user I/O (bank 2) |
| Pin 30 | I/O — General-purpose user I/O (bank 2) |
| Pin 31 | I/O — General-purpose user I/O (bank 2) |
| Pin 32 | I/O — General-purpose user I/O (bank 2) |
| Pin 33 | I/O — General-purpose user I/O (bank 2) |
| Pin 34 | I/O — General-purpose user I/O (bank 2) |
| Pin 35 | I/O — General-purpose user I/O (bank 2) |
| Pin 36 | I/O — General-purpose user I/O (bank 2) |
| Pin 37 | VCCIO2 — I/O bank 2 supply voltage |
| Pin 38 | I/O — General-purpose user I/O (bank 2) |
| Pin 39 | I/O — General-purpose user I/O (bank 2) |
| Pin 40 | I/O — General-purpose user I/O (bank 2) |
| Pin 41 | I/O — General-purpose user I/O (bank 2) |
| Pin 42 | I/O — General-purpose user I/O (bank 2) |
| Pin 43 | I/O — General-purpose user I/O (bank 2) |
| Pin 44 | I/O — General-purpose user I/O (bank 2) |
| Pin 45 | I/O — General-purpose user I/O (bank 2) |
| Pin 46 | I/O — General-purpose user I/O (bank 2) |
| Pin 47 | I/O — General-purpose user I/O (bank 2) |
| Pin 48 | I/O — General-purpose user I/O (bank 2) |
| Pin 49 | I/O — General-purpose user I/O (bank 2) |
| Pin 50 | GND — Ground |
| Pin 51 | I/O — General-purpose user I/O (bank 3) |
| Pin 52 | I/O — General-purpose user I/O (bank 3) |
| Pin 53 | I/O — General-purpose user I/O (bank 3) |
| Pin 54 | I/O — General-purpose user I/O (bank 3) |
| Pin 55 | I/O — General-purpose user I/O (bank 3) |
| Pin 56 | I/O — General-purpose user I/O (bank 3) |
| Pin 57 | I/O — General-purpose user I/O (bank 3) |
| Pin 58 | I/O — General-purpose user I/O (bank 3) |
| Pin 59 | I/O — General-purpose user I/O (bank 3) |
| Pin 60 | I/O — General-purpose user I/O (bank 3) |
| Pin 61 | VCCIO3 — I/O bank 3 supply voltage |
| Pin 62 | I/O — General-purpose user I/O (bank 3) |
| Pin 63 | I/O — General-purpose user I/O (bank 3) |
| Pin 64 | I/O — General-purpose user I/O (bank 3) |
| Pin 65 | I/O — General-purpose user I/O (bank 3) |
| Pin 66 | I/O — General-purpose user I/O (bank 3) |
| Pin 67 | I/O — General-purpose user I/O (bank 3) |
| Pin 68 | I/O — General-purpose user I/O (bank 3) |
| Pin 69 | I/O — General-purpose user I/O (bank 3) |
| Pin 70 | I/O — General-purpose user I/O (bank 3) |
| Pin 71 | I/O — General-purpose user I/O (bank 3) |
| Pin 72 | I/O — General-purpose user I/O (bank 3) |
| Pin 73 | I/O — General-purpose user I/O (bank 3) |
| Pin 74 | GND — Ground |
| Pin 75 | I/O — General-purpose user I/O (bank 4) |
| Pin 76 | I/O — General-purpose user I/O (bank 4) |
| Pin 77 | I/O — General-purpose user I/O (bank 4) |
| Pin 78 | I/O — General-purpose user I/O (bank 4) |
| Pin 79 | I/O — General-purpose user I/O (bank 4) |
| Pin 80 | I/O — General-purpose user I/O (bank 4) |
| Pin 81 | I/O — General-purpose user I/O (bank 4) |
| Pin 82 | I/O — General-purpose user I/O (bank 4) |
| Pin 83 | I/O — General-purpose user I/O (bank 4) |
| Pin 84 | I/O — General-purpose user I/O (bank 4) |
| Pin 85 | VCCIO4 — I/O bank 4 supply voltage |
| Pin 86 | I/O — General-purpose user I/O (bank 4) |
| Pin 87 | I/O — General-purpose user I/O (bank 4) |
| Pin 88 | I/O — General-purpose user I/O (bank 4) |
| Pin 89 | I/O — General-purpose user I/O (bank 4) |
| Pin 90 | I/O — General-purpose user I/O (bank 4) |
| Pin 91 | I/O — General-purpose user I/O (bank 4) |
| Pin 92 | I/O — General-purpose user I/O (bank 4) |
| Pin 93 | I/O — General-purpose user I/O (bank 4) |
| Pin 94 | I/O — General-purpose user I/O (bank 4) |
| Pin 95 | I/O — General-purpose user I/O (bank 4) |
| Pin 96 | I/O — General-purpose user I/O (bank 4) |
| Pin 97 | I/O — General-purpose user I/O (bank 4) |
| Pin 98 | GND — Ground |
| Pin 99 | I/O — General-purpose user I/O (bank 5) |
| Pin 100 | I/O — General-purpose user I/O (bank 5) |
| Pin 101 | I/O — General-purpose user I/O (bank 5) |
| Pin 102 | I/O — General-purpose user I/O (bank 5) |
| Pin 103 | I/O — General-purpose user I/O (bank 5) |
| Pin 104 | I/O — General-purpose user I/O (bank 5) |
| Pin 105 | I/O — General-purpose user I/O (bank 5) |
| Pin 106 | I/O — General-purpose user I/O (bank 5) |
| Pin 107 | I/O — General-purpose user I/O (bank 5) |
| Pin 108 | I/O — General-purpose user I/O (bank 5) |
| Pin 109 | VCCIO5 — I/O bank 5 supply voltage |
| Pin 110 | I/O — General-purpose user I/O (bank 5) |
| Pin 111 | I/O — General-purpose user I/O (bank 5) |
| Pin 112 | I/O — General-purpose user I/O (bank 5) |
| Pin 113 | I/O — General-purpose user I/O (bank 5) |
| Pin 114 | I/O — General-purpose user I/O (bank 5) |
| Pin 115 | I/O — General-purpose user I/O (bank 5) |
| Pin 116 | I/O — General-purpose user I/O (bank 5) |
| Pin 117 | I/O — General-purpose user I/O (bank 5) |
| Pin 118 | I/O — General-purpose user I/O (bank 5) |
| Pin 119 | I/O — General-purpose user I/O (bank 5) |
| Pin 120 | I/O — General-purpose user I/O (bank 5) |
| Pin 121 | I/O — General-purpose user I/O (bank 5) |
| Pin 122 | GND — Ground |
| Pin 123 | I/O — General-purpose user I/O (bank 6) |
| Pin 124 | I/O — General-purpose user I/O (bank 6) |
| Pin 125 | I/O — General-purpose user I/O (bank 6) |
| Pin 126 | I/O — General-purpose user I/O (bank 6) |
| Pin 127 | I/O — General-purpose user I/O (bank 6) |
| Pin 128 | I/O — General-purpose user I/O (bank 6) |
| Pin 129 | I/O — General-purpose user I/O (bank 6) |
| Pin 130 | I/O — General-purpose user I/O (bank 6) |
| Pin 131 | I/O — General-purpose user I/O (bank 6) |
| Pin 132 | I/O — General-purpose user I/O (bank 6) |
| Pin 133 | VCCIO6 — I/O bank 6 supply voltage |
| Pin 134 | I/O — General-purpose user I/O (bank 6) |
| Pin 135 | I/O — General-purpose user I/O (bank 6) |
| Pin 136 | I/O — General-purpose user I/O (bank 6) |
| Pin 137 | I/O — General-purpose user I/O (bank 6) |
| Pin 138 | I/O — General-purpose user I/O (bank 6) |
| Pin 139 | I/O — General-purpose user I/O (bank 6) |
| Pin 140 | I/O — General-purpose user I/O (bank 6) |
| Pin 141 | I/O — General-purpose user I/O (bank 6) |
| Pin 142 | I/O — General-purpose user I/O (bank 6) |
| Pin 143 | I/O — General-purpose user I/O (bank 6) |
| Pin 144 | I/O — General-purpose user I/O (bank 6) |
| Pin EPAD | GND/thermal — Exposed thermal pad - must be soldered to ground plane |
Typical Applications
10M25SAE144I7G is suitable for 6 applications: Industrial Motor Drive Controller, Machine Vision Pre-Processing Bridge, Factory Automation I/O Expansion, Video Bridging and Display Controller, Low-Cost ASIC/ASSP Replacement, Distributed Industrial Ethernet I/O Aggregation.
Industrial Motor Drive Controller
The 10M25SAE144I7G is well suited to industrial motor-drive controllers because its 25K logic elements can host encoder interfaces, PWM generation, and field-oriented control state machines while the integrated 12-bit ADC samples motor current and back-EMF without an external ADC IC. The non-volatile flash configuration delivers sub-10 ms instant-on, eliminating the boot delay typical of SRAM-based FPGAs in safety-critical drives. The industrial temperature grade (-40C to +100C for I7G) handles cabinet-side ambient swings near inverters. With 101 user I/O, designers can parallel several SPI encoder channels plus isolated UART/CAN links to a host PLC within the same device.
Recommended
Machine Vision Pre-Processing Bridge
In machine vision pre-processing, the 10M25SAE144I7G bridges parallel image sensors to host SoCs while performing thresholding, ROI cropping, and line-buffer management. The 45 embedded 18x18 multipliers accelerate small convolutional kernels for edge detection at line rate, and the 1,728 Kbits of embedded memory hold line buffers without external SRAM. LVDS support enables direct connection to high-speed image sensors, while the 144-LQFP exposed-pad package fits in compact 22x22 mm camera modules. Quartus Prime Lite provides a free toolchain for designers prototyping vision pipelines.
Recommended
Factory Automation I/O Expansion
Factory automation I/O expansion modules use the 10M25SAE144I7G to aggregate discrete sensors, opto-isolated inputs, and relay outputs onto a single fieldbus link. The 101 user I/O accommodate dozens of 24V-tolerant channels when paired with external level shifters, while the 12-bit ADC monitors supply rails and analog sensor outputs. Non-volatile instant-on behavior ensures deterministic startup when cabinets are power-cycled, which simplifies IEC 61131 PLC integration. The device pairs naturally with industrial Ethernet PHYs to form distributed I/O slices at sub-station granularity.
Recommended
Video Bridging and Display Controller
Video bridging applications such as LVDS-to-RGB or MIPI-to-LVDS conversion leverage the 10M25SAE144I7G's LVDS support, 25K logic elements for protocol conversion, and 1,728 Kbits of embedded memory for line buffering. The exposed-pad 144-LQFP package mounts on cost-sensitive display controller boards where BGA packages would inflate assembly cost. Designers can prototype format converters, scalers, and timing generators in Quartus Prime Lite, then migrate the same firmware to higher-density MAX 10 or Cyclone devices without changing the PCB footprint.
Recommended
Low-Cost ASIC/ASSP Replacement
The 10M25SAE144I7G is frequently used as a low-cost ASIC/ASSP replacement for low-to-mid volume products where a custom mask set is uneconomical. Its 25K logic elements, 45 multipliers, four ADCs, and non-volatile configuration let designers consolidate what would otherwise require a microcontroller, external ADC, configuration EEPROM, and discrete glue logic into a single 22x22 mm package. Quartus Prime Lite is free, eliminating per-seat toolchain licensing fees. Vertical migration to 10M40 or 10M50 within the same footprint lets the same PCB scale from prototype to feature-rich derivative.
Recommended
Distributed Industrial Ethernet I/O Aggregation
At the edge of industrial Ethernet networks, the 10M25SAE144I7G aggregates sensor data from multiple field-side nodes and forwards it over EtherCAT, PROFINET, or Modbus TCP links. The 12-bit ADC integrates analog sensor sampling into the same device that runs the industrial protocol stack in soft logic. Non-volatile flash configuration eliminates boot delay concerns when the node is power-cycled by the upstream switch. With 101 user I/O and an industrial temperature grade, the device fits compact IP67 field-mount enclosures typical of modern smart-factory deployments.
Recommended
Recommended Products Summary
Engineering reference data for 10M25SAE144I7G — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | 10M16SAE144I7G | 10M40SAE144I7G | 10M50SAE144I7G | 10M25SAE144A7G | 10M25SCE144A7G | 10M08SAE144I7G |
|---|---|---|---|---|---|---|---|
| Package | 144-LQFP Exposed Pad (E144), 22x22 mm | 144-LQFP Exposed Pad (E144) - same | 144-LQFP Exposed Pad (E144) - same | 144-LQFP Exposed Pad (E144) - same | 144-LQFP Exposed Pad (E144) - same | 144-LQFP Exposed Pad (E144) - same | 144-LQFP Exposed Pad (E144) - same |
| Brand | Intel | Intel | Intel | Intel | Intel | Intel | Intel |
| Logic Elements | 25,000 | 16,000 (-36%) | 40,000 (+60%) | 50,000 (+100%) | 25,000 (same) | 25,000 (same) | 8,000 (-68%) |
| Embedded Memory (Kbits) | 1,728 | 1,152 (-33%) | 1,260 (-27%) | 1,638 (-5%) | 1,728 (same) | 1,728 (same) | 378 (-78%) |
| 18x18 Multipliers | 45 | 32 (-29%) | 70 (+56%) | 144 (+220%) | 45 (same) | 45 (same) | 16 (-64%) |
| Operating Temperature | -40C to +100C (industrial) | -40C to +100C | -40C to +100C | -40C to +100C | 0C to +85C (commercial) | 0C to +85C (commercial) | -40C to +100C |
| Speed Grade | I7G | I7G | I7G | I7G | A7G (commercial) | A7G (commercial) | I7G |
| Integrated ADC | 4 (12-bit, 1 MSPS) | 4 (12-bit, 1 MSPS) | 4 (12-bit, 1 MSPS) | 4 (12-bit, 1 MSPS) | 4 (12-bit, 1 MSPS) | 4 (12-bit, 1 MSPS) | 4 (12-bit, 1 MSPS) |
| Configuration Memory | Internal flash (non-volatile) | Internal flash | Internal flash | Internal flash | Internal flash | Internal flash | Internal flash |
Key Differentiators
- Non-volatile flash configuration with integrated 12-bit ADC (vs Lattice ECP5 LFE5U-25F)
- 144-LQFP exposed-pad package with vertical migration (vs Lattice MachXO3-4300)
- Free Quartus Prime Lite toolchain (vs Xilinx Spartan-6)
Design Notes
Solder the exposed pad (EPAD) of the 144-LQFP package to a continuous ground copper pour of at least 1 square inch to dissipate 1-2 W typical and avoid thermal shutdown. Without a continuous ground pour the junction-to-ambient thermal resistance rises sharply and the device may throttle. Estimated: at 1.5 W dissipation, a 25x25 mm 4-layer 1 oz copper pour keeps theta_JA below 25 C/W, supporting industrial-temperature operation without active cooling.
Decouple each VCCIO bank pin with a 0.1 uF ceramic capacitor placed within 5 mm of the pin, and add a bulk 10 uF tantalum or ceramic capacitor near the VCCINT/VCCIO cluster. The MAX 10 device is sensitive to rail noise during configuration; insufficient decoupling can cause configuration failure or CRC errors on flash memory. Estimated: budget 20 decoupling capacitors total for the 144-LQFP package power pins.
Route LVDS pairs with 100 ohm differential impedance and matched trace lengths within 150 mils to avoid skew on high-speed LVDS channels. Use 4-layer stackup with continuous reference planes; the 22x22 mm LQFP body has long lead spans, so signal-via antipad clearance must be respected to maintain impedance. Refer to the Intel MAX 10 handbook pin connection guidelines for bank-by-bank VREF and VCCIO routing.
Keep analog input pins to the dedicated ANA pins separate from digital I/O traces, and guard the analog section with a ground ring to isolate ADC sampling noise. The four integrated 12-bit ADCs sample at 1 MSPS and will couple switching noise from nearby digital lines if layout is careless. Estimated: maintain at least 5 mm between analog input traces and any switching signal traces.
Do not confuse the I7G speed grade with the C7G commercial-temperature speed grade - the I7G part is industrial-temperature qualified while A7G is commercial-only. Also note that the MAX 10 E144 package uses identical pinouts across density grades (10M02, 10M04, 10M08, 10M16, 10M25, 10M40, 10M50), enabling vertical migration within the same PCB footprint if Quartus Prime recompilation is acceptable.
Compliance Information
RoHS and REACH compliant per Intel MAX 10 product family documentation. AEC-Q100 not applicable - this is a non-automotive-grade industrial FPGA. Lead-free assembly process supported; halogen-free status not explicitly stated in provided data.
