2EDN7533BXTSA1 - Dual 5A Low-Side Gate Driver SOT-23-6 | Infineon
MPN: 2EDN7533BXTSA1 β Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $0.92 | $0.92 |
| 10 | $0.83 | $8.30 |
| 100 | $0.74 | $74.00 |
| 500 | $0.62 | $310.00 |
| 1,000 | $0.51 | $510.00 |
2EDN7533BXTSA1 Overview
Background: A gate driver is a power-management IC that sits between a low-power control signal (PWM from a microcontroller or controller IC) and the high-current gate of a power semiconductor switch. Low-side drivers specifically reference the source/emitter of the switch to ground and pull the gate up/down to VDD/0V. Within the broader taxonomy, gate drivers belong to: gate driver IC -> power management IC -> power semiconductor driver -> signal chain/power interface. Gate drivers are essential whenever the controller cannot source/sink enough current to switch the power device quickly, which is nearly always true for modern WBG devices with sub-nC gate charge requirements at MHz speeds.
Key features include a wide 4.5 V to 20 V supply range, integrated active output voltage clamping for MOSFET gate protection, under-voltage lockout (UVLO) for safe start-up, and LV-TTL compatible inputs that tolerate -12 V to +22 V absolute maximum. The inverting logic variant (suffix -33) flips the polarity of each channel, useful in half-bridge or synchronous-rectifier control where the controller outputs an active-low PWM. The SOT-23-6 footprint occupies only 2.9x1.6 mm, enabling extremely compact power stages.
Architecturally, the device uses a matched-pair output stage design with tightly-trimmed timing, ensuring that propagation delays are consistent across temperature and process. The integrated bootstrap-style clamping protects against dv/dt-induced gate over-voltage when driving WBG devices - a critical feature for GaN HEMTs that typically have Β±7 V gate ratings.
Typical applications include synchronous buck/flyback DC-DC converters, half-bridge and full-bridge motor drivers, class-D audio amplifiers, and high-frequency GaN/SiC switching converters. The inverting variant is particularly suited to controllers that natively drive the low-side FET with a low-true PWM, eliminating an external logic inverter.
When designing with this part, place input/output bypass capacitors (typically 100 nF ceramic) within 2 mm of the VDD and GND pins. Maintain a 4-layer or 2-layer PCB with a low-impedance ground return under the driver to handle the 5 A peak di/dt without inductive ringing. Derate peak current for continuous operation above 100 kHz.
This page synthesizes distributor pricing, pin-compatible drop-in alternatives, and application-specific design notes not found in the standalone manufacturer datasheet, providing a single engineering reference for sourcing and substitution decisions.
Drop-in alternatives for 2EDN7533BXTSA1 β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with 2EDN7533BXTSA1 (same form factor and footprint) β differing in Package, Input Logic Compatibility, Function, Input Voltage Tolerance.
Quick Comparison Tool β Select alternative parts for side-by-side comparison:
2EDN7533RXTMA1
β Drop-Inβ In Stock
$0.55 / Unit
View Datasheet β2EDN7534RXTMA1
β Drop-Inβ In Stock
$0.4 / Unit
View Datasheet β2EDN7434RXTMA1
β Drop-Inβ In Stock
$0.34 / Unit
View Datasheet β2EDN7116GXTMA1
β Drop-Inπ Reference alternative (not in catalog)
UCC27517DBVR
β Drop-Inπ Reference alternative (not in catalog)
2EDN7533BXTSA1 Maximum Ratings & Electrical Characteristics
| Product Type | Dual-channel low-side gate driver IC |
| Number of Channels | 2 |
| Logic Polarity | Inverting |
| Peak Source/Sink Current | Β±5 A |
| Supply Voltage (VDD) | 4.5 V to 20 V |
| Propagation Delay (typ.) | 19 ns |
| Input Compatibility | LV-TTL, -12 V to +22 V absolute max tolerant |
| UVLO | Integrated under-voltage lockout |
| Output Clamping | Active gate voltage clamping |
| Operating Temperature Range | -40 C to +125 C |
| Package | PG-SOT23-6-1 (6-pin SOT-23, 2.9x1.6 mm) |
| Mounting Type | Surface Mount |
| RoHS Status | Compliant |
2EDN7533BXTSA1 Pin Configuration
| Pin 1 | GND β Ground reference for both channels and supply return |
| Pin 2 | IN1 β Logic input 1, LV-TTL compatible, inverting |
| Pin 3 | IN2 β Logic input 2, LV-TTL compatible, inverting |
| Pin 4 | VDD β Supply voltage input, 4.5 V to 20 V |
| Pin 5 | OUT2 β Gate drive output 2, Β±5 A peak current |
| Pin 6 | OUT1 β Gate drive output 1, Β±5 A peak current |
Typical Applications
2EDN7533BXTSA1 is suitable for 6 applications: Synchronous Buck DC-DC Converter, GaN HEMT Half-Bridge Driver, Class-D Audio Amplifier Output Stage, Brushless DC (BLDC) Motor Driver Low-Side, Telecom Isolated DC-DC Half-Bridge, USB-PD Power Adapter Synchronous Rectifier.
Synchronous Buck DC-DC Converter
The 2EDN7533BXTSA1 drives the low-side synchronous rectifier MOSFET in buck converters with switching frequencies from 300 kHz to 2 MHz. The Β±5 A peak current handles MOSFETs with 30-100 nC total gate charge (Qg) without slew-rate limiting, while the 19 ns propagation delay preserves dead-time accuracy critical for efficiency. The 4.5 V to 20 V VDD range matches both 5 V and 12 V input bus designs, and the inverting logic directly drives low-side FETs with active-low PWM from controllers such as the TPS54360. Integrated active output clamping protects MOSFET gates from dv/dt-induced over-voltage during high-side switching transitions.
Recommended
GaN HEMT Half-Bridge Driver
For GaN HEMT half-bridges operating at MHz switching frequencies, the 2EDN7533BXTSA1's Β±5 A peak current and 19 ns propagation delay deliver sub-5 ns rise/fall times on 50 V GaN devices such as the IGOT60R070D1. The integrated active output voltage clamping is critical: GaN gates are typically rated at only +7/-5 V, and uncontrolled dv/dt on the switching node can push the gate beyond safe limits. The SOT-23-6 footprint enables placement within 2 mm of the GaN drain-source terminals, minimizing parasitic gate-loop inductance that otherwise causes ringing and EMI.
Recommended
Class-D Audio Amplifier Output Stage
In class-D audio amplifiers, the 2EDN7533BXTSA1 drives the half-bridge output MOSFET pair (or full H-bridge) with audio-band PWM (250 kHz to 1 MHz). The 5 A peak current drives large gate-charge output FETs without slowing edges, which is essential for preserving audio linearity and minimizing dead-time distortion. The 19 ns propagation delay maintains tight timing between left/right channels for stereo imaging, while the inverting logic aligns with audio controllers that natively output low-true PWM. Total harmonic distortion (THD) below 0.01% is achievable with proper PCB layout.
Recommended
Brushless DC (BLDC) Motor Driver Low-Side
The 2EDN7533BXTSA1 drives the three low-side MOSFETs of a 3-phase BLDC motor driver in cordless tools, drones, and e-bikes. Each driver channel sinks/source 5 A peak, sufficient to switch 40-100 V MOSFETs at 25-50 kHz PWM frequency with sub-50 ns rise times. The -40 C to +125 C operating range covers the thermal envelope of enclosed motor housings, while the SOT-23-6 package enables very compact 3-phase inverter PCBs. Two channels can drive two phases simultaneously, with a third phase served by an additional driver IC.
Recommended
Telecom Isolated DC-DC Half-Bridge
In 48 V telecom bus converters and isolated bus converters, the 2EDN7533BXTSA1 drives the primary-side low-side MOSFET of a half-bridge topology, paired with an isolated high-side driver such as the 1ED3124MC12HXUMA1. The 4.5 V to 20 V VDD range accommodates auxiliary rails from the housekeeping supply, while the -12 V to +22 V input tolerance rejects ground bounce from the high-side switching node. 5 A peak current handles primary MOSFETs up to 250 V breakdown with Qg below 50 nC at 200-500 kHz switching.
Recommended
USB-PD Power Adapter Synchronous Rectifier
For USB Power Delivery (USB-PD) adapters up to 100 W, the 2EDN7533BXTSA1 drives the secondary-side synchronous rectifier MOSFETs in flyback or active-clamp forward topologies. The 5 A peak current easily switches 60-100 V SR MOSFETs at 100-200 kHz, while the inverting logic interfaces directly with secondary-side SR controllers such as the XDPP1148100BXUMA1. Active output clamping prevents gate over-voltage from the high dv/dt at the SR switching node, which can exceed 10 V/ns in 100 W designs.
Recommended
Recommended Products Summary
Engineering reference data for 2EDN7533BXTSA1 β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | 2EDN7533RXTMA1 | 2EDN7534RXTMA1 | 2EDN7434RXTMA1 | 2EDN7116GXTMA1 | UCC27517DBVR |
|---|---|---|---|---|---|---|
| Brand | Infineon | Infineon (same brand) | Infineon (same brand) | Infineon (same brand) | Infineon (same brand) | Texas Instruments |
| Package | PG-SOT23-6-1 (6-pin SOT-23) | PG-SOT23-6-1 (same) | PG-SOT23-6-1 (same) | PG-SOT23-6-1 (same) | PG-SOT23-6-1 (same) | SOT-23-5 (5 pins) |
| Number of Channels | 2 | 2 | 2 | 2 | 2 | 1 (single-channel) |
| Logic Polarity | Inverting | Inverting | Non-inverting | Non-inverting | Non-inverting | Non-inverting |
| Peak Source/Sink Current | Β±5 A | Β±5 A | Β±5 A | Β±4 A (-20%) | Β±1.5 A (-70%) | Β±4 A (-20%) |
| Supply Voltage (VDD) | 4.5 V to 20 V | 4.5 V to 20 V | 4.5 V to 20 V | 4.5 V to 20 V | 4.5 V to 20 V | 4.5 V to 18 V |
| Output Clamping | Active voltage clamping | Active clamping | Active clamping | Active clamping | Active clamping | None (external Zener recommended) |
Key Differentiators
- Dual 5 A peak current in smallest SOT-23-6 package (vs UCC27517DBVR (TI))
- Integrated active output voltage clamping for WBG protection (vs 2EDN7434RXTMA1 (Infineon))
- Wider VDD supply range than TI competing drivers (vs UCC27517DBVR (TI))
Design Notes
Place the VDD bypass capacitor (100 nF X7R ceramic, plus 1 uF bulk) within 2 mm of pin 4 (VDD) and pin 1 (GND). Use a wide, short ground return path - the high di/dt of 5 A peak in 5 ns creates inductive transients that couple into the input logic if ground impedance is high. A 4-layer PCB with a dedicated ground plane is strongly recommended; on 2-layer boards, place a copper pour directly under the driver footprint to minimize ground-loop inductance.
Do not exceed VDD of 20 V or input voltages of -12 V/+22 V (absolute max). Note that the inverting logic (-33) means that floating inputs default to logic HIGH, which pulls the output LOW - this can cause unintended FET turn-on during controller startup. Always tie unused input pins to GND through a 10 kohm resistor for the inverting variant, or to VDD for the non-inverting variant, to define the off-state.
Estimated: at continuous switching above 1 MHz with 5 A peak pulses, total switching power dissipation reaches 150-300 mW per channel, yielding a junction temperature rise of approximately 40-80 C above ambient on the SOT-23-6 package (theta_JA approximately 200 C/W on a 1 sq inch 2-layer PCB). For continuous high-frequency operation, use a 4-layer PCB with copper pours on all four layers to drop theta_JA below 80 C/W. The output clamping function does not dissipate additional power since it only clamps transient over-voltage.
Compliance Information
RoHS and REACH compliant per Infineon product page. Not AEC-Q100 qualified - this part targets industrial and consumer power applications. For AEC-Q100 qualified automotive-grade low-side gate drivers, consider Infineon's automotive EiceDRIVER family.
