NXP Semiconductors

PN7642EV/C100K - NFC Controller with Cortex-M33 MCU | NXP

MPN: PN7642EV-C100K ✓ Active
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1.8 V to 3.5 V Vdss 64-VFBGA Package 13.56 MHz Speed 180 kB Memory
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Price updated: 2026-10-11
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1 $12.53 $12.53
10 $11.42 $114.20
100 $10.36 $1,036.00
500 $9.58 $4,790.00
1,000 $8.89 $8,890.00
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PN7642EV-C100K Overview

The NXP Semiconductors PN7642EV/C100K is a high-performance NFC open controller that integrates an Arm Cortex-M33 microcontroller, a full NFC reader front end for 13.56 MHz contactless communication, and a hardware security subsystem in a single 64-ball VFBGA package. It operates from a 1.8 V to 3.5 V supply and supports ISO 14443-A, ISO 14443-3/4-B, ISO 15693, ISO 18092 (NFCIP-1), ISO 18000-3, MIFARE and FeliCa protocols, with host interfaces including I2C, SPI, UART and USB.

An NFC controller is a specialized mixed-signal integrated circuit that modulates and demodulates 13.56 MHz RF signals and executes contactless protocol stacks. Within the system hierarchy, the PN7642 sits above discrete NFC front ends: by combining the analog NFC front end, a general-purpose MCU and a secure element on one die, it functions as a complete NFC reader system-on-chip within the connectivity layer of a terminal design.

Key differentiating features include 180 kB of programmable flash memory (256 kB total memory per distributor listings), an integrated security toolbox optimized for secure key storage and cryptography, and low-power operation suited to battery-powered readers. The single-chip architecture removes the need for a separate host MCU and a discrete secure element, reducing bill-of-materials count and board area.

Technically, the PN7642 combines NXP's proven NFC RF front end with an Arm Cortex-M33 CPU core, providing developer-customizable firmware on the C100 firmware version (01.00). GPIO pins with PWM capability (for example GPIO2/GPIO3 on balls E7 and D7) allow direct control of LEDs, buzzers and power switches. The datasheet also documents firmware variants C101 (02.00, pinless-download mode) and C102 (03.00) for field-upgradeable deployments.

Typical applications include point-of-sale payment terminals, access-control readers, battery-powered smart locks, and industrial handheld readers. The security subsystem makes it particularly suited to payment and authentication use cases requiring cryptographic key protection.

A key design consideration is the 64-ball VFBGA package: ball-grid mounting requires controlled reflow profiles and is not hand-solderable, so panel design and rework capability should be confirmed before layout. Antenna matching network design should follow the NXP PN7642 antenna design guidance for 13.56 MHz EMC performance.

This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.

Drop-in alternatives for PN7642EV-C100K — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.

Variants in this series

Same-series models that are drop-in compatible with PN7642EV-C100K (same form factor and footprint) — differing in Package, Mounting Type, Supply Voltage, Function, GPIO.

NXP Semiconductors
Package: BGA (PN7642EV orderable variants)
Mounting Type: Surface Mount
GPIO: Multi-function; GPIO2 (PWM2), GPIO3 (PWM3)
Compare with PN7642EV-C100K →
NXP Semiconductors
Mounting Type: Surface Mount
Supply Voltage: 2.4 V to 5.5 V
Function: NFC open controller (reader + MCU + security subsystem)
Compare with PN7642EV-C100K →
NXP Semiconductors
Package: 64-VFBGA, 4.5 mm x 4.5 mm
Mounting Type: Surface Mount
Supply Voltage: 2.4 V to 5.5 V
Compare with PN7642EV-C100K →

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PN7642EV-C100K Specifications (manufacturer-published)

Function NFC reader / open controller with MCU and security subsystem
Core Processor Arm Cortex-M33
Programmable Flash 180 kB
Total Memory 256 kB (per distributor listing)
Supply Voltage 1.8 V to 3.5 V
Carrier Frequency 13.56 MHz
Contactless Protocols ISO 14443-A, ISO 14443-3/4-B, ISO 15693, ISO 18092 (NFCIP-1), ISO 18000-3, MIFARE, FeliCa
Host Interfaces I2C, SPI, UART, USB
Card Mode ISO 14443-4A (PICC)
General-Purpose I/O Up to 21 (GPIO with PWM capability)
Security Integrated security subsystem for secure key storage and cryptography
Firmware Version (C100) 01.00
Package 64-VFBGA
Mounting Type Surface Mount (ball grid array)
Packaging Tray (per Future Electronics listing)

PN7642EV-C100K Interfaces & Connectors

PN7642EV-C100K exposes the following interfaces and connectors as published by the manufacturer: Power Input. Expansion header pinout, connector pin numbering, and electrical limits are defined in the manufacturer documentation.

Power Input 1.8 V to 3.5 V

Refer to the manufacturer documentation for the full expansion header pinout and connector pin numbering.

Power & Thermal Characteristics

Power Input 1.8 V to 3.5 V

Power input and thermal parameters for PN7642EV-C100K as published by the manufacturer.

Typical Applications

PN7642EV-C100K is suitable for 6 applications: Point-of-Sale Payment Terminals, Access-Control Readers, Battery-Powered Smart Locks, Industrial Handheld Readers, Smart Meters and Utility Infrastructure, Consumer Electronics NFC Pairing.

💳

Point-of-Sale Payment Terminals

The PN7642EV/C100K is purpose-built for unattended and attended POS payment terminals. Its integrated security subsystem provides cryptographic key storage that satisfies the tamper-resistance expectations of contactless payment, while support for ISO 14443-A/B, MIFARE, and FeliCa covers the full range of EMV contactless cards and mobile wallets. The Arm Cortex-M33 with 180 kB of programmable flash runs the protocol stack locally, and the I2C/SPI/UART/USB host interfaces integrate cleanly with a main payment application processor. Placed with a 13.56 MHz antenna matched per NXP guidance, it delivers reliable read performance at wallet distances. Unlike discrete front-end designs, the single-chip architecture shortens security certification cycles by consolidating the secure boundary on one die.

🔐

Access-Control Readers

Multi-protocol credential reading is the core requirement of modern access-control readers, and the PN7642EV/C100K covers ISO 14443-A/B, ISO 15693, MIFARE, and FeliCa in one device, allowing a single reader head to serve legacy and current credential generations. The Cortex-M33 MCU with 180 kB flash executes the reader state machine and can interface to a door controller via UART, I2C, or SPI, while up to 21 GPIOs with PWM drive LEDs, buzzers, and tamper switches directly - GPIO2 (ball E7) and GPIO3 (ball D7) are documented PWM-capable examples. Operating from a 1.8 V to 3.5 V rail, it fits standard reader power budgets. The security subsystem also supports challenge-response credential authentication schemes.

🧩

Battery-Powered Smart Locks

Smart locks demand low standby power, a small PCB footprint, and secure key storage - the PN7642EV/C100K addresses all three. Its 1.8 V to 3.5 V supply range matches lithium coin cells and 2-cell alkaline stacks directly without an extra regulator stage, and the single-chip integration of MCU, NFC front end, and security subsystem minimizes quiescent system overhead versus a three-chip alternative. The Cortex-M33 wakes on card detection and manages the lock actuator through PWM-capable GPIOs. With 180 kB of flash, firmware including BLE-bridge logic or policy engines fits on-chip. For battery lifetime modeling, consult the data sheet power-consumption tables for idle, polling, and active-reader modes before finalizing the antenna and polling-interval design.

🏭

Industrial Handheld Readers

Handheld data-collection terminals in logistics and manufacturing need rugged, multi-protocol RFID plus a programmable controller, and the PN7642EV/C100K delivers both: it reads ISO 15693 and ISO 18000-3 tags common in item-level tracking as well as ISO 14443 cards, and its onboard Cortex-M33 with 180 kB flash offloads tag-inventory polling from the host. The USB interface supports docking-station data offload, while UART/SPI link to the handheld's main processor. The 64-ball VFBGA conserves board area inside compact pistol-grip enclosures. ISO 18000-3 mode 3 support future-proofs the design for higher-throughput inventory tags. Antenna matching per NXP 13.56 MHz guidance is critical for the extended read range handheld users expect in warehouse conditions.

⚡

Smart Meters and Utility Infrastructure

Utility meters increasingly use NFC for field service, commissioning, and prepaid top-up, and the PN7642EV/C100K fits this role with its ISO 14443 and ISO 15693 reader support plus onboard security for authenticated service sessions. The integrated Cortex-M33 executes challenge-response handshakes with technician cards using keys protected by the cryptographic subsystem, preventing clone-card tampering on the meter seal. Operating from 1.8 V to 3.5 V, it shares the meter's primary supply, and the MCU can manage the NFC wake-up budget so polling does not burden meter battery-backed operation. UART or SPI connects to the metering SoC; up to 21 GPIOs handle optical diagnostics LEDs and case-tamper switches without extra logic.

📺

Consumer Electronics NFC Pairing

For TVs, audio systems, and IoT hubs, one-touch NFC pairing benefits from the PN7642EV/C100K's NFCIP-1 (ISO 18092) peer-to-peer support: a tap transfers connection credentials (for example Bluetooth handover records) from a phone to the device. The onboard Cortex-M33 parses NDEF and executes handover logic without burdening the main application processor, connecting via I2C, SPI, or UART. Card mode (ISO 14443-4A) lets the consumer device emulate a tag for configuration apps. The 64-ball VFBGA suits dense consumer PCBs, and USB enables firmware field updates on the production line. The 256 kB memory headroom leaves room for feature growth across product generations using the same footprint.

What is the NXP PN7642EV/C100K?
The PN7642EV/C100K is a single-chip NFC open controller from NXP Semiconductors that combines a high-performance 13.56 MHz NFC reader, an Arm Cortex-M33 microcontroller with 180 kB of programmable flash, and a security subsystem for secure key storage and cryptography. It is housed in a 64-ball VFBGA package, operates from 1.8 V to 3.5 V, and supports I2C, SPI, UART and USB host interfaces, replacing the need for a separate MCU and discrete secure element. According to the NXP PN7642 product data sheet, the C100 version ships with firmware version 01.00.
What is the price of PN7642EV/C100K?
The PN7642EV/C100K is priced at approximately $12.53 per unit at quantity 1, with typical distributor volume breaks lowering the unit cost at 10, 100, and 1000 pieces as of 2026-10-11. Pricing varies by distributor; Octopart lists 7 distributors carrying this part, so comparing Mouser, DigiKey, and Newark quotes is recommended for volume purchases. XAIPART tier pricing shown on this page reflects current distributor data and should be re-verified at order time since NFC controller pricing can shift with allocation cycles.
Where can I buy PN7642EV/C100K online?
You can buy the PN7642EV/C100K from major distributors including DigiKey (part number PN7642EV-C100K), Mouser Electronics, Newark, and Future Electronics, with availability aggregated on Octopart from 7 distributors as of 2026-10-11. XAIPART also offers this part with tiered pricing and datasheet access. Because this is a 64-ball VFBGA BGA device, confirm your assembler can handle BGA reflow before ordering production quantities, and verify stock status at checkout since allocation on payment-grade NFC controllers is common.
What is the difference between PN7642 C100, C101, and C102 versions?
The difference is factory firmware. According to the NXP PN7642 data sheet, PN7642EV/C100 is initialized with firmware 01.00, PN7642EV/C101 is initialized with firmware 02.00 with pinless-download mode enabled by default, and PN7642EV/C102 ships with firmware 03.00. All three use the same silicon and 64-VFBGA package. Note from NXP application note AN13936: if pinless download is enabled (via API on C100, or by default on C101), USB mass-storage download mode is not available. Field firmware can typically be updated, but C101 behavior differs out of the box.
Is PN7642EV/C101K a drop-in replacement for PN7642EV/C100K?
Yes, the PN7642EV/C101K is pin-to-pin and package compatible with the PN7642EV/C100K, using the same 64-VFBGA footprint and identical silicon. The only difference is firmware: C101 ships with firmware 02.00 with pinless-download mode enabled by default versus 01.00 on C100. Per NXP AN13936, C101 with default pinless-download enabled loses USB mass-storage download capability. If your application depends on USB download or exact C100 firmware behavior, validate C101 firmware behavior before switching, but electrically and mechanically they are drop-in interchangeable.
Is there a cross-brand equivalent for PN7642EV/C100K in the same package?
No verified cross-brand drop-in equivalent exists for the PN7642EV/C100K in the same 64-VFBGA package. Competing NFC solutions such as the STMicroelectronics ST25R3916B are high-performance NFC front ends, but they are external-controller or front-end devices in different packages (QFN) and require a separate host MCU, so they are not pin-to-pin drop-in replacements. For NXP ecosystem alternatives, consider the PN5190 or PN5180 front ends (different packages, host MCU required) or the PN7220. All alternatives require PCB redesign - none are footprint-compatible with the PN7642.
What contactless protocols does the PN7642EV/C100K support?
The PN7642EV/C100K supports reader/writer (PCD) modes for ISO 14443-3/4 A and B, ISO 15693, ISO 18000-3 mode 1, FeliCa, ISO 18000-3 mode 3, and MIFARE, plus NFCIP-1 (ISO 18092) peer-to-peer communication. In card (PICC) mode it supports ISO 14443-4A. This broad protocol coverage per the NXP product documentation page allows one reader design to serve payment cards, transit tickets, identity documents, and NFC forum tags, which is why the PN7642 targets point-of-sale and multi-protocol access-control terminals.
What are the key specifications of PN7642EV/C100K engineers should know?
Key specifications: Arm Cortex-M33 MCU core, 180 kB programmable flash (256 kB total memory), 1.8 V to 3.5 V supply, 13.56 MHz contactless carrier, I2C/SPI/UART/USB host interfaces, up to 21 general-purpose GPIOs with PWM, integrated cryptographic security subsystem, and a 64-ball VFBGA package. Reader protocols span ISO 14443-A/B, ISO 15693, ISO 18092, ISO 18000-3, MIFARE, and FeliCa, with ISO 14443-4A card mode. These figures come from the NXP PN7642 data sheet and official product comparison documentation.
Where can I download the PN7642EV/C100K datasheet PDF?
The official PN7642 data sheet PDF is available on the NXP website at https://www.nxp.com/docs/en/data-sheet/PN7642.pdf. This document covers all firmware versions (C100, C101, C102) and describes the functionality and electrical specification of the PN7642 NFC open controller, including the 64-VFBGA ball map and RF front-end design guidance. Additional design-in support, such as antenna design guidance and the PN7642 FAQ (application note AN13936), is available separately from NXP's documentation portal. Avoid third-party mirror sites for the latest revision.
Where can I find the PN7642EV/C100K pinout and ball map?
The complete 64-ball VFBGA ball map for the PN7642EV/C100K is provided in the NXP PN7642 product data sheet at nxp.com, including power, RF antenna (TX/RX), host interface (I2C/SPI/UART/USB), GPIO, and crystal pins. Publicly known examples include GPIO2 on ball E7 and GPIO3 on ball D7 with PWM capability. Because the full ball map spans 64 balls and is subject to firmware multiplexing options, always verify pin assignments against the latest data sheet revision rather than secondary sources before routing your PCB.
When should I choose the PN7642 over the PN5190 or PN7220?
Choose the PN7642 when you want a single-chip solution that eliminates a separate host MCU and secure element - its integrated Cortex-M33 with 180 kB flash and cryptographic security subsystem reduces BOM count for payment terminals and smart locks. Choose the PN5190 or PN5180 front ends when you already have a capable host MCU and only need a high-performance RF front end, or the PN7220 for different integration levels. Note the PN5190/PN7220 come in different packages and pin counts, so the PN7642 is not footprint-compatible with them; the choice is architectural, not a swap.
Is the PN7642EV/C100K suitable for battery-powered smart lock applications?
Yes, the PN7642EV/C100K is well suited to battery-powered smart locks. NXP positions it as a low-power solution, and integrating the MCU, NFC reader, and security subsystem on one die reduces quiescent system overhead versus a multi-chip MCU-plus-front-end-plus-secure-element stack. Its 1.8 V to 3.5 V supply range matches single-cell lithium or two-cell alkaline rails. For exact sleep-mode and active-mode current figures, consult the power consumption sections of the NXP PN7642 data sheet, and design the 13.56 MHz antenna per NXP guidance to maximize read range per millijoule.
Can the PN7642EV/C100K firmware be updated in the field?
Yes. The PN7642 family is designed for firmware customization and update. The C100 version runs firmware 01.00 and supports download modes including USB, though per NXP application note AN13936, USB mass-storage download is unavailable if pinless download is enabled via the API. Factory variants C101 (firmware 02.00, pinless download by default) and C102 (firmware 03.00) address field-update deployment strategies. Engineers should lock down the download mechanism in production to prevent unauthorized firmware replacement, since an open download path is also an attack surface on payment terminals.
Is PN7642EV/C100K the same as PN7642EV/C101K?
They are the same silicon in the same 64-VFBGA package, but not identical products. The C100K ships with firmware 01.00; the C101K ships with firmware 02.00 with pinless-download mode enabled by default. DigiKey also lists differing supply ranges in their catalog entries (C100K: 1.8 V to 3.5 V; C101K entry: 2.4 V to 5.5 V), so verify electrical conditions in the data sheet for the specific orderable part you choose. Functionally they are drop-in interchangeable, but firmware-dependent behavior such as download modes differs out of the box.
What is the lead time and stock status for PN7642EV/C100K?
Stock status varies by distributor: DigiKey has listed this part for same-day shipment, and Octopart aggregates availability from 7 distributors including Mouser, Newark, and Future Electronics as of 2026-10-11. Standard lead times when out of stock at franchise distributors typically run through NXP's standard production cycle; secure payment-grade NFC controllers can carry extended lead times during allocation. For production planning, place buffer orders or qualify the pin-compatible C101/C102 firmware variants as second sources within the same NXP family to hedge supply risk.

Engineering reference data for PN7642EV-C100K — comparison, design guidance, and compliance information.

Selection Guide

Choose the PN7642EV/C100K when your design needs a single-chip NFC reader that eliminates a discrete MCU and secure element - typical for payment terminals, smart locks, and security-conscious access readers. Pick the C101K/C102K variants instead when you want factory firmware 02.00/03.00 or prefer pinless-download default behavior; they are footprint-identical. Choose the PN5190 or PN5180 if you already have a strong host MCU and only need an RF front end, accepting a different package and PCB redesign. Choose the PN7220 for alternative NXP integration levels. Cross-brand options such as the ST25R3916B make sense when you are ST-committed and will redesign the PCB anyway - none are drop-in compatible with the PN7642's 64-VFBGA. Trade-off summary: maximum integration and security (PN7642) versus lowest front-end cost with your own MCU (PN5190/CLRC663).

Comparison with Alternatives

Parameter This Product PN7642EV-C101K PN7642EV-C102K PN7642EV-C101Y
Package 64-VFBGA 64-VFBGA - same 64-VFBGA - same 64-VFBGA - same
Brand NXP Semiconductors NXP Semiconductors NXP Semiconductors NXP Semiconductors
Factory Firmware 01.00 (C100) 02.00, pinless-download default 03.00 02.00, pinless-download default
Programmable Flash 180 kB 180 kB 180 kB 180 kB
Host Interfaces I2C, SPI, UART, USB I2C, SPI, UART, USB I2C, SPI, UART, USB I2C, SPI, UART, USB
Contactless Protocols ISO 14443-A/B, ISO 15693, ISO 18092, ISO 18000-3, MIFARE, FeliCa Same protocol set Same protocol set Same protocol set

Key Differentiators

  • Single-chip MCU + NFC + secure element integration (vs PN5190B1EV)
  • Firmware flexibility via pin-compatible variants (vs PN7642EV-C101K)
  • Broad multi-protocol coverage including FeliCa (vs ST25R3916B)

Design Notes

The 64-ball VFBGA package requires controlled reflow assembly and is not hand-solderable. Confirm your contract manufacturer supports 0.4-0.5 mm pitch BGA assembly and X-ray inspection before committing to layout. Plan rework capability early: BGA rework on payment terminal boards with nearby shielding cans is difficult, so position the PN7642 with clearance for a rework nozzle. Follow the NXP PN7642 data sheet ball map exactly and verify against the latest revision, since GPIO multiplexing options can change ball function assignments across firmware versions.

The 13.56 MHz antenna matching network is the single biggest determinant of read range. Follow NXP PN7642 antenna design guidance: keep EMC filter components and matching capacitors close to the TX/RX balls, route the antenna differential with symmetric traces, and keep the antenna loop away from ground planes and metal shielding to preserve Q factor. Budget for a matching-network tuning pass on first silicon bring-up - measured antenna inductance typically deviates from calculated values by several percent, requiring capacitor adjustments to hit resonance at 13.56 MHz.

Firmware version selection has functional consequences: on the C101 variants, pinless-download mode is enabled by default, which disables USB mass-storage download per NXP application note AN13936. If your production flow relies on USB firmware download, either use C100 and control pinless download via the API, or plan an alternate update path. Also, the C100K (1.8 V to 3.5 V) and C101K (2.4 V to 5.5 V per DigiKey catalog) show different catalog supply ranges - validate your rail against the data sheet for the exact orderable part number to avoid over-voltage stress.

Estimated: RF transmit bursts on a 13.56 MHz reader front end draw the highest peak current; size your 1.8 V to 3.5 V rail and local decoupling (typically >=10 uF bulk plus 100 nF ceramic per power ball per NXP design guidance) to hold the rail within tolerance during full-field read sequences. For battery designs, derive duty-cycle-average current from the data sheet power tables - do not average only idle figures. Exact peak current values must be taken from the manufacturer data sheet.

Compliance Information

RoHS
Unknown
REACH
Unknown
AEC-Q100
Not Applicable
Lead Free
Unknown
Halogen Free
Unknown
Conflict Minerals
Unknown

Compliance details were not stated in the provided distributor or manufacturer snippets. Verify RoHS/REACH status on the NXP product page for PN7642EV before procurement.

Data verified on: 2026-10-11 — data verified and curated by XAIPART's component engineering team

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Related Components & Terms

NXP Semiconductors PN7642 PN7642EV-C100K PN7642EV-C101K PN7642EV-C102K PN5190 PN5180 PN7220 ST25R3916B Arm Cortex-M33 NFC controller RFID reader IC secure element ISO 14443 ISO 15693 ISO 18092 (NFCIP-1) MIFARE FeliCa 64-VFBGA BGA (ball grid array family) surface mount I2C SPI UART USB AN13936
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