RTAX4000DL-1CQ352E - 4M-Gate Rad-Tolerant FPGA | Microchip
MPN: RTAX4000DL-1CQ352E ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $4200 | $4,200.00 |
| 5 | $3950 | $19,750.00 |
| 10 | $3700 | $37,000.00 |
| 25 | $3500 | $87,500.00 |
| 50 | $3300 | $165,000.00 |
Drop-in alternatives for RTAX4000DL-1CQ352E — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
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RTAX4000DL-1CQ352V
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View Datasheet →RTAX4000SL-1CQ352E
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$3840 / Unit
View Datasheet →RTAX4000D-CQ352V
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View Datasheet →RTAX2000DL-1CQ352V
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$2950 / Unit
View Datasheet →RTAX1000SL-CQ352V
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View Datasheet →RTAX4000DL-1CQ352E Maximum Ratings & Electrical Characteristics
| Equivalent System Gates | 4,000,000 gates |
| CLB Organization | 36,960 CLBs |
| Family | RTAX-S/SL and RTAX-DSP |
| Series | RTAX4000DL |
| Technology | CMOS, anti-fuse, digital |
| Product Type | Field Programmable Gate Array (FPGA) |
| Package | CQ352 (352-pin ceramic quad flat pack) |
| Speed Grade | -1 |
| Temperature Screening | E (flight screening level) |
| Radiation Tolerance | Radiation-tolerant (space-flight grade) |
| Configuration | Live-at-power-up (anti-fuse, single chip) |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic |
| Clocking | Segmentable clocks |
| Routing Features | Chip-wide highway routing, carry logic |
| Base Architecture | Microsemi Axcelerator |
| Target Applications | Space-based / space-flight systems |
RTAX4000DL-1CQ352E cq352 (352-pin ceramic quad flat pack) Pin Configuration Guide
Complete pinout information for RTAX4000DL-1CQ352E (cq352 (352-pin ceramic quad flat pack) package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for RTAX4000DL-1CQ352E.
Refer to the datasheet for full pin configuration.
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
RTAX4000DL-1CQ352E is suitable for 6 applications: Satellite Payload Data Processing, Spacecraft On-Board Computer (OBC) Logic, Earth-Observation Image Pre-processing, Space Telecom Payload Switching and Repeaters, Instrument Control and Telemetry Sequencing, Launch Vehicle Avionics and Telemetry.
Satellite Payload Data Processing
The RTAX4000DL-1CQ352E fits satellite payload processing because it combines 4,000,000 equivalent system gates with radiation-tolerant CMOS technology and the DL variant's DSP multiply-accumulate resources, allowing high-throughput channelization, filtering, and formatting to run in a single hermetic 352-pin ceramic device. In a typical payload chain, the FPGA sits between ADCs and downlink modems, implementing FIR filters, FFTs, and packet framing in hardware while the embedded SRAM with FIFO control buffers data streams. The live-at-power-up anti-fuse configuration eliminates a boot PROM, removing a single-point failure common in SRAM FPGAs and shortening time-to-first-data after spacecraft reset. Low static power preserves the limited payload power budget, and chip-wide highway routing sustains high aggregate bandwidth between processing regions. Designers trade off the fixed anti-fuse program for flight reliability, finalizing bitstreams before qualification.
Recommended
Spacecraft On-Board Computer (OBC) Logic
For spacecraft on-board computers, the RTAX4000DL-1CQ352E provides glue logic, bus interfaces, memory controllers, and FDIR (failure detection) functions in one radiation-tolerant device. The 36,960-CLB fabric implements MIL-STD-1553 or SpaceWire style interface bridges, watchdog and brown-out supervision, and error-detection logic around the flight processor. Because the architecture is based on the commercial Axcelerator family, proven IP cores port with minimal modification, and segmentable clocks let designers isolate the processor clock domain from telemetry and housekeeping domains to control skew. Embedded SRAM with built-in FIFO control implements ping-pong buffering between the processor and payload interfaces without external FIFO chips, improving board-level reliability. The hermetic CQ352 ceramic package withstands launch vibration and thermal cycling, and PROTO units share flight-unit timing attributes so OBC timing closure verified on prototypes transfers directly to flight hardware.
Recommended
Earth-Observation Image Pre-processing
Earth-observation instruments generate multi-gigabit sensor streams that must be corrected and compressed before downlink, and the RTAX4000DL-1CQ352E is well suited to this front-end role. The DL DSP multiply-accumulate blocks implement 2D convolution kernels for dark-offset subtraction, flat-field correction, and spatial filtering at line rates, while the four-million-gate fabric handles CCD/CMOS sensor sequencing, gain control, and CCSDS packetization. Embedded SRAM FIFOs decouple the bursty sensor output from the compression stage, and carry logic accelerates accumulation over image rows. The single-chip anti-fuse design is critical here: image chains cannot tolerate configuration upset at power-on in orbit, and the RTAX family's live-at-power-up operation guarantees the sensor interface is valid on the first frame. Designers should budget I/O banks on the CQ352 carefully, mapping sensor LVDS-style channels to adjacent pins to minimize skew across the 352-pin interface.
Recommended
Space Telecom Payload Switching and Repeaters
Telecom satellites require channel switching, multiplexing, and framing logic that runs continuously for the mission lifetime, and the RTAX4000DL-1CQ352E addresses this with deterministic anti-fuse interconnect and chip-wide highway routing that sustains sustained high-bandwidth stream movement. The 4,000,000-gate capacity implements crossbar switching matrices, rate adaptation FIFOs using the embedded SRAM, and framing/deframing for downlink chains, while the DSP blocks support digital channel filtering in regenerative payload designs. Segmentable clocks allow independent domains for uplink, downlink, and management interfaces, simplifying timing closure on the 36,960-CLB fabric. The hermetic CQ352 package and E-level screening align with flight qualification flows, and the single-chip form factor removes configuration PROMs that would otherwise add board area and failure modes to the repeater chain. Radiation tolerance targets the natural space environment of GEO and LEO orbits per Microchip family documentation.
Recommended
Instrument Control and Telemetry Sequencing
Science instruments on research and observation spacecraft need deterministic sequencing, housekeeping acquisition, and safe-mode logic that must operate from the moment power is applied. The RTAX4000DL-1CQ352E delivers this with live-at-power-up anti-fuse configuration: sequencing state machines are valid within microseconds of spacecraft power-on without any configuration load, which SRAM-based FPGAs cannot guarantee. The large fabric implements instrument state machines, ADC/DAC control interfaces, heater and valve supervision, and CCSDS telemetry formatting, while embedded SRAM FIFOs buffer housekeeping samples between acquisition and downlink. Carry logic supports fast CRC and checksum generation over telemetry frames. Because PROTO prototype units in non-hermetic ceramic packages share flight-unit timing attributes, teams can validate sequencing logic on lower-cost prototypes before committing to flight-screened CQ352 units. Designers should hold critical outputs on known reset states using the architecture's global set/reset resources.
Recommended
Launch Vehicle Avionics and Telemetry
Launch vehicles place avionics in high-vibration, short-mission environments where immediate availability and deterministic timing dominate, making the RTAX4000DL-1CQ352E a strong fit for telemetry encoding, flight-event sequencing, and redundancy management logic. The anti-fuse fabric's live-at-power-up behavior ensures that range-safety-adjacent telemetry and event logic are operational through the entire countdown without a configuration step, and its fixed interconnect gives deterministic, repeatable timing across the 4,000,000-gate design - valuable for certification reviews where worst-case timing must be demonstrated. The hermetic CQ352 ceramic package withstands launch vibration profiles, and E-level screening supports range and program quality flows. Design teams typically implement PCM telemetry encoders, IRIG-style frame formats, discrete I/O conditioning, and 1553-style bus monitors in the fabric, using embedded SRAM FIFOs to buffer high-rate telemetry. Verify program acceptance of the screening suffix with the launch authority before substitution.
Recommended
Recommended Products Summary
Engineering reference data for RTAX4000DL-1CQ352E — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | RTAX4000DL-1CQ352V | RTAX4000SL-1CQ352E | RTAX4000D-CQ352V | RTAX2000DL-1CQ352V | RTAX1000SL-CQ352V |
|---|---|---|---|---|---|---|
| Package | CQ352 (352-pin ceramic QFP) | CQ352 - same | CQ352 - same | CQ352 - same | CQ352 - same | CQ352 - same |
| Brand | Microchip Technology (Actel/Microsemi) | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Equivalent System Gates | 4,000,000 | 4,000,000 | 4,000,000 | 4,000,000 | [DATA_NEEDED] | [DATA_NEEDED] |
| CLB Organization | 36,960 CLBs | 36,960 CLBs | 36,960 CLBs | 36,960 CLBs | [DATA_NEEDED] | [DATA_NEEDED] |
| Variant Type | RTAX-DSP (DL) | RTAX-DSP (DL) | RTAX-SL (logic) | RTAX-DSP (D) | RTAX-DSP (DL) | RTAX-SL (logic) |
| Screening Suffix | E | V | E | V | V | V |
| Speed Grade | -1 | -1 | -1 | [DATA_NEEDED] | -1 | [DATA_NEEDED] |
| Pin Compatibility | CQ352 baseline | Pin-to-pin compatible | Pin-to-pin compatible | Pin-to-pin compatible | Same package; verify pinout in datasheet | Same package; verify pinout in datasheet |
Key Differentiators
- RTAX-DSP multiply-accumulate blocks (vs RTAX4000SL-1CQ352E)
- Identical silicon across screening suffixes (vs RTAX4000DL-1CQ352V)
- Top family density vs lower-density same-package parts (vs RTAX2000DL-1CQ352V)
Design Notes
Match the screening suffix to your program requirements before ordering. The RTAX4000DL-1CQ352E (E suffix) and RTAX4000DL-1CQ352V (V suffix) share identical silicon, 4,000,000 gates and 36,960 CLBs, but flight programs governed by DLA drawings or ESA flows may accept only one screening level. Per Microchip's DLA Cross Reference Guide, related RTAX parts are qualified per Mil-Prf-38535 on the QML class Q and class V lists - confirm which QML class your drawing requires and verify the suffix on the certificate of conformance when the lot arrives.
The RTAX family provides segmentable clocks and chip-wide highway routing - exploit both for timing closure on a 36,960-CLB design. Segment the clock tree so each clock domain (processor interface, payload, telemetry) uses local clock regions, reducing skew across the 352-pin CQ352 package. Route high-fanout signals on chip-wide highways to free local routing for dense datapath logic. Per the Microchip datasheet, PROTO units share flight-unit timing attributes, so perform full timing analysis with Libero SoC on prototypes and reuse the constraints file for flight builds without re-closure.
Because RTAX anti-fuse FPGAs configure live-at-power-up, the board power supply must reach stable rails monotonically before the FPGA begins operation - there is no configuration retry mechanism as on SRAM FPGAs. Sequence the CQ352 core and I/O supplies per the RTAX-S/SL and RTAX-DSP datasheet power-up requirements, and add bulk capacitance sized for the CMOS static current plus inrush. Also reserve JTAG access on the 352-pin footprint even if unused in flight, since programming and debug of the anti-fuse device is a one-time operation and test access protects against escapes.
Compliance Information
Compliance data not stated in verified web data. Space-flight components in hermetic ceramic packages may fall under aerospace/defense RoHS exemptions; per Microchip's DLA Cross Reference Guide, related parts are qualified per Mil-Prf-38535 (QML class Q and class V). Confirm with manufacturer documentation.
