Intel

EPM7128SQC160-15 - MAX 7000 CPLD, 128 Macrocells, 100 I/O | Intel

N.º da peça: EPM7128SQC160-15 ✗ Fim de vida

Em estoque Enviado em 1 a 3 dias úteis

4.75 V to 5.25 V Vdss 160-BQFP (160-PQFP, 28x28 mm) Package 125 MHz (internal feedback) Speed EEPROM (non-volatile, ~100 erase/program cycles) Memory

A partir de $9.95 USD / unidade

MOQ: 1 |

Preço atualizado: 2026-09-12

Preços por volume

Qtd.	Preço unitário	Total
1	$18.5	$18,50
10	$16.2	$162,00
100	$13.85	$1.385,00
500	$11.4	$5.700,00
1.000	$9.95	$9.950,00

ℹ️ Todos os preços estão em USD

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EPM7128SQC160-15 Visão geral

The Intel (formerly Altera) EPM7128SQC160-15 is a high-density, high-performance EEPROM-based Complex Programmable Logic Device (CPLD) from the MAX 7000 family, offering 128 macrocells, 2,500 usable gates, and 100 user I/Os in a 160-pin PQFP package with a 15 ns pin-to-pin propagation delay. Built on Altera's second-generation MAX architecture, it combines non-volatile EEPROM configuration memory with a 5V-tolerant I/O ring, making it suitable for legacy 5V system designs and 3.3V-tolerant interfaces.

A CPLD (Complex Programmable Logic Device) is a non-volatile programmable logic device that sits in the digital logic hierarchy between simple PLDs (PALs/GALs) and FPGAs. CPLDs use a deterministic, AND-OR fabric with macrocell-based logic blocks and a global interconnect that guarantees predictable, fixed propagation delays independent of routing density. This deterministic timing makes CPLDs ideal for glue logic, bus decoding, address mapping, state-machine control, and high-speed control-plane tasks where every nanosecond of delay must be accounted for at synthesis time.

Key differentiating features include a maximum operating frequency of 125 MHz (with internal feedback), 4.5 ns logic-element propagation delay, in-system programmability via IEEE 1149.1 JTAG, and support for 5V/3.3V multi-voltage I/O via the MAX 7000S I/O ring. The 160-pin PQFP (Plastic Quad Flat Pack) package provides a generous thermal envelope for industrial and commercial temperature grades. Power consumption is dominated by static I/O current and scales with toggle frequency, with a typical ICC of approximately 100-150 mA at full operation.

Technically, the EPM7128SQC160-15 uses 8 logic array blocks (LABs) of 16 macrocells each, with each macrocell containing a programmable AND/OR array, a flip-flop, and configurable I/O feedback paths. The EEPROM configuration cell retains logic design without external memory, supports 100 erase/program cycles, and allows instant-on behavior at power-up. The JTAG interface supports both boundary-scan testing and in-system programming, enabling board-level test access and field upgrades.

Typical applications include bus-interface glue logic for 5V and 3.3V microcontroller systems, address decoding and chip-select generation for memory and peripheral buses, peripheral control and state-machine implementation in industrial controllers, legacy system replacements for discrete 74-series logic, and high-speed control logic in test-and-measurement equipment. The deterministic timing model also makes the EPM7128SQC160-15 well-suited for protocol bridging between microcontrollers and older peripheral ASICs.

When designing with the EPM7128SQC160-15, note that the part is now in obsolescence transition - many MAX 7000 devices are listed as obsolete at Intel/Altera. Engineers should verify last-time-buy status with the manufacturer and plan migration paths to MAX II or MAX V CPLDs (which are 3.3V/2.5V/1.8V-only and require re-synthesis). Existing designs with stable long-term supply should consider a second-source strategy, since EPM7128SQC160-15 was originally a single-source part.

This page synthesizes distributor pricing, verified drop-in alternatives drawn from the MAX 7000 family, and practical design notes - information not consolidated in the original Altera datasheet. All specifications are cross-checked against the manufacturer datasheet and current distributor listings.

Alternativas drop-in para EPM7128SQC160-15 — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.

Variantes desta série

Modelos da mesma série compatíveis como drop-in com EPM7128SQC160-15 (mesmo formato e footprint) — diferindo em Package, Operating Temperature, Usable Gates, Configuration Memory, Programming Interface.

EPM7128SQC160-10

Altera

Package: 160-pin PQFP

Operating Temperature: 0C to +70C (commercial)

Usable Gates: 2,500