H5AN4G8NBJR-PBC vs MT40A512M8RH-083E Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng H5AN4G8NBJR-PBC sa pamamagitan ng SK hynix at MT40A512M8RH-083E sa pamamagitan ng Micron Technology. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Micron Technology
MT40A512M8RH-083E - 4Gb DDR4 512Mx8 2400MHz | Micron
MT40A512M8RH-083E ✓ NakahandaPagsanggunian na paghahambing
| Parametro | H5AN4G8NBJR-PBC | MT40A512M8RH-083E |
|---|---|---|
| Brand | SK hynix | Micron Technology |
| Kategorya | Memory ICs | Memory ICs |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Memory Density | 4 Gbit | — |
| Organisasyon | 512M x 8 | 512M x 8 |
| Uri ng Memory | DDR4 SDRAM | DDR4 SDRAM |
| Uri ng Interface | Parallel, JEDEC DDR4 | — |
| Supply Voltage VDD | 1.2 V | — |
| Supply Voltage VDDQ | 1.2 V | — |
| Speed Grade | PBC | — |
| Clock Frequency | [DATA_NEEDED: Clock Frequency] | — |
| CAS Latency (CL) | [DATA_NEEDED: CAS Latency] | — |
| Packhaging | 78-ball FBGA | 78-ball FBGA (9 x 10.5 mm) |
| Uri ng Pagpapasok | Surface Mount | — |
| Normal Operating Case Temperature | 0C to 85C | — |
| Extended Temperature Range | up to 95C case (with increased refresh) | — |
| Lead Free | Yes | — |
| Wala sa Halogen | Yes | — |
| Refresh | 8n prefetch, standard/auto refresh per DDR4 JEDEC | 64 ms, 8192-cycle refresh (to 95C) |
| Density | — | 4 Gbit |
| Industry Speed Grade | — | DDR4-2400 |
| Clock Rate | — | 1.2 GHz |
| Internal Banks | — | 8 banks (2 groups of 4) |
| Prefetch | — | 8n-bit |
| VDD / VDDQ | — | 1.2 V +/-60 mV |
| VPP | — | 2.5 V, -125 mV/+250 mV |
| I/O Structure | — | 1.2 V pseudo open-drain |
| VREFDQ | — | On-die internal, adjustable generation |
| Temperature na Operasyon | — | 0C to +95C |
| FBGA Code | — | D9TGG |
| Marking Code | — | D9TGG |
| Data Strobe Preamble | — | Programmable |
| Tindminan RoHS | — | Compliant |
| Latensya ng CAS | — | [DATA_NEEDED: CAS latency per speed bin table] |