EP3SE260H780C4L vs EP3SE260H780C3N Karşılaştırma
Ayrıntılı yan yana karşılaştırma EP3SE260H780C4L tarafından Intel ve EP3SE260H780C3N tarafından IntelAnahtar özellikleri, elektriksel parametreleri, ambalajı, yaşam döngüsü durumu, fiyatlandırma ve mevcudiyeti karşılaştırarak tasarım gereksinimleriniz için en iyi bileşeni belirleyin.
Intel
EP3SE260H780C3N - Stratix III E FPGA, 255K LE, 780-BGA | Intel / Altera
EP3SE260H780C3N ✓ AktifÖzellik Karşılaştırması
| Parametre | EP3SE260H780C4L | EP3SE260H780C3N |
|---|---|---|
| Marka | Intel | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Yaşam Döngüsü Durumu | NRND | Aktif |
| Family | Stratix III E | — |
| Logic Elements | 255,000 | — |
| LABs/CLBs | 10,200 | — |
| Total RAM Bits | 16,672,768 (16.7 Mbit) | — |
| User I/O Count | 488 | — |
| Paket | 780-ball FCBGA (HBGA 33x33 mm) | 780-BBGA, FCBGA (H780) |
| Speed Grade | C4 (middle/slow tier) | — |
| Core Voltage | 0.9 V (nominal) | — |
| İşletim Jant Sıcaklığı | 0C to +85C (commercial) | — |
| Montaj Türü | Surface Mount (flip-chip BGA) | Surface Mount |
| MSL Seviyesi | [DATA_NEEDED: MSL level] | — |
| RoHS Durumu | Compliant (lead-free per datasheet) | Compliant (lead-free 'N' suffix) |
| Transceivers | Up to 24 multi-gigabit transceivers | [DATA_NEEDED: number of embedded transceivers and max data rate] |
| Memory Interface | DDR3, DDR2, QDRII+, RLDRAM II controllers | — |
| Configuration Mode | PS, FPP, JTAG with EPCS/EPCQ | — |
| Series | — | Stratix® III E |
| Logic Elements (LE) | — | 255,000 |
| Embedded Memory (bits) | — | 16,672,768 |
| Number of LABs/CLBs | — | 10,200 |
| User I/Os | — | 488 |
| Number of Pins / Balls | — | 780 |
| İşletim Sıcaklığı | — | 0 °C to +85 °C (C grade, commercial) |
| Process Technology | — | 40 nm CMOS |
| Maximum Core Frequency | — | [DATA_NEEDED: maximum core frequency MHz] |
| Supply Voltage (VCCINT) | — | [DATA_NEEDED: VCCINT nominal V] |
| DSP Blocks | — | [DATA_NEEDED: number of DSP blocks and precision] |
| Nem Hassasiyet Seviyesi (MSL) | — | [DATA_NEEDED: MSL level per JEDEC J-STD-020] |
| Configuration Method | — | SRAM-based, configured via JTAG / passive / active serial / fast passive parallel |
| Design Toolchain | — | Altera Quartus II (legacy); Intel Quartus Prime |