10AX090N3F45I2SG - Arria 10 GX FPGA 900K LE, 1932-FCBGA | Intel
MPN: 10AX090N3F45I2SG ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $4500 | $4,500.00 |
| 10 | $4250 | $42,500.00 |
| 50 | $3950 | $197,500.00 |
| 100 | $3700 | $370,000.00 |
| 500 | $3450 | $1,725,000.00 |
Drop-in alternatives for 10AX090N3F45I2SG — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
10AX090N3F45I2LG
✅ Drop-In✓ In Stock
$2995 / Unit
View Datasheet →10AX090N3F45E2LG
✅ Drop-In✓ In Stock
$2285 / Unit
View Datasheet →10AX090N3F40I2SG
✅ Drop-In✓ In Stock
$2250 / Unit
View Datasheet →10AX090N2F45I2SG
✅ Drop-In✓ In Stock
$3475 / Unit
View Datasheet →10AS066N3F45I2SG
✅ Drop-In📋 Reference alternative (not in catalog)
10AX090N3F45I2SG Maximum Ratings & Electrical Characteristics
| Family | Arria 10 GX |
| Logic Elements | 900,000 |
| Adaptive Logic Modules (ALMs) | 339,620 |
| Embedded Memory (M20K blocks) | 1,800 |
| Embedded Memory (bits) | 59,234,304 |
| DSP Blocks | 1,518 |
| Maximum User I/Os | 768 |
| Transceivers | 24 |
| Max Transceiver Data Rate | 28.05 Gbps |
| Process Technology | TSMC 20nm |
| Speed Grade | -3 |
| Temperature Grade | Industrial (-40C to +100C) |
| Package | 1932-ball FCBGA (F45) 45 x 45 mm |
| Mounting Type | Surface Mount (BGA) |
| RoHS Status | Compliant |
10AX090N3F45I2SG 1932-ball fcbga (f45) 45 x 45 mm Pin Configuration Guide
Complete pinout information for 10AX090N3F45I2SG (1932-ball fcbga (f45) 45 x 45 mm package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for 10AX090N3F45I2SG.
Refer to the datasheet for full pin configuration.
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
10AX090N3F45I2SG is suitable for 7 applications: 100G/400G Optical Transport Line Cards, Radar and Electronic Warfare Signal Processing, 4K/8K Video Broadcast Infrastructure, Medical Imaging Accelerator Boards, ASIC Prototyping and Emulation, Test and Measurement Instrumentation, 5G Fronthaul and Baseband Processing.
100G/400G Optical Transport Line Cards
The 10AX090N3F45I2SG's 24 transceivers at 28.05 Gbps make it a natural fit for 100G and emerging 400G OTN/OTU4 line cards. Four transceivers can be aggregated into a single 100G port, and the 900K logic elements plus 1,518 DSP blocks provide ample fabric for OTN framer/mapper, FEC, and MACD IP cores. Industrial temperature operation allows deployment in outdoor-cabinet telecom hardware.
Recommended
Radar and Electronic Warfare Signal Processing
The 10AX090N3F45I2SG delivers 1,518 variable-precision DSP blocks capable of supporting 32-tap FFT/iFFT and complex multiplies at high Fmax, well-suited to radar pulse compression and EW channelization. The 24 transceiver channels at 28.05 Gbps handle multi-element phased-array antenna digitizers. Industrial temperature and the -3 speed grade support deployment in airborne and naval EW pods.
Recommended
4K/8K Video Broadcast Infrastructure
The 10AX090N3F45I2SG drives 4K and 8K broadcast workflows: 768 user I/Os support multi-stream SDI aggregation, 1,518 DSP blocks accelerate HEVC/H.265 intra-frame encoding, and the 59.2 Mbit embedded memory buffers 8K frame buffers. Industrial temperature enables use in OB vans and outdoor broadcast enclosures where fanless thermal envelopes are required.
Recommended
Medical Imaging Accelerator Boards
The 10AX090N3F45I2SG accelerates CT and MRI reconstruction (back-projection, FDK, iterative reconstruction) thanks to 1,518 floating-point-capable DSP blocks and 900K LEs for control plane. The 24 transceivers at 28.05 Gbps accept multi-channel detector data from modern CT scanners. Industrial temperature operation supports use in clinical and mobile imaging carts.
Recommended
ASIC Prototyping and Emulation
The 10AX090N3F45I2SG's 900K LEs make it a viable ASIC prototyping vehicle for mid-complexity ASICs up to ~20M gates when using multi-FPGA partitioning. The 24 transceivers at 28.05 Gbps handle high-speed chip-to-chip links in multi-FPGA emulation boards. The industrial temperature range supports in-vehicle pre-silicon validation.
Recommended
Test and Measurement Instrumentation
The 10AX090N3F45I2SG sits inside high-end oscilloscopes and protocol analyzers where its 768 user I/Os drive fine-grained channelization and its 28.05 Gbps transceivers analyze 100G-class signals. The 1,518 DSP blocks perform real-time FFT-based spectrum analysis at multi-GHz sample rates. Industrial temperature ensures stability in lab and field test environments.
Recommended
5G Fronthaul and Baseband Processing
The 10AX090N3F45I2SG supports 5G fronthaul (CPRI/eCPRI up to option 9) via 24 transceivers at 28.05 Gbps and executes low-PHY baseband processing using 1,518 DSP blocks and 900K LEs. Hardened PCIe Gen3 x8 enables host connectivity. Industrial temperature operation allows deployment in outdoor 5G base station units.
Recommended
Recommended Products Summary
Engineering reference data for 10AX090N3F45I2SG — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | 10AX090N3F45I2LG | 10AX090N3F45E2LG | 10AX090N2F45I2SG | 10AX090N3F40I2SG | 10AS066N3F45I2SG |
|---|---|---|---|---|---|---|
| Brand | Intel | Intel | Intel | Intel | Intel | Intel |
| Package | 1932-FCBGA (F45) 45x45mm | 1932-FCBGA (F45) 45x45mm - same | 1932-FCBGA (F45) 45x45mm - same | 1932-FCBGA (F45) 45x45mm - same | 1932-FCBGA (F40) 40x40mm - smaller | 1932-FCBGA (F45) 45x45mm - same |
| Logic Elements | 900,000 | 900,000 | 900,000 | 900,000 | 900,000 | 660,000 |
| Speed Grade | -3 | -3 | -3 | -2 | -3 | -3 |
| Temperature Grade | Industrial (-40C to +100C) | Industrial (-40C to +100C) | Extended (0C to +100C) | Industrial (-40C to +100C) | Industrial (-40C to +100C) | Industrial (-40C to +100C) |
| Family Variant | Arria 10 GX | Arria 10 GX | Arria 10 GX | Arria 10 GX | Arria 10 GX | Arria 10 SX (with ARM) |
| Transceivers | 24 x 28.05 Gbps | 24 x 28.05 Gbps | 24 x 28.05 Gbps | 24 x 28.05 Gbps | 24 x 28.05 Gbps | [DATA_NEEDED] |
| DSP Blocks | 1,518 | 1,518 | 1,518 | 1,518 | 1,518 | [DATA_NEEDED] |
| User I/Os (max) | 768 | 768 | 768 | 768 | [DATA_NEEDED - reduced in F40] | 768 |
Key Differentiators
- Highest-density Arria 10 GX FPGA in the F45 FCBGA-1932 package (vs 10AX090N3F40I2SG (F40 variant))
- Speed grade -3 maximizes Fmax in industrial temperature (vs 10AX090N2F45I2SG (-2 speed grade))
- GX variant with 24 transceivers at 28.05 Gbps (vs 10AS066N3F45I2SG (Arria 10 SX))
Design Notes
Estimated: at typical Arria 10 GX utilization (75% LE, 50% DSP, all 24 transceivers active), total power consumption is approximately 25-35 W, requiring at least 0.9 V core rail at 30 A. Use Intel PowerPlay Early Power Estimator (EPE) before PCB layout. Place bulk decoupling (4x 470 uF polymer + 22x 22 uF ceramic) immediately adjacent to the FCBGA's power pins and use a 12+ layer PCB stack-up with dedicated power/ground planes.
The 1932-ball FCBGA F45 package at 45 x 45 mm with 1.0 mm ball pitch requires laser-drilled microvias (stacked 2-2-2 or 1-2-1 build-up). Maintain 50-ohm controlled impedance for transceiver lanes and 100-ohm differential for high-speed serial. Use Intel's Arria 10 GX pin-out table to identify GXB/HSMC/LVDS pairs before final pin assignment.
Industrial temperature range to +100C junction demands either a high-performance heatsink with TIM, or 1+ m/s forced airflow across the FCBGA. Estimate theta_JA around 0.5-1.5 C/W with a properly designed thermal solution. Place 6-8 thermal vias in the ball-grid thermal pad array to spread heat into inner ground planes.
For 28.05 Gbps transceivers, route AC-coupled channels with pre-emphasis and equalization settings from Intel's Transceiver Toolkit. Match trace lengths within +/- 0.127 mm for lanes within a bond group. Use the Arria 10 GX IBIS-AMI models for channel simulation; expect -8 dB insertion loss at 14 GHz Nyquist frequency.
Do not confuse the F45 (45x45 mm) FCBGA with the F40 (40x40 mm) variant - they share pin count but have different I/O maps and are NOT pin-to-pin interchangeable. Confirm the OPN string ends in F45 before PCB fab. Also verify the SX/GX distinction: 10AX = GX, 10AS = SX (with ARM cores); the bitstream is incompatible across families.
Compliance Information
RoHS and lead-free status confirmed per Intel product page and Ampheo distributor listing. AEC-Q100 not applicable as this is a high-density FPGA designed for industrial/telecom/datacom, not automotive. REACH and halogen-free status should be verified from latest Intel material declaration.
