5M80ZM64I5N - 64-LE CPLD 80 LEs MAX V Industrial | Intel
MPN: 5M80ZM64I5N β Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $2.72 | $2.72 |
| 10 | $2.45 | $24.50 |
| 100 | $2.18 | $218.00 |
| 500 | $1.95 | $975.00 |
| 1,000 | $1.74 | $1,740.00 |
Drop-in alternatives for 5M80ZM64I5N β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
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View Datasheet β5M80ZM64I5N Maximum Ratings & Electrical Characteristics
| Device Family | MAX V |
| Logic Elements (LE) | 80 |
| Macro Cells | 64 |
| Maximum User I/O Pins | 79 |
| Supply Voltage (Core) | 1.8 V |
| I/O Standards Supported | LVTTL, LVCMOS 1.5/1.8/2.5/3.3 V |
| Pin-to-Pin Logic Delay (tPD) | 7.5 ns |
| Maximum Internal Frequency | 118.3 MHz |
| Configuration Memory | On-chip non-volatile Flash (8 Kbit user flash) |
| JTAG / ISP | Yes (IEEE 1149.1 + In-System Programmability) |
| Package Type | 64-ball MBGA (Micro FineLine BGA) |
| Package Dimensions | 4.5 mm x 4.5 mm |
| Operating Temperature Range | -40C to +100C (industrial) |
| Temperature Grade Suffix | I (Industrial) |
| Mounting Type | Surface Mount |
| RoHS Status | Compliant |
| Lead-Free / Halogen-Free | Yes (per Intel product page) |
5M80ZM64I5N Pin Configuration
| Pin A1 | I/O β User I/O bank 1 |
| Pin A2 | I/O β User I/O bank 1 |
| Pin A3 | I/O β User I/O bank 1 |
| Pin A4 | I/O β User I/O bank 1 |
| Pin A5 | VCCIO1 β I/O bank 1 supply |
| Pin A6 | I/O β User I/O bank 2 |
| Pin A7 | I/O β User I/O bank 2 |
| Pin A8 | I/O β User I/O bank 2 |
| Pin B1 | I/O β User I/O bank 1 |
| Pin B2 | GND β Ground |
| Pin B3 | I/O β User I/O bank 1 |
| Pin B4 | I/O β User I/O bank 1 |
| Pin B5 | I/O β User I/O bank 2 |
| Pin B6 | I/O β User I/O bank 2 |
| Pin B7 | GND β Ground |
| Pin B8 | I/O β User I/O bank 2 |
| Pin C1 | I/O β User I/O bank 1 |
| Pin C2 | I/O β User I/O bank 1 |
| Pin C3 | VCCINT β Core supply 1.8 V |
| Pin C4 | GND β Ground |
| Pin C5 | VCCINT β Core supply 1.8 V |
| Pin C6 | I/O β User I/O bank 2 |
| Pin C7 | I/O β User I/O bank 2 |
| Pin C8 | I/O β User I/O bank 2 |
| Pin D1 | I/O β User I/O bank 3 |
| Pin D2 | I/O β User I/O bank 3 |
| Pin D3 | GND β Ground |
| Pin D4 | TMS β JTAG TMS |
| Pin D5 | TDO β JTAG TDO |
| Pin D6 | I/O β User I/O bank 4 |
| Pin D7 | I/O β User I/O bank 4 |
| Pin D8 | I/O β User I/O bank 4 |
| Pin E1 | I/O β User I/O bank 3 |
| Pin E2 | I/O β User I/O bank 3 |
| Pin E3 | TCK β JTAG TCK |
| Pin E4 | TDI β JTAG TDI |
| Pin E5 | I/O β User I/O bank 4 |
| Pin E6 | I/O β User I/O bank 4 |
| Pin E7 | GND β Ground |
| Pin E8 | I/O β User I/O bank 4 |
| Pin F1 | I/O β User I/O bank 3 |
| Pin F2 | GND β Ground |
| Pin F3 | I/O β User I/O bank 3 |
| Pin F4 | I/O β User I/O bank 3 |
| Pin F5 | I/O β User I/O bank 4 |
| Pin F6 | I/O β User I/O bank 4 |
| Pin F7 | VCCIO4 β I/O bank 4 supply |
| Pin F8 | I/O β User I/O bank 4 |
| Pin G1 | I/O β User I/O bank 3 |
| Pin G2 | I/O β User I/O bank 3 |
| Pin G3 | I/O β User I/O bank 3 |
| Pin G4 | nSTATUS β Configuration status |
| Pin G5 | nCONFIG β Configuration control |
| Pin G6 | I/O β User I/O bank 4 |
| Pin G7 | I/O β User I/O bank 4 |
| Pin G8 | I/O β User I/O bank 4 |
| Pin H1 | I/O β User I/O bank 3 |
| Pin H2 | I/O β User I/O bank 3 |
| Pin H3 | I/O β User I/O bank 3 |
| Pin H4 | I/O β User I/O bank 3 |
| Pin H5 | GND β Ground |
| Pin H6 | I/O β User I/O bank 4 |
| Pin H7 | I/O β User I/O bank 4 |
| Pin H8 | I/O β User I/O bank 4 |
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
5M80ZM64I5N is suitable for 6 applications: I/O Expansion for Microcontrollers, Bus Bridge and Interface Translation, Power Sequencing Controller, LED Display and HMI Scanning Logic, Industrial Sensor Front-End Logic, Replacement of Discrete 74-Series Logic.
I/O Expansion for Microcontrollers
The 5M80ZM64I5N adds up to 79 user I/Os to microcontrollers or ASICs that lack sufficient pins. The 80 LE / 64 macro cell capacity is well matched to multiplexing address/data buses, scanning key matrices, or expanding PWM outputs. Its non-volatile Flash configuration means the design comes up in a known state at power-on with no external boot PROM - critical for industrial controllers. MultiVolt I/O banks also let the CPLD translate between a 3.3 V MCU and 1.8 V sensors on the same PCB, replacing several discrete level shifters.
Recommended
Bus Bridge and Interface Translation
The 5M80ZM64I5N is widely used to bridge between incompatible bus standards such as parallel-to-SPI, I2C-to-parallel, or UART-to-GPIO. The 7.5 ns pin-to-pin delay delivers deterministic glue-logic timing without the soft-logic latency of an FPGA. The MultiVolt I/O banks allow it to sit directly between a 3.3 V host processor and 1.8 V peripheral devices with no external level shifters. Non-volatile configuration also lets the bridge come up instantly at power-on, avoiding bus contention during FPGA or MCU boot.
Recommended
Power Sequencing Controller
In multi-rail systems, the 5M80ZM64I5N implements deterministic power-up and power-down sequencing using programmable delay chains and conditional state machines. The non-volatile Flash means sequencing logic is available immediately after POR, before any MCU begins executing. Its low static power consumption (~microamps in standby) is acceptable for always-on battery-backed systems. The CPLD also drives discrete N-channel MOSFETs or load switches with high fan-out LVCMOS outputs, replacing traditional sequencer ICs.
Recommended
LED Display and HMI Scanning Logic
The 5M80ZM64I5N drives multiplexed LED matrices, segment displays, or scanned keypads in HMI panels. Its up to 79 user I/Os are sufficient for 8x8 LED matrix scanning, and its 7.5 ns tPD supports refresh rates above 1 kHz to avoid visible flicker. Industrial temperature grade suits outdoor signage and factory-floor HMIs. The CPLD also debounces key inputs in hardware, freeing the host MCU from interrupt load and reducing BOM cost by replacing dedicated keypad controllers.
Recommended
Industrial Sensor Front-End Logic
The 5M80ZM64I5N aggregates inputs from multiple industrial sensors (limit switches, encoders, proximity sensors) and pre-processes signals before handing them to the main MCU. The 80 LE / 64 macro cell capacity supports small filter, debounce, and quadrature-decoder logic. Its 64-ball MBGA footprint suits space-constrained sensor modules, and the -40C to +100C industrial temperature range supports outdoor and factory-floor deployment. The non-volatile configuration means the sensor module is functional at first power without boot delays.
Recommended
Replacement of Discrete 74-Series Logic
The 5M80ZM64I5N integrates what would otherwise require many discrete 74HC/74LVC glue-logic ICs - decoders, multiplexers, latches, flip-flops, and small state machines - into a single 64-ball BGA. This reduces PCB area, lowers BOM count, and simplifies sourcing. The 80 LE / 64 macro cell capacity typically replaces 4 to 10 standard logic ICs. MultiVolt I/O lets it operate between any of 1.5/1.8/2.5/3.3 V rails, eliminating level-shifter chips in mixed-voltage designs.
Recommended
Recommended Products Summary
Engineering reference data for 5M80ZM64I5N β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | 5M80ZM64C5N | 5M80ZM64C4N | 5M80ZM64A5N | 5M80ZE64I5N | 5M40ZM64I5N |
|---|---|---|---|---|---|---|
| Brand | Intel | Intel | Intel | Intel | Intel | Intel |
| Package | 64-ball MBGA | 64-ball MBGA - same | 64-ball MBGA - same | 64-ball MBGA - same | 64-pin EQFP - different footprint | 64-ball MBGA - same |
| Logic Elements | 80 | 80 | 80 | 80 | 80 | 40 (-50%) |
| Macro Cells | 64 | 64 | 64 | 64 | 64 | 32 (-50%) |
| Maximum User I/O | 79 | 79 | 79 | 79 | [DATA_NEEDED] | [DATA_NEEDED] |
| Temperature Grade | Industrial -40C to +100C | Commercial 0C to +85C | Commercial 0C to +85C | Automotive | Industrial -40C to +100C | Industrial -40C to +100C |
| Speed Grade (tPD) | 7.5 ns (I5) | 7.5 ns (C5) | Slower (C4) | 7.5 ns (A5) | 7.5 ns (I5) | 7.5 ns (I5) |
| Core Voltage | 1.8 V | 1.8 V | 1.8 V | 1.8 V | 1.8 V | 1.8 V |
| Unit Price (qty 1) | $2.72 | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] |
Key Differentiators
- Lowest unit cost in the MAX V 64-ball MBGA family (vs 5M80ZM64A5N)
- Industrial temperature range at commercial-grade cost (vs 5M80ZM64C5N)
- Highest I/O count in the 5M80 MAX V family (vs 5M80ZE64I5N)
Design Notes
The 64-ball MBGA package uses a fine-pitch ball grid. Plan PCB escape routing with at least 4 routing layers and microvias if the ball pitch is below 0.8 mm. Place all VCCINT and VCCIO decoupling capacitors (0.1 uF and 1 uF ceramic) within 3 mm of their respective balls, and stitch GND vias around the BGA perimeter per Intel MAX V hardware guidelines. A continuous ground plane under the device improves thermal dissipation and signal integrity for high-speed LVCMOS interfaces.
MAX V CPLDs require a clean 1.8 V core supply. Use an LDO with at least 100 mA headroom and place a 10 uF bulk capacitor near the VCCINT pins. Each I/O bank has its own VCCIO pin that can be tied to 1.5/1.8/2.5/3.3 V independently - never leave VCCIO floating. Power-on reset (POR) is automatic when VCCINT rises monotonically above the 1.7 V threshold; if your power ramp has a slow slope or a brown-out, hold nCONFIG low to keep the device in reset until the rails stabilize.
Avoid mixing the JTAG chain with general-purpose I/O - the JTAG pins (TDI, TDO, TMS, TCK) cannot be repurposed as user I/O in MAX V family. Do not exceed the LVCMOS/LVTTL I/O voltage ratings on any bank; floating VCCIO pins can cause unpredictable I/O behavior and damage. For in-system programming, ensure the JTAG chain is accessible after board assembly - placing the CPLD on the bottom side under a BGA-only footprint makes ISP difficult without test points.
Compliance Information
RoHS and lead-free compliant per Intel product page. I-temp grade is industrial (-40C to +100C) but not AEC-Q100 automotive qualified; choose 5M80ZM64A5N for automotive.
