IPD320N20N3GATMA1 - 200V 34A OptiMOS3 N-Channel MOSFET | Infineon
MPN: IPD320N20N3GATMA1 β Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $2.45 | $2.45 |
| 10 | $2.18 | $21.80 |
| 100 | $1.92 | $192.00 |
| 500 | $1.71 | $855.00 |
| 1,000 | $1.52 | $1,520.00 |
| 2,500 | $1.34 | $3,350.00 |
Drop-in alternatives for IPD320N20N3GATMA1 β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool β Select alternative parts for side-by-side comparison:
IPD320N20N3G
β Drop-Inπ Reference alternative (not in catalog)
IPD320N20N3GATMA1
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$1.34 / Unit
View Datasheet βIPD320N20N3GATMA1 Maximum Ratings & Electrical Characteristics
| FET Type | N-Channel |
| Technology | OptiMOS 3 |
| Drain-Source Voltage (VDS) | 200 V |
| Continuous Drain Current (ID, Tc) | 34 A |
| Power Dissipation (PD, Tc) | 136 W |
| On-Resistance RDS(on) max | 32 mOhm at VGS = 10 V |
| Gate Charge x RDS(on) FOM | Excellent (per datasheet) |
| Operating Temperature Range | -55 C to +175 C (Tj) |
| Package | PG-TO252-3 (DPAK) |
| Mounting Type | Surface Mount |
| Lead Plating | Pb-free |
| RoHS Compliance | Compliant |
| JEDEC Qualification | Qualified for target application |
| Channel Mode | Enhancement mode |
| Gate Threshold Level | Normal level (per datasheet title) |
IPD320N20N3GATMA1 Pin Configuration
| Pin 1 | GATE β Gate input; drive with 10 V VGS for rated RDS(on) |
| Pin 2 | DRAIN β Drain (connected to tab on some variants) |
| Pin 3 | SOURCE β Source return for gate drive loop |
| Pin TAB | DRAIN β Drain tab; must be soldered to PCB copper for thermal dissipation |
Safe Operating Area (DC, Tc=25C)
Typical Applications
IPD320N20N3GATMA1 is suitable for 6 applications: 48 V Synchronous Rectification, DC-DC Converters, Uninterruptible Power Supplies (UPS), DC Motor Drive Inverters, Battery Management Systems, Solar Inverters and Power Optimizers.
48 V Synchronous Rectification
The IPD320N20N3GATMA1 is optimized for synchronous rectification in 48 V telecom and server bus converters. With 200 V VDS headroom for transient spikes, 32 mOhm RDS(on) at VGS=10 V minimizing conduction loss, and OptiMOS 3 trench FOM enabling fast switching at 100-300 kHz, the part reduces rectifier loss by 30-50% versus planar MOSFETs. Placed on the secondary-side low-side of a buck or forward converter, it outperforms older generation parts and shrinks magnetic size. Source: Infineon OptiMOS 3 datasheet.
Recommended
DC-DC Converters
Hard-switched DC-DC converter stages in telecom, computing, and industrial power benefit from the IPD320N20N3GATMA1's combination of low gate charge and 32 mOhm RDS(on). The OptiMOS 3 process delivers excellent FOM, enabling 94-97% peak efficiency at 100-200 kHz switching frequencies. At 34 A continuous drain current, the part supports 600 W-1 kW converter designs with proper thermal management. The DPAK package simplifies assembly and provides adequate heat-sinking via the drain tab.
Recommended
Uninterruptible Power Supplies (UPS)
UPS inverter and PFC stages require MOSFETs that combine high voltage margin with low conduction loss and proven long-term reliability. The IPD320N20N3GATMA1's 200 V VDS, 34 A ID, JEDEC qualification, and 175 C Tj rating make it well-suited for line-interactive and online UPS designs operating from rectified 120/230 VAC rails. The Pb-free lead plating and RoHS compliance ease compliance for commercial and industrial UPS deployments worldwide.
Recommended
DC Motor Drive Inverters
Low-voltage DC motor drive inverters in robotics, automation, and battery-powered equipment leverage the IPD320N20N3GATMA1 as the low-side switch in H-bridge topologies. The 200 V rating tolerates back-EMF spikes from 48-96 V motor buses, while the 32 mOhm RDS(on) keeps conduction loss low during PWM operation. Infineon's OptiMOS 3 process provides tight threshold distribution for predictable shoot-through behavior in half-bridge configurations.
Recommended
Battery Management Systems
Battery management and protection circuits in 48 V lithium-ion packs, e-mobility, and stationary storage use the IPD320N20N3GATMA1 as the main disconnect switch or in DC-DC isolation stages. The 200 V VDS provides safety margin above 48-60 V bus rails, and the 34 A ID supports typical discharge currents. The DPAK package is footprint-compatible with industry-standard battery management layouts, easing second-source qualification.
Recommended
Solar Inverters and Power Optimizers
Micro-inverters, string inverters, and module-level power optimizers in residential and commercial solar benefit from the IPD320N20N3GATMA1's high switching frequency capability and low FOM. Operating from 40-80 V PV input with voltage transients up to 200 V, the device enables compact magnetics in high-frequency isolated converters. The Pb-free, RoHS-compliant package meets IEC 62109 solar inverter safety and environmental requirements worldwide.
Recommended
Recommended Products Summary
Engineering reference data for IPD320N20N3GATMA1 β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | IPD320N20N3G | IPD320N20N3GATMA1 | IPP320N20N3G |
|---|---|---|---|---|
| Brand | Infineon | Infineon | Infineon | Infineon |
| Package | PG-TO252-3 (DPAK) | PG-TO252-3 (DPAK) - same | PG-TO252-3 (DPAK) - same | PG-TO220-3 - different |
| Drain-Source Voltage (VDS) | 200 V | 200 V | 200 V | 200 V |
| Continuous Drain Current (ID @ Tc) | 34 A | 34 A | 34 A | 34 A |
| On-Resistance RDS(on) max @ VGS=10V | 32 mOhm | 32 mOhm | 32 mOhm | 32 mOhm |
| Technology | OptiMOS 3 | OptiMOS 3 | OptiMOS 3 | OptiMOS 3 |
| Power Dissipation (PD @ Tc) | 136 W | 136 W | 136 W | 136 W |
| RoHS / Pb-free | Yes / Yes | Yes / Yes | Yes / Yes | Yes / Yes |
| Operating Temperature Range (Tj) | -55 C to +175 C | -55 C to +175 C | -55 C to +175 C | -55 C to +175 C |
Key Differentiators
- OptiMOS 3 trench technology with class-leading FOM (vs IRF640 (legacy planar MOSFET))
- Surface-mount DPAK with 136 W power dissipation (vs Through-hole TO-220 alternatives)
- Pb-free, RoHS compliant, JEDEC qualified (vs Older non-RoHS planar MOSFETs)
Design Notes
Estimated: at 34 A continuous drain current in a DPAK with 50 C/W theta_JA (1 sq inch copper, no heatsink), power dissipation of 37 W yields a junction temperature rise of 92 C above ambient. With a 25 C ambient this places Tj at ~117 C - within the 175 C rating but with limited margin. For sustained 30+ A operation, use 2+ square inches of copper or attach a DPAK heatsink to keep Tj below 150 C and extend reliability.
Place the IPD320N20N3GATMA1's drain tab on a copper pad equal to or larger than the tab itself, with multiple thermal vias (typically 6-10 x 0.3 mm) connecting to an internal plane. Keep the gate-drive loop area minimal by routing the gate and source return traces on adjacent layers or as a tightly coupled pair to suppress ringing from the gate-drain capacitance during fast switching transitions.
Do not exceed 200 V VDS even during transient spikes from inductive loads - add a TVS diode or RC snubber if the bus voltage can ring above 180 V under load steps. Ensure VGS does not exceed +/-20 V absolute maximum. Gate-source ESD protection is required during handling; use wrist straps and ESD-safe trays. Finally, do not operate in avalanche repeatedly - this part is rated for occasional avalanche only.
Compliance Information
Pb-free lead plating and RoHS compliant per Infineon product page. JEDEC qualified for target application. Not AEC-Q100 qualified in this MPN; automotive-grade variants are available separately. Halogen-free status not explicitly stated in the Verified Web Data.