IPD65R225C7ATMA1 - 650V 225mΩ 11A CoolMOS C7 N-FET | Infineon
MPN: IPD65R225C7ATMA1 ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $2.59 | $2.59 |
| 10 | $2.32 | $23.20 |
| 100 | $1.96 | $196.00 |
| 500 | $1.62 | $810.00 |
| 1,000 | $1.34 | $1,340.00 |
Drop-in alternatives for IPD65R225C7ATMA1 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
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IPD65R225C7ATMA1 Maximum Ratings & Electrical Characteristics
| Manufacturer | Infineon Technologies |
| Series | CoolMOS C7 |
| Transistor Type | N-Channel MOSFET |
| Technology | Super-junction (SJ) / CoolMOS |
| Drain-Source Voltage (VDSS) | 650 V |
| Continuous Drain Current (ID) at TC | 11 A |
| Power Dissipation (PD) at TC | 63 W |
| On-Resistance RDS(on) max | 225 mΩ |
| Gate-Source Voltage (VGS) | ±20 V (max) |
| Operating Temperature Range | -55°C to +150°C |
| Package | PG-TO252-3 (DPAK) |
| Mounting Type | Surface Mount |
| Number of Pins | 3 (2 + tab) |
| MSL Level | 1 (per JEDEC J-STD-020) |
| RoHS Status | Compliant |
| Avalanche Energy Rated | Yes (per datasheet) |
IPD65R225C7ATMA1 Pin Configuration
| Pin 1 | Gate — Gate drive input; voltage-controlled terminal |
| Pin 2 | Drain — Drain terminal (also connected to metal tab/backside) |
| Pin 3 | Source — Source terminal; return for gate-drive and load current |
Safe Operating Area (DC, TC = 25°C)
Typical Applications
IPD65R225C7ATMA1 is suitable for 6 applications: Server & Telecom Switch-Mode Power Supply (SMPS), Power Factor Correction (PFC) Boost Stage, Solar String Inverter, EV On-Board Charger (OBC) PFC Stage, Industrial Motor Drive (Variable-Frequency Drive VFD), LLC Resonant Half-Bridge Converter.
Server & Telecom Switch-Mode Power Supply (SMPS)
The IPD65R225C7ATMA1 is well-matched to server and telecom PSU primary-side switches because its 650 V VDSS comfortably handles 380 VDC rectified bus voltages from universal mains input, while 225 mΩ RDS(on) at VGS = 10 V limits conduction loss in 1-2 kW half-bridge or full-bridge topologies. The CoolMOS C7 generation's reduced Eoss lowers turn-on loss when paired with a SiC or fast-Si diode, enabling switching frequencies of 100-150 kHz that shrink the main transformer. Compared with planar MOSFETs, the SJ architecture cuts both RDS(on)·Qg and Qrr-related cross-conduction losses, allowing higher power density per cubic inch of PSU chassis.
Recommended
Power Factor Correction (PFC) Boost Stage
In a continuous-conduction-mode PFC boost stage, the IPD65R225C7ATMA1 serves as the boost switch operating at 65-130 kHz PWM. Its 650 V VDSS tolerates 400 VDC output plus inductive overshoot, while the CoolMOS C7's low Qgd reduces the Miller plateau duration and accelerates turn-off, suppressing ringing on the boost diode. With 11 A continuous drain current and 225 mΩ RDS(on), a single IPD65R225C7ATMA1 supports PFC stages up to about 1.5 kW before the conduction loss forces a parallel-device or TO-247 step. The DPAK package's low thermal resistance (~50°C/W on 1 oz copper) keeps the heatsink compact in 1U server form factors.
Recommended
Solar String Inverter
The IPD65R225C7ATMA1 fits single-phase string inverters up to 3 kW as the boost switch in the DC-DC stage or as the primary switch in the DC-AC inverter bridge. Its 650 V rating handles 400-450 VDC PV-bus voltages with avalanche margin, while the 225 mΩ RDS(on) keeps conduction loss below 1% of throughput power at typical operating points. The CoolMOS C7 generation's increased dv/dt ruggedness ensures reliability under the harsh switching conditions of grid-tie inverters, where reactive load steps impose fast voltage transients. Outdoor-rated solar inverters also benefit from the part's -55°C to +150°C operating junction range, accommodating cold-start and full-power summer conditions.
Recommended
EV On-Board Charger (OBC) PFC Stage
In 3.3 kW or 6.6 kW on-board chargers, the IPD65R225C7ATMA1 can be paralleled in the PFC boost stage where 650 V breakdown meets the rectified 400 VDC link. Two paralleled IPD65R225C7ATMA1 devices share current at 22 A combined, halving the effective RDS(on) to roughly 113 mΩ and reducing conduction loss by 50%. The DPAK package's small footprint supports the dense PCB layouts required by automotive OBC enclosures, and Infineon's automotive-grade CoolMOS C7 family provides the reliability data needed for AEC-Q100-based EV power-electronics designs. Designers transitioning from industrial to automotive should evaluate the IAUC100N10S5N040ATMA1 family for full automotive qualification.
Recommended
Industrial Motor Drive (Variable-Frequency Drive VFD)
Industrial low-voltage VFDs operating from 400-480 VAC three-phase rectified mains (565-680 VDC bus) frequently use 650 V MOSFETs in the inverter stage for motors up to 2-3 kW. The IPD65R225C7ATMA1's 650 V VDSS tolerates the rectified bus with avalanche margin, and the CoolMOS C7's low Eoss reduces turn-on loss in hard-switched space-vector-modulated bridges. The DPAK package's screw-down heatsink mounting makes field service easier than SMD-only MOSFETs, while still preserving surface-mount assembly for the low-current gate-drive circuitry. For higher-power drives above 5 kW, designers step up to TO-247 or SOT-227 packages with lower thermal resistance.
Recommended
LLC Resonant Half-Bridge Converter
The IPD65R225C7ATMA1 functions as either primary-side switch in a half-bridge LLC resonant converter delivering 500 W to 2 kW. CoolMOS C7's low output capacitance (Coss) and reduced Qoss are critical for LLC operation, because the resonant tank charges and discharges Coss every cycle - lower Qoss means less circulating current and higher efficiency. The 650 V VDSS handles the resonant tank peak voltages safely, while the 225 mΩ RDS(on) provides acceptable conduction loss at the moderate currents of an LLC primary (typically 5-9 A RMS for a 1 kW design). The DPAK package's small footprint supports the high-density PCB layouts typical of flat-panel TV and notebook adapter power supplies.
Recommended
Recommended Products Summary
Engineering reference data for IPD65R225C7ATMA1 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | IPD65R250C6XTMA1 | IPD65R380C6BTMA1 | NTHL110N65S3H | STF11N65M5 | IPD60R600P7SAUMA1 |
|---|---|---|---|---|---|---|
| Brand | Infineon Technologies | Infineon Technologies | Infineon Technologies | onsemi | STMicroelectronics | Infineon Technologies |
| Package | PG-TO252-3 (DPAK) | PG-TO252-3 (DPAK) - same | PG-TO252-3 (DPAK) - same | PG-TO252-3 (DPAK) - same | PG-TO252-3 (DPAK) - same | PG-TO252-3 (DPAK) - same |
| Technology | CoolMOS C7 (SJ) | CoolMOS C6 (SJ) | CoolMOS C6 (SJ) | NSP SJ | MDmesh M5 (SJ) | CoolMOS P7 (SJ) |
| VDSS (V) | 650 | 650 | 650 | 650 | 650 | 600 |
| RDS(on) max (mΩ) | 225 | 250 | 380 | 220 (typ) | 280 (typ) | 600 |
| Continuous ID (A) at TC | 11 | 11 | 10 | 11 | 11 | 6 |
| Power Dissipation (W) at TC | 63 | 63 | 63 | 65 | 60 | 36 |
| Generation / Era | CoolMOS C7 (current gen) | CoolMOS C6 (prior gen) | CoolMOS C6 (prior gen) | onsemi NSP current | ST MDmesh M5 | CoolMOS P7 (cost-opt) |
| Approx. 1k Price (USD, as of 2026-09-13) | 1.34 | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] |
Key Differentiators
- Latest CoolMOS C7 generation - lowest FoM in 650V class (vs IPD65R250C6XTMA1)
- 650 V VDSS - 8% voltage headroom over 600V alternatives (vs IPD60R600P7SAUMA1)
- Higher continuous drain current than cost-optimized P7 (vs IPD60R600P7SAUMA1)
Design Notes
Estimated: at ID = 5 A continuous, VBUS = 400 V, and assuming a 70% duty cycle, the conduction loss in the IPD65R225C7ATMA1 is Pcond ≈ ID² · RDS(on) · 0.7 ≈ 5² · 0.225 · 0.7 = 3.9 W. With a DPAK thermal resistance of ~50°C/W on 1 oz copper (per the Infineon datasheet layout guidelines), the junction rises ~195°C above ambient - clearly exceeding the 150°C junction limit. Either increase copper area to at least 2 square inches (dropping θJA to ~25°C/W) or force-air cool the heatsink. Always validate with the SOA curve in the datasheet at the worst-case operating point.
The exposed drain tab of the IPD65R225C7ATMA1 must be soldered to a copper pour that extends at least to the edge of the DPAK land pattern. Recommended footprint per Infinean application notes: 6 mm × 8 mm drain pad with thermal vias (0.3 mm diameter, 1 mm pitch) connecting to a 2 oz inner-plane copper heatsink. Place the gate-drive resistor and gate-source pull-down resistor within 5 mm of the gate pin to minimize parasitic inductance that causes Miller-platform oscillations in hard-switched applications.
Keep the high-current drain loop (DC+ bus capacitor → MOSFET drain → source → ground return) as physically small as possible - target loop area below 1 cm² to limit stray inductance. The CoolMOS C7 family has high dv/dt (typically 50 V/ns), and loop inductance causes voltage overshoot that can push VDSS beyond its 650 V rating during turn-off. Place a 100 nF X7R snubber or RC damper across the device if overshoot exceeds 80% of VDSS during worst-case switching transients.
Do not gate-drive the IPD65R225C7ATMA1 with VGS above ±20 V - the datasheet absolute maximum is ±20 V, and exceeding this destroys the gate oxide. Many designers use 12 V gate drives for C7; this is safe but pushes RDS(on) 5-10% higher than the 10 V datasheet test condition. Below VGS = 8 V the device may not fully enhance, inflating RDS(on) by 2× or more. For low-side switch applications, use a dedicated gate-driver IC (such as UCC27714 or Infineon 1EDN7511B) rather than a logic-level GPIO, which cannot source sufficient peak gate current for fast switching.
Compliance Information
RoHS and REACH compliant per Infineon product page; not AEC-Q100 qualified (industrial grade only - for automotive use, consider the automotive-grade CoolMOS C7 variants in the IAUC family). Halogen-free per JEDEC JS709B.
