FPGA & CPLD
Products (6352)
RTAX2000S-LG624V - 2M-Gate Rad-Tolerant FPGA | Microchip
The Microchip Technology RTAX2000S-LG624V is a radiation-tolerant, anti-fuse-based FPGA delivering approximately 2,000,000 equivalent system gates with 21,504 Configurable Logic Blocks (32,256 logic cells) in a 624-column ceramic column grid array (CG624) package. It belongs to the RTAX-S/SL family purpose-built for space-flight systems. A radiation-tolerant FPGA is a field-programmable gate array engineered to survive the ionizing radiation environment of orbital and deep-space missions. Within the semiconductor hierarchy, it sits under programmable logic devices alongside standard FPGAs, but adds single-event and total-ionizing-dose tolerance that commercial parts lack. RTAX-S devices are one-time-programmable and live at power-up, making them a drop-in alternative to custom radiation-hardened ASICs for many payloads. Key features include highly reliable nonvolatile antifuse technology, up to 684 user I/Os, up to 540 kbits of embedded SRAM with optional EDAC protection, total ionizing dose tolerance of 300 krad (functional) and 200 krad (parametric), and single-event upset rates below 1E-10 errors per bit-day. These figures, taken from the Microchip RTAX-S/SL and RTAX-DSP datasheet, make the device suitable for missions where reconfiguration is not required but immunity to configuration upsets is essential. Architecturally, the RTAX-S family is based on the commercial Axcelerator fabric, using segmented clock structures, chip-wide highway routing, and embedded FIFO control logic. The antifuse interconnect is programmed once at the board factory and is inherently SEU-hard at the configuration level, unlike SRAM-based FPGAs that require scrubbing. The LG624 designation indicates a ceramic lid package qualified for screening in space-grade flows. Typical applications include satellite payload data processing, spacecraft bus control and telemetry, sensor interface and image-processing chains on orbiters, and guidance electronics on launch vehicles. Designers choose RTAX2000S when logic density of about two million gates must operate for years under radiation without configuration errors. A critical design consideration is that RTAX-S devices are one-time-programmable: verify the design thoroughly on a reprogrammable prototype such as the Aldec ACT-H3K-CG624 adaptor before programming flight units. This page synthesizes distributor data, drop-in alternatives within the same CG624 footprint, and practical design notes not found in the manufacturer datasheet. Pricing is quoted as of 2026-09-02.
RTAX2000SL-1CG624PROTO - 2M Space FPGA | Microchip
The Microchip Technology RTAX2000SL-1CG624PROTO is a radiation-tolerant field programmable gate array (FPGA) with 2,000,000 equivalent system gates, 32,256 logic cells, and 21,504 CLBs, supplied in a 624-terminal ceramic CBGA624 column-grid package. It is part of the RTAX-S/SL family developed for space-flight systems where low power, true single-chip form factor, and live-at-power-up operation are essential. What is a radiation-tolerant FPGA? An FPGA is an integrated circuit whose logic fabric can be configured after manufacture. A radiation-tolerant FPGA is designed to operate in environments with high-energy particles such as low-Earth orbit, deep space, and avionics. In the product hierarchy, RTAX-S/SL belongs to FPGA -> programmable logic device -> integrated circuit. Unlike ordinary commercial SRAM FPGAs, the RTAX2000SL family is intended for high-reliability systems that require predictable performance under ionizing-radiation exposure and a non-volatile, live-at-power-up architecture. The RTAX2000SL-1CG624PROTO provides 2,000,000 equivalent system gates, 32,256 logic cells, and 21,504 CLBs in the RTAX2000SL variant. The device is based on advanced CMOS technology and is supplied in the high-density CG624 footprint. According to the Microchip product family page, RTAX-S radiation-tolerant FPGAs combine industry-leading space-flight design advantages including low-power consumption, true single-chip implementation, and live-at-power-up operation. The architecture is derived from the Microsemi commercial Axcelerator family. Datasheet-level family features include embedded SRAM with built-in FIFO control logic, segmentable clocks, chip-wide highway routing, and carry logic. These resources enable complex digital system implementation without requiring an external boot PROM. The CBGA624 package provides a large number of controlled-impedance interconnects for dense space board designs. Typical applications include spacecraft command and data handling, launch-vehicle avionics, radiation-tolerant payload processing, secure defense communication baseband processing, and remote-sensing instrument control. The 2M-gate density is large enough for moderate image processing, telemetry formatting, protocol engines, and sensor interfaces, while remaining manageable for single-chip system architectures. Engineers using this PROTO ordering code should treat it as an engineering/prototype part for system development. When the design matures, select a production screening variant such as RTAX2000SL-1CG624V for flight hardware. Always verify package drawing, thermal management, and I/O assignments from the manufacturer datasheet before committing the layout. This page synthesizes distributor availability signals, cross-reference data, packaging context, and practical engineering notes that are not all listed on the manufacturer product page. Pricing and stock should always be re-quoted with an authorized distributor before procurement.
RTAX2000SL-1CGS624E - 2M-Gate Rad-Tolerant FPGA CGA624 | Microchip
The Microchip Technology (Microsemi/Actel) RTAX2000SL-1CGS624E is a radiation-tolerant, high-performance CMOS field programmable gate array (FPGA) with 2,000,000 equivalent system gates, 21,504 configurable logic blocks (CLBs), and an additional 250,000 ASIC gates, housed in a 624-ball ceramic column grid array (CGA-624 / CBGA624) package. The -1 speed grade and extended (E) processing target space-flight deployment. A radiation-tolerant FPGA is a programmable logic device engineered to survive the total ionizing dose (TID), single-event latchup (SEL), and single-event upset (SEU) environment of space. Within the power-management hierarchy of avionics, the RTAX-S/SL family sits alongside onboard computers, payload controllers, and telemetry interfaces, forming the programmable logic layer of satellite and deep-space systems. Key features include densities up to 4 million equivalent system gates across the family, embedded SRAM blocks with built-in FIFO control logic, segmentable clock resources, chip-wide highway routing, and carry logic for arithmetic. The device is live-at-power-up thanks to its anti-fuse programming technology, which also provides a true single-chip form factor with no external configuration device required, reducing board area and improving reliability in orbit. Architecturally, RTAX2000SL is based on the commercial Axcelerator family, fabricated on a 0.15 um CMOS process with a 1.5V core supply and a maximum reported combinatorial performance of 649 MHz. This anti-fuse one-time-programmable fabric is inherently immune to configuration memory upsets, a decisive advantage over SRAM-based FPGAs for space missions. Typical applications include satellite payload data processing, spacecraft bus control, telemetry and telecommand interfaces, and scientific instrument front ends, where low power, single-chip operation, and radiation tolerance are mission-critical. A key design consideration: RTAX devices are one-time programmable, so full functional simulation and thermal analysis must be completed before programming, and ceramic column packages demand strict PCB assembly qualification. This page adds value beyond the datasheet by synthesizing distributor stock signals, same-package drop-in variants, and practical design notes for space-flight FPGA selection.
RTAX2000SL-1CQ256PROTO - 2M-Gate Rad-Tolerant FPGA | Microchip
The Microchip Technology RTAX2000SL-1CQ256PROTO is a radiation-tolerant, antifuse-based Field Programmable Gate Array (FPGA) from the RTAX-S/SL family, delivering 2,000,000 equivalent system gates and 21,504 Configurable Logic Blocks (CLBs) in a 256-pin ceramic quad flat package (CQ256). The PROTO suffix denotes a prototype-grade engineering device intended for design validation before flight-unit procurement. A radiation-tolerant FPGA is a programmable logic device qualified to operate in the high-radiation environment of space, where single-event effects (SEE) and total ionizing dose (TID) would degrade commercial silicon. Within the power-management hierarchy of spacecraft avionics, such devices sit at the top of the reliability ladder, above commercial FPGAs and industrial-grade CPLDs. The RTAX-S/SL family is based on the commercial Axcelerator architecture and is the choice of space designers for its low power, true single-chip form factor, and live-at-power-up operation. Key features include antifuse one-time-programmable (OTP) configuration that is immune to configuration upsets, embedded SRAM blocks with built-in FIFO control logic, segmentable clock resources, chip-wide highway routing, and carry-chain arithmetic support. The SL variant offers reduced static power compared to the standard RTAX-S die, an important advantage in power-constrained satellites. The device is programmed once via antifuse elements, so unlike SRAM FPGAs no external configuration PROM is required and the logic is live at power-up. Designers typically prototype on the PROTO unit and fly the equivalent V-grade (space flight) part. Typical applications include satellite payload processing, spacecraft bus control, telemetry and telecommand interfaces, and instrument control for deep-space missions. Design consideration: because antifuse devices are OTP, timing closure and pin assignment must be fully verified in simulation before programming the flight unit. This page synthesizes distributor availability, drop-in same-package alternatives, and practical space-design notes not consolidated in the manufacturer datasheet.
RTAX2000SL-1CQ352PROTO - 2M-Gate Rad-Tolerant FPGA | Actel
The Actel (Microchip Technology) RTAX2000SL-1CQ352PROTO is a radiation-tolerant field-programmable gate array (FPGA) from the RTAX-S/SL family, offering 2,000,000 equivalent system gates, 21,504 configurable logic blocks (CLBs), and 32,256 logic cells in a 352-terminal ceramic quad flat pack (CQFP-352) with a 0.500 mm terminal pitch. The PROTO suffix identifies the dedicated prototyping variant intended for design verification before flight-unit programming. A radiation-tolerant FPGA is a programmable logic device engineered to survive the ionizing radiation environment of space, where conventional commercial FPGAs suffer single-event effects (SEE) and total ionizing dose (TID) degradation. Within the space-electronics hierarchy, the RTAX-S/SL family sits among antifuse-based, one-time-programmable (OTP) radiation-tolerant FPGAs used in satellites, probes, and space-flight payloads. Key differentiating features include live-at-power-up operation enabled by the antifuse interconnect (no configuration boot time), a true single-chip form factor that eliminates external configuration devices, low static power consumption, and embedded SRAM blocks with built-in FIFO control logic. The device also provides segmentable clock resources and a chip-wide highway routing network inherited from the commercial Axcelerator architecture on which RTAX-S/SL is based. Technically, the RTAX2000SL is built on a CMOS process with antifuse programmable interconnect, delivering deterministic single-event upset (SEU) behavior that designers mitigate through triple-module redundancy (TMR) in the fabric. The SL variant offers enhanced configuration memory radiation tolerance compared to the base RTAX2000S. Typical applications include satellite payload data processing, spacecraft command and telemetry handling, bus avionics, and instrument control in low-Earth-orbit and deep-space missions where single-chip radiation-tolerant logic is mandatory. A critical design consideration: per Microchip application note AC170, prototyping must use the RTAX-S/SL device itself or the approved Axcelerator conversion flow via Libero SoC; the reverse flow from Axcelerator back to RTAX-S/SL is not permitted. This page synthesizes distributor cross-reference data, drop-in same-footprint alternatives, and design guidance not consolidated in the manufacturer datasheet.
RTAX2000SL-1LG1152V - 2M-Gate Rad-Tolerant FPGA | Microchip
The Microchip Technology RTAX2000SL-1LG1152V is a radiation-tolerant, antifuse-based FPGA from the RTAX-S/SL family, delivering an equivalent gate count of 2,000,000 with 32,256 logic cells and 21,504 configurable logic blocks (CLBs) in a 1152-pin ceramic column grid array (CG1152) package. The -1 speed grade and V (flight) quality suffix mark it as a space-flight-grade device intended for orbital and deep-space missions. A radiation-tolerant FPGA is a programmable logic device qualified to survive the total ionizing dose (TID), single-event latchup (SEL), and single-event upset (SET/SEU) environment of spaceflight, sitting within the hierarchy: FPGA -> programmable logic device -> digital IC -> space-grade semiconductor. Unlike SRAM-based FPGAs, the RTAX-S/SL family uses antifuse programmable interconnect, which is one-time programmable and therefore configuration-data immune to SEU effects, enabling live-at-power-up operation without an external configuration flash. Key features include true single-chip form factor (no boot PROM required), low static power consumption critical for power-constrained spacecraft, and the SL process refinement of the RTAX-S architecture. According to the Microchip RTAX-S/SL datasheet, the family is the FPGA of choice for space designers requiring high logic capacity with radiation performance validated for flight programs. Architecturally, the device combines the Actel/Microsemi Axcelerator-derived logic fabric with radiation-hardened interconnect, supporting synchronous and asynchronous designs implemented through Microchip/Libero design flow. The 1152-pin CGA package provides the I/O count needed for payloads, buses, and telemetry interfaces in high-density avionics. Typical applications include satellite payload data processing, spacecraft avionics and attitude-control logic, telecommand/telemetry interfaces, and radiation-hardened glue logic replacing multiple ASICs or MIL-STD parts. The RTAX2000SL-1LG1152V fits missions where high gate count, configuration SEU immunity, and deterministic power-up behavior outweigh reprogrammability. Design consideration: because antifuse FPGAs are one-time programmable, full design verification and the vendor's prototyping methodology (RTAX2000SL-1LG1152PROTO plus adaptor boards and EDIF netlist conversion) must be completed before programming flight devices. This page synthesizes distributor sourcing data, drop-in part-number variants, and design notes not found in the manufacturer datasheet.
RTAX2000SL-1LG624V - 2M-Gate Rad-Tolerant FPGA | Microchip
The Microchip Technology RTAX2000SL-1LG624V is a radiation-tolerant FPGA offering approximately 2,000,000 equivalent gates, 21,504 CLBs, and 32,256 logic cells in a 624-terminal ceramic CGA624 package, qualified for the full military temperature range of -55C to +125C with a nominal 1.5V core supply. A radiation-tolerant FPGA is a field-programmable gate array engineered to survive the heavy-ion and proton environments of spaceflight, where commercial silicon would suffer destructive latch-up or unacceptable configuration upsets. The RTAX-S/SL family sits within the broader hierarchy: FPGA -> programmable logic IC -> space-grade semiconductor, and serves as the flight-compute backbone for satellites, rovers, and planetary probes. Key features of this device include the SL (super low-power) process variant, live-at-power-up operation enabled by its non-volatile anti-fuse programmable fabric, and a true single-chip form factor that eliminates external configuration storage - a critical reliability advantage in orbit where configuration memories are vulnerable to single-event upsets. Low static power consumption preserves the tight spacecraft power budget. Architecturally, the RTAX-S/SL fabric combines configurable logic modules, embedded SRAM blocks, and hard-wired FIFOs, with ample parallel and serial I/O for payload interfaces. The die also supports roughly 250,000 ASIC gates of additional capability per the SL density roadmap. Programming is one-time (anti-fuse), so design freeze and qualification flow mirror an ASIC while retaining FPGA development schedules. Typical applications include satellite payload data processing, telemetry and telecommand controllers, sensor-interface engines for scientific instruments, and bus avionics for LEO, GEO, and deep-space missions. Design consideration: because the fabric is one-time programmable, perform full timing simulation and radiation-lot qualification before commit; plan for the ceramic column-grid-array solder assembly early. This page synthesizes distributor data, drop-in alternatives, and practical design notes not found in the manufacturer datasheet.
RTAX2000SL-CGS624B - 2M-Gate Rad-Tolerant FPGA, 624-CCGA | Microchip
The Microchip Technology (Microsemi/Actel) RTAX2000SL-CGS624B is a high-performance, radiation-tolerant FPGA from the RTAX-S/SL family with 21,504 Configurable Logic Blocks (CLBs), an equivalent system gate count of 2,000,000, 250,000 ASIC gates, and a maximum clock frequency of 350 MHz, housed in a 624-pin ceramic column grid array (CCGA) package. A radiation-tolerant FPGA is a programmable logic device engineered to survive the heavy-ion, proton, and total-ionizing-dose (TID) environments encountered in Earth-orbiting and deep-space missions. Within the programmable logic hierarchy, the RTAX2000SL sits in the space-grade FPGA class, above commercial FPGA families and below full radiation-hardened ASICs, offering flight designers single-chip, live-at-power-up logic without the NRE cost of custom silicon. Key features include a 0.15 um CMOS anti-fuse fabric for true single-chip operation, embedded SRAM blocks with built-in FIFO control logic, segmentable clock-conditioning circuitry, and chip-wide highway routing. The SL variant adds enhanced low-power and radiation performance relative to the base RTAX2000S, and the family provides densities up to four million equivalent system gates for spaceflight payloads. Architecturally, the RTAX-S/SL fabric is based on the commercial Actel Axcelerator family, whose sea-of-modules architecture and high-performance interconnect deliver system clock rates of hundreds of megahertz while consuming low static power, a critical budget parameter for solar-powered spacecraft. Typical applications include satellite payload processing and telemetry formatting, spacecraft bus controllers, radiation-tolerant glue logic that replaces multiple ASICs, and instrument control for science missions. The 624-pin CCGA solder-column package supports reliable board-level attachment for launch-vibration and thermal-cycling environments. Design consideration: as a one-time-programmable (OTP) anti-fuse device, the RTAX2000SL requires rigorous pre-flight design verification; use the Aldec/Microchip flash-based ProASIC3E prototyping adaptor to iterate designs before committing flight hardware. This page synthesizes distributor data, same-family drop-in speed-grade and temperature-grade alternatives, and practical design notes not consolidated in the manufacturer datasheet.
RTAX2000SL-CGS624E - 2M-Gate Rad-Tolerant FPGA CGA-624 | Microchip
The Microchip Technology (Microsemi/Actel) RTAX2000SL-CGS624E is a radiation-tolerant, anti-fuse FPGA delivering 2,000,000 equivalent system gates and 21,504 Configurable Logic Blocks (CLBs) in a 624-ball ceramic column grid array (CBGA624 / CGA-624) package, built for space-flight systems. A radiation-tolerant FPGA is a field programmable gate array qualified to survive the total ionizing dose (TID) and single-event effects (SEE) found in orbital and deep-space radiation environments. Within the power hierarchy of programmable logic, the RTAX-S/SL family sits above commercial FPGAs in robustness while being based on the proven Microsemi Axcelerator commercial architecture, giving space designers a flight-proven, single-chip programmable fabric. Key features include 2M system gates of CMOS anti-fuse fabric, 21,504 CLBs, embedded SRAM blocks with built-in FIFO control logic, segmentable clock resources, chip-wide highway routing, and carry logic for arithmetic. Live-at-power-up operation means the configured design is functional immediately when power is applied - a critical property for spacecraft that cannot tolerate configuration boot delays or configuration-memory upsets. Technically, the RTAX2000SL is one-time programmable (OTP): the anti-fuse interconnect is permanently set during programming, which eliminates configuration memory SEU vulnerability, a key advantage over SRAM-based FPGAs in orbit. The SL variant adds SEU-hardened flip-flop enhancements over the base RTAX2000S. The family scales to four million equivalent system gates, and designs can be prototyped on the equivalent commercial Axcelerator devices using a documented migration flow, or emulated with Aldec ACT-H3Ki-CG624 adaptors that mimic the CG624 footprint. Typical applications include satellite payload data processing, spacecraft bus control and telemetry, communication transponder digital baseband, and space science instrument interface logic - anywhere reprogrammability at the design stage plus radiation tolerance in flight are required together. A key design consideration: the CGA-624 ceramic package requires a matching 624-pad PCB footprint and column-grid soldering process; verify board layout against the manufacturer datasheet package drawing before release. This page synthesizes verified distributor data, same-package drop-in alternatives, and practical design notes not found in the manufacturer datasheet, with pricing tiers to follow as distributor quotes are confirmed.
RTAX2000SL-CGS624V - 2M-Gate Rad-Tolerant FPGA | Microchip
The Actel (Microchip/Microsemi) RTAX2000SL-CGS624V is a 2,000,000-gate radiation-tolerant antifuse FPGA built on CMOS technology, offered in a 624-ball ceramic package (CG624) qualified for space-flight systems. The device provides 21,504 CLBs, up to 684 user I/Os, and up to 540 kbits of embedded SRAM with optional EDAC protection. A radiation-tolerant FPGA is a field-programmable gate array engineered to survive the total ionizing dose (TID) and single-event effects (SEE) found in orbital and deep-space environments. Within the space electronics hierarchy, RTAX-S/SL devices sit alongside radiation-hardened ASICs and rad-tolerant SRAM FPGAs, offering single-chip programmable logic without the NRE cost and long lead times of a custom ASIC. Key features include nonvolatile antifuse technology for live-at-power-up operation with no configuration flash or external boot memory, total dose tolerance of 300 krad (functional) and 200 krad (parametric), and single-event upset rates below 1E-10 errors per bit-day. The SL variant extends the RTAX-S architecture with lower static power consumption, a critical advantage in power-constrained satellites. Architecturally, the RTAX2000SL is derived from the commercial Axcelerator family, combining Sea-of-Modules logic clusters, segmentable clock structures, chip-wide highway routing, and dedicated carry logic. Embedded SRAM blocks include built-in FIFO control logic, simplifying high-throughput data path design. Typical applications include satellite payload processing, spacecraft bus controllers, telemetry and telecommand (TT&C) logic, and instrument interfaces for low-Earth-orbit and deep-space missions. Design consideration: antifuse devices are one-time programmable - the design must be fully verified before flight programming, so engineers typically prototype on reprogrammable ProASIC3E silicon via adapter platforms such as the Aldec RTAX prototyping solution. This page synthesizes verified distributor listings, datasheet-level parameters, drop-in alternatives, and space-grade sourcing guidance not consolidated on the manufacturer datasheet alone.
RTAX2000SL-CQ352V - 2M-Gate Rad-Tolerant FPGA | Microchip
The Microchip Technology RTAX2000SL-CQ352V is a radiation-tolerant, antifuse-based field programmable gate array (FPGA) delivering 2,000,000 equivalent system gates and 21,504 CLBs in a 352-pin ceramic quad flat pack (CQFP-352) hermetic package. It belongs to the RTAX-S/SL family designed specifically for space-flight systems, offering live-at-power-up operation and a true single-chip form factor. A radiation-tolerant FPGA is a programmable logic device engineered to survive the ionizing radiation environment of space, including total ionizing dose (TID) and single-event effects (SEE). Within the power-management hierarchy of spacecraft avionics, the RTAX-S/SL family sits between commercial FPGAs and fully rad-hard ASICs, providing programmability with flight-proven reliability based on Microsemi (Actel) commercial Axcelerator architecture. Key features include 2 million system gates of antifuse-based fabric that is inherently immune to configuration upsets, embedded SRAM blocks with built-in FIFO control logic, segmentable clock circuitry, and chip-wide routing resources. The one-time-programmable antifuse technology means the configuration is live at power-up with no external boot memory, a decisive advantage for launch systems that must operate immediately. The SL variant uses an enhanced process optimized for lower power consumption in orbit, extending mission life for battery- and solar-constrained spacecraft. The device is fabricated in CMOS technology and qualified per the V-grade flow associated with Class V space-level screening referenced in Microchip DLA documentation (Mil Prf 38535 QML environment for Microchip flight parts). Typical applications include satellite command and data handling, spacecraft bus controllers, payload data processing, remote sensing instrument interfaces, and launch vehicle avionics. The CQFP-352 hermetic ceramic package with a power/ground-friendly pinout supports socketed or soldered assembly flows common in high-reliability space programs. Design consideration: because the antifuse fabric is one-time programmable, complete design sign-off should be performed using the Libero SoC design flow and radiation-aware design practices before commit programming; prototypes can be validated on reprogrammable flash-based ProASIC3E devices via the Aldec RTAX prototyping adaptor. This page synthesizes verified distributor data, drop-in alternatives within the same CQFP-352 footprint, and engineering guidance not found in the manufacturer datasheet.
RTAX2000SL-LG1152V - 2M-Gate Rad-Tolerant FPGA | Microchip
The Actel (Microchip Technology) RTAX2000SL-LG1152V is a 2,000,000-gate radiation-tolerant antifuse FPGA with 32,256 logic cells and 21,504 configurable logic blocks, housed in a 1152-pin ceramic column grid array (CGA1152) package qualified for space-flight systems. A radiation-tolerant FPGA is a programmable logic device engineered to survive the ionizing radiation and single-event effects encountered in orbital and deep-space environments. Within the programmable logic hierarchy, the RTAX-S/SL family sits at the top: FPGA -> radiation-tolerant FPGA -> space-grade programmable logic -> aerospace semiconductor. Unlike SRAM-based FPGAs, the RTAX-S/SL uses nonvolatile antifuse technology, so configuration is permanent and the device is live at power-up with no external configuration PROM required - a critical single-chip advantage for spacecraft avionics. Key features include up to 684 user I/Os, up to 540 kbits of embedded SRAM with optional EDAC protection, total ionizing dose tolerance of 300 krad (Si) functional and 200 krad (Si) parametric, and single-event upset rates below 1E-10 errors per bit-day. The SL variant offers reduced power consumption versus the standard RTAX-S, while segmentable clock conditioning circuits and chip-wide highway routing support high-performance signal processing payloads. Architecturally, the RTAX2000SL derives from the commercial Microsemi Axcelerator family, retaining cluster-based logic modules, embedded FIFO control logic, and high-speed chip-wide routing while adding rad-hard process and qualified manufacturing flow. Typical applications include satellite payload data processing, spacecraft bus controllers, telemetry and telecommand interfaces, and sensor signal-chain aggregation in low-Earth-orbit and deep-space missions. Design consideration: antifuse devices are one-time programmable - complete full simulation, timing closure, and radiation design hardening review before programming flight units. This page adds distributor sourcing context, drop-in same-family alternatives, and engineering design notes not found in the manufacturer datasheet.
RTAX2000SL-LG624V - 2M-Gate Rad-Tolerant FPGA 624-CLGA | Microchip
The Microchip Technology RTAX2000SL-LG624V is a radiation-tolerant, antifuse-based FPGA from the RTAX-SL family delivering approximately 2,000,000 equivalent system gates, up to 649 MHz system performance, and a nominal 1.5V core supply in a 624-pin CLGA (LG624) package. A radiation-tolerant FPGA is a field-programmable gate array qualified for space-flight environments, where ionizing radiation can upset conventional SRAM-based logic. Within the programmable logic hierarchy (FPGA -> programmable logic device -> digital IC -> semiconductor), the RTAX-S family occupies the high-reliability tier: unlike SRAM FPGAs that require configuration flash and triple-module redundancy, RTAX-S/SL devices use antifuse programming that is inherently immune to configuration upsets and is live at power-up, with no external boot device required. Key features include single-event upset (SEU) immune antifuse architecture, low static power consumption critical for orbital missions, a true single-chip form factor, and embedded SRAM blocks with built-in FIFO control logic. The device is fabricated on a 0.15 um CMOS process and supports segmentable clocking and chip-wide highway routing resources. Architecturally, the RTAX2000SL is derived from the commercial Axcelerator family, offering 32,256 logic cells organized into CLBs, with dedicated embedded memory and high-performance routing. The SL variant optimizes static power for long-duration space missions where solar or battery power budgets are strict. Typical applications include satellite payload data processing, spacecraft bus controllers, telemetry and telecommand systems, and deep-space science instruments. The 624-pin CLGA package suits high-I/O payloads requiring dense signal integration. Design consideration: antifuse FPGAs are one-time programmable; use the Aldec/Microchip ProASIC3E-based prototyping flow to validate designs before committing flight hardware. This page synthesizes distributor data, drop-in alternatives within the RTAX family, and design guidance not found in the manufacturer datasheet.
RTAX250S-1CG624E - 250K-Gate Rad-Tolerant FPGA 624-CCGA | Microchip
The Microchip Technology RTAX250S-1CG624E is a radiation-tolerant FPGA from the RTAX-S family with 250,000 equivalent system gates, 2816 logic cells, a 649 MHz maximum toggle frequency, and 1.5V core operation on a 0.15 um CMOS process, housed in a 624-pin ceramic column grid array (CCGA) package. The -1 speed grade is approximately 15% faster than the standard speed grade, and the device operates across a military/space temperature range of -55C to +125C. A radiation-tolerant FPGA is a field-programmable gate array designed to survive the harsh radiation environment of space flight, where single-event upsets (SEUs) caused by cosmic rays and trapped protons can flip configuration or user registers in commercial silicon. Within the power-management hierarchy of spacecraft avionics, these FPGAs sit alongside rad-hard microcontrollers and ASICs as the primary onboard data-processing and interface-logic platform, and the RTAX-S family is Microchip's (formerly Actel/Microsemi) antifuse-based, single-chip rad-tolerant offering. Key features of the RTAX250S-1CG624E include SEU-hardened registers that largely eliminate the need for triple-module redundancy (TMR), live-at-power-up operation enabled by the non-volatile antifuse fabric, and embedded SRAM blocks with built-in FIFO control logic. The antifuse architecture also provides low power consumption and a true single-chip form factor with no external configuration device, which simplifies board design and reduces board-level parts count for satellites and space probes. Technically, the device is based on Microchip's commercial Axcelerator architecture with a segmentable clock structure and chip-wide routing resources. The maximum combinatorial delay of a CLB is 0.930 ns, and the 0.15 um metal-to-metal antifuse process yields both high speed and inherent configuration immutability - a significant security and reliability benefit in launch environments where configuration corruption is unacceptable. Typical applications include satellite on-board data handling, payload processing, spacecraft bus telemetry and telecommand interfaces, and radiation environment instrumentation. The CG624 ceramic column grid array package provides the hermetic, high-reliability enclosure and terminal count demanded by space-qualified hardware. A key design consideration is that RTAX-S devices are one-time programmable: the design must be fully validated (typically using an Aldec ProASIC3E-based prototyping adaptor such as the ACT-H3Ki-CG624) before committing to antifuse programming. This page synthesizes distributor specifications, same-package drop-in alternatives, prototyping-tool references, and practical design notes not found in the manufacturer datasheet.
RTAX250S-1CQ208V - 250k-Gate Rad-Tolerant FPGA CQ208 | Microchip
The Microchip Technology (Actel/Microsemi) RTAX250S-1CQ208V is a radiation-tolerant CMOS FPGA offering 250,000 equivalent gates, organized as 2816 Configurable Logic Blocks (CLBs) with 4224 logic cells, a 0.93 ns per-CLB combinatorial delay (speed grade -1), packaged in a 208-pin ceramic column grid array/carrier (CQ208) with a space-grade V suffix designation. A radiation-tolerant FPGA is a programmable logic device qualified and hardened for space-flight environments, where high-energy particles cause single-event effects (SEE) and total ionizing dose (TID) degradation. Within the power/processing hierarchy of a spacecraft avionics stack, the RTAX-S family sits alongside rad-hard ASICs and rad-hard microcontrollers as a single-chip programmable fabric for mission-critical digital logic, bridging the gap between fully custom silicon and commercial FPGAs. Key features of the RTAX250S include true single-chip operation, live-at-power-up functionality, and low static power consumption - attributes Microchip identifies as the reasons RTAX-S is widely selected by space system designers. The CMOS process enables fast, reliable operation, while the ceramic CQ208 hermetic package supports the thermal and reliability demands of launch and on-orbit operation. Architecturally, the RTAX250S belongs to the RTAX-S/SL family (per datasheet ds2169), which is prototyped in commercial Axcelerator devices through Microchip application note AC170 before flight-unit programming. The 0.93 ns combinatorial delay supports moderate-speed datapath, telemetry, and control functions. Designs may also target the alternate 30,000 ASIC-gate organization documented for the RTAX250S-CQ208V variant. Typical applications include satellite on-board data handling, payload telemetry formatting, attitude control interface logic, spacecraft bus communications bridges, and launch-vehicle avionics - anywhere live-at-power-up logic and radiation tolerance at 250k-gate scale are required. Design consideration: RTAX-S devices require programming via Microchip FlashPro tooling and are typically prototyped on equivalent commercial Axcelerator parts, so plan the prototype-to-flight flow early in the program. Carefully derate SEU margins per the RTAX-S datasheet reliability sections. This page synthesizes distributor cross-reference data, DLA standard-microcircuit drawing equivalents, drop-in family variants, and practical design guidance not consolidated in the manufacturer datasheet.
RTAX250S-1LG624V - 250K-Gate Rad-Tolerant FPGA 1.5V | Microchip
The Microchip Technology RTAX250S-1LG624V is a radiation-tolerant, 250,000-equivalent-gate Field Programmable Gate Array (FPGA) with 2816 Configurable Logic Blocks (CLBs) and 4224 logic cells, operating from a 1.5V nominal core supply over a -55C to +125C military/space temperature range, housed in a 624-column ceramic column grid array (CGA624/LG624) package with leaded (V) column finish. A radiation-tolerant FPGA is a programmable logic device qualified for space-flight environments, where exposure to heavy ions and protons causes single-event upsets (SEUs) in commercial silicon. The RTAX-S family sits at the top of the programmable logic hierarchy for spacecraft: FPGA -> radiation-tolerant FPGA -> space electronics. Unlike SRAM-based FPGAs, the RTAX-S family uses antifuse programmability, giving a true single-chip form factor, live-at-power-up operation, and inherent resistance to configuration upset. Key features include 250K equivalent gates, 4224 logic cells, low static power consumption, and single-chip operation without external boot PROM. The -1 speed grade covers standard space-flight performance, and the V-suffix leaded ceramic column package supports reliable solder attachment on aerospace PCBs. Architecturally, the RTAX250S builds on Actel's Axcelerator fabric with Sea-of-Modules logic, embedded SRAM blocks, and clock-management resources, providing deterministic timing for flight software-defined logic. Designs are developed with Microchip (Microsemi/Lattice-style) Libero design software and can be prototyped on commercial Axcelerator devices per application note AC170. Typical applications include satellite payload processing, spacecraft bus control, launch-vehicle avionics, and instrumentation for deep-space missions, where SEU tolerance and live-at-power-up behavior are mandatory. Design consideration: because the LG624 ceramic package uses columns rather than balls, follow the manufacturer's reflow profile for column grid arrays and verify board-level outgassing requirements. This page synthesizes distributor availability, drop-in alternatives, and engineering design notes not consolidated in the manufacturer datasheet.
RTAX250S-CG624B - 250K Gate Rad-Tolerant FPGA CCGA-624 | Microchip
The Microchip Technology RTAX250S-CG624B is a radiation-tolerant FPGA from the RTAX-S family offering 250,000 equivalent system gates, 2,816 logic cells (CLBs), and up to 649 MHz system performance in a 624-pin ceramic column grid array (CCGA) package, fabricated on a 0.15 um process with a 1.5 V core supply. A radiation-tolerant FPGA is a field-programmable gate array engineered to survive the heavy-ion and proton environments encountered in Earth-orbiting and deep-space missions. Within the space-grade programmable logic hierarchy, the RTAX-S family sits alongside one-time-programmable antifuse architectures, providing a true single-chip, live-at-power-up solution that does not require external configuration devices such as flash or PROM memories. Key features include SEU-hardened flip-flops that eliminate the need for triple-module redundancy (TMR) in many designs, immunity to single-event upsets to a specified LET threshold with SEU rates below 10^-10 errors per bit-day, embedded SRAM blocks with built-in FIFO control logic, segmentable clock structures, and chip-wide routing highways. The CCGA-624 ceramic package provides the mechanical robustness and thermal performance required for launch vibration and vacuum operation. The architecture is derived from the commercial Axcelerator family, giving designers proven logic fabric with a speed grade option (the -1 grade is approximately 15% faster than standard) and operating temperature of -55C to +125C. CMOS 0.15 um technology delivers low static power, an important consideration for power-budget-limited spacecraft buses. Typical applications include payload data processing, spacecraft bus controllers, telemetry and telecommand interfaces, and sensor front-end glue logic on LEO, GEO, and interplanetary missions where radiation tolerance and live-at-power-up behavior are mission-critical. A key design consideration is that RTAX-S antifuse devices are one-time programmable: programming is final, so designers prototype on commercial Axcelerator parts or Microchip extender boards (per application note AC170) before committing flight hardware. This page adds value beyond the manufacturer datasheet by consolidating drop-in package-compatible alternatives, cross-reference options, and pricing tiers for supply-chain planning.
RTAX250S-CG624E - 250K-Gate Rad-Tolerant FPGA | Microchip
The Microchip Technology RTAX250S-CG624E is a 250,000-system-gate radiation-tolerant antifuse FPGA from the RTAX-S family, providing 2816 logic cells, a maximum toggle rate of 649 MHz, and single-event-upset (SEU)-hardened registers in a 624-ball ceramic column grid array (CCGA-624) package operating from -55C to +125C. A radiation-tolerant FPGA is a field-programmable gate array engineered to survive the ionizing radiation environment of space, where conventional commercial silicon suffers single-event upsets (SEUs), latch-up, and total ionizing dose (TID) degradation. Within the power and processing hierarchy of a spacecraft avionics system, the RTAX-S family sits at the payload and platform logic layer, replacing multiple rad-hard ASICs and discrete glue logic with a single-chip, live-at-power-up programmable device. Key differentiating features include SEU-hardened flip-flops that eliminate the need for triple modular redundancy (TMR) in many designs, immunity to single-event upsets up to a specified linear energy transfer threshold, and SEU rates below 10-10 errors per bit-day. The one-time-programmable antifuse fabric gives the device true single-chip form factor, live-at-power-up operation, and low static power consumption - critical for orbit-limited spacecraft power budgets. Core operation is at 1.5V on 0.15 um CMOS technology. The RTAX250S architecture provides CLB combinatorial delays as low as 0.930 ns at the -1 speed grade, supporting system clocks in the hundreds of megahertz. Design flow prototyping is enabled by Microchip application note AC170, which maps RTAX-S designs onto commercial Axcelerator devices using extender circuit boards; Aldec ACT-H3K-CG624 adaptor boards also emulate the CG624 footprint using ProASIC3E flash technology for reprogrammable validation before committing antifuse programming. Typical applications include satellite payload data processing, spacecraft command and data handling (C&DH) units, telemetry and telecommand interfaces, bus avionics, and instrument control for low-Earth-orbit and deep-space missions. The 624-ball CCGA package supplies the high I/O count required for wide parallel data buses and memory interfaces. Designers should note that antifuse FPGAs are one-time programmable: the design must be fully verified via prototyping hardware or simulation before the flight device is programmed. Also confirm that the CG624 column-grid-array board stack-up and reflow profile follow Microchip ceramic-package assembly guidance. This page synthesizes verified distributor data, same-family drop-in alternatives, datasheet access links, and practical design notes not found together on the manufacturer product page, giving space-systems engineers and procurement teams a single citable reference for the RTAX250S-CG624E.
RTAX250S-CG624V - 250K-Gate Rad-Tolerant FPGA | Microchip
The Microchip Technology (Actel/Microsemi) RTAX250S-CG624V is a radiation-tolerant FPGA from the RTAX-S family with 250,000 equivalent system gates, 2816 configurable logic blocks (4224 logic cells), and up to 649 MHz system performance, housed in a 624-terminal ceramic column grid array (CCGA) package. A radiation-tolerant FPGA is a field-programmable gate array engineered to survive the single-event upsets (SEU) and total ionizing dose (TID) effects of space radiation environments. Within the power-management hierarchy of spaceflight electronics, it sits above commercial FPGAs and below fully radiation-hardened ASICs, offering a single-chip, live-at-power-up fabric based on antifuse technology that does not require configuration devices. Key features of the RTAX250S include SEU-hardened registers that eliminate the need for triple module redundancy (TMR) in many designs, embedded SRAM blocks with built-in FIFO control logic, segmentable clock resources, chip-wide highway routing, and dedicated carry logic for arithmetic. The 0.15 um CMOS process with a nominal 1.5 V core supply keeps static and dynamic power consumption low, an important consideration for solar- and battery-powered spacecraft. Architecturally, the RTAX-S family is derived from the commercial Axcelerator architecture, combining prototyping on footprint-compatible ProASIC/AX adaptors with flight-grade antifuse fabric. The CG624 ceramic column grid array provides mechanical reliability through column rather than ball interconnect, reducing solder-joint fatigue under thermal cycling and launch vibration. Typical applications include satellite command and data handling, telemetry encoders, payload data processing, bus controllers, and radiation-tolerant glue logic replacing multiple ASICs in low- and mid-Earth-orbit spacecraft. Design consideration: verify the flight vs. prototype flow early - the manufacturer recommends prototyping on footprint-compatible adaptor boards and migrating the EDIF netlist with a pinout converter to the RTAX-S device. This page synthesizes verified distributor data, drop-in package-compatible alternatives, and practical design guidance not consolidated in the manufacturer datasheet.
RTAX250S-CQ208PROTO - Rad-Tolerant FPGA 250kG CQ208 | Microchip
The Microchip Technology RTAX250S-CQ208PROTO is a radiation-tolerant antifuse FPGA prototype device from the RTAX-S/SL family, offering 250,000 equivalent system gates, 2,816 CLBs, and 4,224 logic cells in a 208-pin ceramic CQ208 package with a core supply of 1.5V nominal (1.425V to 1.575V). A radiation-tolerant FPGA is a field-programmable gate array engineered to survive the total ionizing dose (TID) and single-event effects found in spaceflight radiation environments. Within the semiconductor hierarchy, the RTAX250S-CQ208PROTO sits in the radiation-tolerant FPGA category, descended from the commercial Axcelerator family and positioned above standard commercial FPGAs in reliability for orbital missions. Key features include the PROTO designation, which means this unit is intended for prototyping hardware flights before committing to flight-grade silicon. The CQ208 ceramic package enables footprint-compatible migration using the Aldec ACT-H600-CQ208 adaptor, which supports RTAX250S-CQ208, RTAX250SL-CQ208, AX250S-CQ208, and AX250SL-CQ208 devices. Built-in FIFO control logic on embedded SRAM, segmentable clocks, and chip-wide highway routing add system-level flexibility. The RTAX-S/SL architecture is based on the proven Axcelerator CMOS fabric, with embedded SRAM blocks, high-performance routing, and antifuse one-time-programmable configuration delivering true single-chip form factor and live-at-power-up operation without external configuration devices. Per Microchip application note AC170, prototyping is performed using Microsemi Libero SoC software, which converts the RTAX-S/SL design to a compatible Axcelerator device and package; the reverse flow is not permitted, so pin assignment, place-and-route, timing verification, and simulation must be done on the RTAX-S/SL device itself. Typical applications include satellite payload logic, spacecraft bus control, orbital instrument interfaces, and launch vehicle avionics, where radiation tolerance, low power, and single-chip reliability are decisive. Designers typically prototype with this PROTO unit and the Axcelerator companion before ordering flight RTAX250S silicon. A key design consideration: verify timing and pinout in Libero SoC against the RTAX250S-CQ208 target, because the Axcelerator prototype conversion is one-directional. This page synthesizes verified distributor listings, the official Microchip RTAX-S/SL datasheet (ds2169), and the Aldec adaptor compatibility matrix, providing drop-in alternative guidance and prototyping-flow design notes not consolidated on the manufacturer product page.
RTAX250S-LG624EV - 250K Gate Rad-Tolerant FPGA | Microchip
The Microchip Technology RTAX250S-LG624EV is a radiation-tolerant FPGA from the RTAX-S family offering 250,000 equivalent gates, 4224 logic cells, and 2816 configurable logic blocks (CLBs) in a 624-pin LGA surface-mount package. It operates from a nominal 1.5V core supply, supports system performance up to 649 MHz, and is fabricated on a 0.15 um CMOS anti-fuse process qualified for space-flight environments. A radiation-tolerant FPGA is a field-programmable gate array engineered to survive the total ionizing dose (TID) and single-event effects (SEE) found in orbital and deep-space radiation environments. Within the power-management and processing hierarchy of a spacecraft avionics system, the FPGA sits between a radiation-hardened microcontroller and application-specific ASICs, providing flexible glue logic, bus interfacing, and payload processing. The RTAX-S family is the successor to the Actel Axcelerator-based architecture, now manufactured and supported by Microchip (formerly Microsemi). Key features include true single-chip operation with live-at-power-up functionality enabled by the anti-fuse interconnect, which requires no configuration PROM and eliminates configuration-time vulnerability to radiation-induced SEUs in configuration memory. The device integrates embedded SRAM blocks, clock management circuitry, and up to 248 user I/Os in the 624-pin package, with industrial temperature capability spanning -55C to +125C in the EV-grade flow. Architecturally, the RTAX250S combines Sea-of-Modules logic tiles with VersaTiles and dedicated embedded memory blocks, delivering high routing efficiency and deterministic timing. The 0.15 um anti-fuse process provides low static power and inherent immunity to configuration upsets, a decisive advantage over SRAM-based FPGAs in space applications. Typical applications include satellite attitude-control and payload data processing, spaceflight bus interfaces such as Mil-Std-1553 and SpaceWire bridges, and telemetry/command (TM/TC) systems where single-chip, live-at-power-up logic is mandatory. Design consideration: because RTAX-S devices are one-time programmable, complete design verification using the Microchip Libero design flow and, where possible, Aldec flash-based prototyping adaptor boards is strongly recommended before committing hardware. This page synthesizes verified distributor data, drop-in packaging variants, and design guidance not consolidated in the manufacturer datasheet. Pricing is quote-based as of 2026-09-02.
RTAX250S-LG624V - 250K-Gate Rad-Tolerant FPGA | Microchip
The Microchip Technology RTAX250S-LG624V (originally Actel/Microsemi) is a radiation-tolerant FPGA from the RTAX-S family with 250,000 equivalent gates, 4,224 logic cells, and 2,816 Configurable Logic Blocks (CLBs), housed in a 624-pin LGA package (LG624) with a 1.5V nominal core supply and performance up to 649 MHz on a 0.15 um CMOS process. A radiation-tolerant FPGA is a field-programmable gate array engineered to survive and operate in the space-flight radiation environment, where high-energy particles cause single-event effects (SEE) and total ionizing dose (TID) degradation. Within the power-management hierarchy of spacecraft electronics, the RTAX-S family sits alongside radiation-hardened ASICs as the FPGA of choice for space designers, offering true single-chip operation and live-at-power-up functionality without the configuration-pumping of SRAM FPGAs. Key features include 250K gate density with 4,224 logic cells and 248 user inputs/outputs, single-chip flip-chip packaging, and a -55C to +125C military-grade operating temperature range. The 'V' grade suffix denotes the qualified space-flow variant. The 649 MHz toggle capability and 0.15 um antifuse-based CMOS technology combine low static power with high logic throughput, making the device suitable for mission-critical signal processing and control paths. Architecturally, the RTAX250S uses a Sea-of-Modules structure with combinable logic modules, embedded SRAM blocks, and clock-management resources, retaining its configuration in non-volatile antifuse interconnect so the device is functional immediately at power-up - a significant advantage for spacecraft that cannot afford a separate configuration device or boot sequence. Typical applications include satellite telemetry/command subsystems, payload data processing, spacecraft bus control, and radiation-environment instrumentation where SEU resilience and single-chip integration are mandatory. Designers should budget I/O standards and supply decoupling for the 1.5V core rail, and use the Microchip Libero SoC flow with the RTAX-S design libraries; prototyping can be done on commercial Axcelerator devices using Microchip extender boards per application note AC170. This page synthesizes distributor data, same-family drop-in package-compatible variants, and design guidance not consolidated in the manufacturer datasheet.
RTAX250SL-1CQ208PROTO - 250k-Gate Rad-Tolerant FPGA | Microchip
The Microchip Technology (Actel/Microsemi) RTAX250SL-1CQ208PROTO is a radiation-tolerant, antifuse-based field-programmable gate array (FPGA) delivering 250,000 equivalent system gates, 4,224 logic cells, and 2,816 configurable logic blocks (CLBs) in a 208-pin ceramic quad flat pack (CQFP, CQ208). The -1 speed grade offers a minimum combinatorial CLB delay of 0.93 ns maximum, and the PROTO suffix denotes the prototyping-grade screening flow used for early space-flight design validation. A radiation-tolerant FPGA is a programmable logic device qualified to survive the ionizing radiation environment of space, where conventional commercial FPGAs would suffer configuration upsets, latch-up, or total dose degradation. The RTAX-S/SL family sits within Microchip's broader spaceflight portfolio, above commercial FPGAs and below fully radiation-hardened devices, and is derived from the commercial Axcelerator family architecture. Key features include live-at-power-up operation thanks to the antifuse programming technology (no external boot configuration device is needed, a true single-chip solution), embedded SRAM blocks with built-in FIFO control logic, segmentable chip-wide clocks, and the SL variant's enhanced total-ionizing-dose (TID) tolerance versus the standard RTAX-S parts. Low static power consumption is a hallmark of the antifuse fabric, which matters for power-limited satellite buses. Technically, the device uses a 0.15 um CMOS antifuse process. The VersaTile-based CLB fabric supports both combinatorial and sequential logic with predictable interconnect delays, simplifying timing closure for mission-critical designs. Embedded SRAM modules can be configured as FIFOs, dual-port memories, or single-port memories with hard FIFO control logic, offloading soft-logic resource consumption. Typical applications include satellite payload processing, spacecraft telemetry and command interfaces, radiation-environment sensor interfaces, and launch-vehicle avionics, where one-time-programmable (OTP) antifuse immunity to configuration upsets is a decisive advantage over SRAM-based FPGAs. A key design consideration: the PROTO-grade device is intended for functional prototyping only; production flight hardware should move to the corresponding flight-screened orderable, since PROTO units do not carry the full space qualification flow. This page synthesizes distributor availability data, drop-in alternatives, and practical design guidance not found in the manufacturer datasheet, making it a one-stop reference for RTAX250SL-1CQ208PROTO selection and procurement decisions.
RTAX250SL-1CQ352V - 250K-Gate Rad-Tolerant FPGA | Microchip
The Microchip Technology RTAX250SL-1CQ352V is a 250,000-equivalent-gate radiation-tolerant FPGA from the RTAX-S/SL family, offering 2816 configurable logic blocks (CLBs) organized into 4224 logic cells, 198 user inputs and 198 user outputs, housed in a 352-terminal ceramic CQFP (CQ352) package. Built on 0.15 um CMOS technology at a 1.5V core supply, it is intended for space-flight systems. A radiation-tolerant FPGA is a field-programmable gate array engineered to survive the heavy-ion and proton environments encountered in Earth-orbiting and deep-space missions. Within the power-management hierarchy of avionics, FPGAs such as the RTAX-S/SL sit at the top of the programmable-logic taxonomy (FPGA > radiation-tolerant FPGA > space-grade programmable logic IC), providing single-chip glueless integration where standard commercial FPGAs would suffer single-event upsets. Key features include the anti-fuse, live-at-power-up architecture that eliminates the need for external boot configuration devices, embedded SRAM blocks with built-in FIFO control logic, segmentable clock resources, and chip-wide highway routing. The SL variant adds enhanced total-ionizing-dose (TID) performance relative to the base RTAX-S devices, supporting long-duration missions. The 649 MHz system performance figure cited for the family reflects the speed of the underlying Axcelerator-derived fabric. Technically, the device is based on the commercial Axcelerator fabric from Microsemi (now Microchip), using a sea-of-modules architecture with clock-conditioning circuitry and I/O banks supporting multiple single-ended and differential standards. Configuration data is loaded once; the anti-fuse interconnect is inherently single-event-upset immune, a decisive advantage over SRAM-based FPGAs in orbit. Typical applications include satellite payload data processing, spacecraft command and telemetry interfaces, launch-vehicle avionics, and radiation-hardened image processing pipelines where deterministic, single-chip logic is required from the instant power is applied. A key design consideration is screening level: the -V suffix designates a specific qualification/screening flow for the ceramic CQFP package, so PCB footprints and procurement flows must match the exact suffix. This page synthesizes distributor listings, drop-in family alternatives, and design guidance not found in the manufacturer datasheet, with pricing and stock refreshed as of 2026-09-02.