EPM9560SRC240-15 - MAX 9000 CPLD, 560 Gates, 240-Pin | Intel / Altera
MPN: EPM9560SRC240-15 ✗ End of Life| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $45 | $45.00 |
| 10 | $38.5 | $385.00 |
| 100 | $31.2 | $3,120.00 |
| 500 | $26.8 | $13,400.00 |
| 1,000 | $22.5 | $22,500.00 |
Drop-in alternatives for EPM9560SRC240-15 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
EPM9560RI240-15
✅ Drop-In✓ In Stock
$23.1 / Unit
View Datasheet →EPM9560RI240-15N
✅ Drop-In✓ In Stock
Contact for price
View Datasheet →EPM9560SRC240-20
✅ Drop-In📋 Reference alternative (not in catalog)
EPM9560SRC240-12
✅ Drop-In📋 Reference alternative (not in catalog)
EPM9560SRC240-15 Maximum Ratings & Electrical Characteristics
| Family | MAX 9000 |
| Device Type | EPLD / CPLD (Complex Programmable Logic Device) |
| Usable Gates | 560 |
| Logic Array Blocks (LABs) | 16 |
| Macrocells | 212 |
| Speed Grade | -15 (15 ns tPD) |
| Pin-to-Pin Logic Delay (tPD) | 15 ns (max) |
| Supply Voltage (VCC) | 5 V (nominal) |
| Programmability | In-system programmable via IEEE 1149.1 JTAG |
| Non-volatile | Yes (EPROM/EEPROM cells) |
| Package | RQFP-240 (Surface Mount) |
| Mounting Type | Surface Mount |
| Process Technology | CMOS EPROM |
EPM9560SRC240-15 rqfp-240 (surface mount) Pin Configuration Guide
Complete pinout information for EPM9560SRC240-15 (rqfp-240 (surface mount) package) with [DATA_NEEDED: exact I/O count for SRC240 package] pins. This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for EPM9560SRC240-15.
Refer to the datasheet for full pin configuration.
Estimated pin count: [DATA_NEEDED: exact I/O count for SRC240 package] pins (digital package)
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
EPM9560SRC240-15 is suitable for 6 applications: 5V Glue Logic Consolidation, Address Decoding and Bus Interface Bridging, Industrial Control State Machines, Telecom Backplane Glue Logic, Legacy Peripheral Controller Replacement, Military and Aerospace Deterministic-Start Logic.
5V Glue Logic Consolidation
The EPM9560SRC240-15 consolidates dozens of 74LS/74F/74HC discrete logic ICs into a single 5V CPLD, reducing PCB area and BOM cost in legacy industrial systems. With 560 usable gates, 16 LABs, and 212 macrocells, it has the logic density to absorb wide address decoders, chip-select generators, and bus-interface bridges that previously required multiple TTL packages. The 5V-tolerant I/O and instant-on EPROM cells make it suitable for power-sequenced industrial control boards where 3.3V CPLDs are incompatible. Designers typically target 50-60% macrocell utilization to leave room for ECO changes; the -15 ns speed grade supports up to 66 MHz system bus logic without violating setup/hold margins.
Recommended
Address Decoding and Bus Interface Bridging
The EPM9560SRC240-15 is well-suited for ISA, VME, and PCI bus address-decoding and protocol-bridging applications thanks to its 16 LABs of combinational logic and 212 macrocells with predictable 15 ns pin-to-pin timing. Each macrocell can implement a wide decode with multiple product terms, replacing dozens of discrete AND/OR gates. The device's deterministic timing allows precise bus-arbiter design without the timing-closure issues common to FPGAs. The 240-pin RQFP package provides 200+ user I/O for wide bus interfaces such as 32-bit address plus 32-bit data plus control signals, all decoded in a single chip.
Recommended
Industrial Control State Machines
The EPM9560SRC240-15 hosts large Moore/Mealy state machines for industrial machine controllers, replacing microcontroller firmware with deterministic hardware sequencing. With 212 macrocells and 15 ns tPD, complex multi-state sequencers for PLCs, motor controllers, and process-control valves run at full hardware speed without CPU intervention. The non-volatile EPROM cells provide instant-on at power-up, critical for safety interlocks where SRAM-based FPGAs must wait for configuration. Industrial-temp variants like EPM9560RI240-15 are specified for -40C to +85C operation in factory-floor environments.
Recommended
Telecom Backplane Glue Logic
Telecom backplanes in legacy TDM, ATM, and SONET systems use the EPM9560SRC240-15 for backplane glue logic including clock distribution, bus arbitration, and line-card interface adaptation. The device's 560-gate capacity is ideal for bridging H.110 CT-bus, CompactPCI, and proprietary backplane buses while supporting 5V signaling levels common to telecom equipment. The -15 ns speed grade handles 8 kHz to 8 MHz telephony control signals with margin, and the 240-pin RQFP package enables high-density routing on backplane mezzanine cards. The non-volatile cells eliminate configuration-processor risk during power-cycle events.
Recommended
Legacy Peripheral Controller Replacement
The EPM9560SRC240-15 is a popular replacement for aging SCSI, GPIB, VMEbus, and proprietary peripheral controllers in test-and-measurement equipment. By implementing the controller as a CPLD rather than discrete logic, designers reduce a $200 worth of 74F/74AS chips to a single $30-$45 part while gaining design flexibility. The 5V tolerance matches legacy peripheral interfaces that have no 3.3V equivalents, and the 15 ns tPD easily meets the 5-10 MHz peripheral bus rates. Designers also use the EPM9560SRC240-15 as a firmware-replacement for obsolete microcontrollers in fielded instruments, with the JTAG ISP interface enabling in-field reprogramming via boundary-scan.
Recommended
Military and Aerospace Deterministic-Start Logic
The EPM9560SRC240-15 is used in military and aerospace systems where deterministic power-on behavior is required, as its non-volatile EPROM cells start in known state within nanoseconds rather than the milliseconds required by SRAM-based FPGAs. The 240-pin RQFP package is hermetically-sealable and meets the operating-temperature and reliability requirements of DO-254 and MIL-STD-454 designs. With 15 ns tPD, the device handles flight-control bus arbitration and sensor-signal routing without timing ambiguity. For new military programs, however, note that the EPM9560SRC240-15 is NRND and designers should consult Altera/Intel for current MIL-spec-equivalent recommendations.
Recommended
Recommended Products Summary
Engineering reference data for EPM9560SRC240-15 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | EPM9560RC240-15 | EPM9560RI240-15 | EPM9560SRC240-12 | EPM9560SRC240-20 |
|---|---|---|---|---|---|
| Package | RQFP-240 (Surface Mount) | PGA-240 (ceramic quad) - NOT drop-in footprint | RQFP-240 (Surface Mount) - same | RQFP-240 (Surface Mount) - same | RQFP-240 (Surface Mount) - same |
| Brand | Altera (Intel) | Altera (Intel) - same | Altera (Intel) - same | Altera (Intel) - same | Altera (Intel) - same |
| Family | MAX 9000 | MAX 9000 - same | MAX 9000 - same | MAX 9000 - same | MAX 9000 - same |
| Speed Grade (tPD max) | 15 ns | 15 ns - identical | 15 ns - identical | 12 ns - faster | 20 ns - slower |
| Usable Gates | 560 | 560 - same | 560 - same | 560 - same | 560 - same |
| Macrocells | 212 | 212 - same | 212 - same | 212 - same | 212 - same |
| Logic Array Blocks | 16 | 16 - same | 16 - same | 16 - same | 16 - same |
| Temperature Grade | [DATA_NEEDED] | Commercial (C suffix) | Industrial -40 to +85C (I suffix) | [DATA_NEEDED] | [DATA_NEEDED] |
| Approx. Unit Price (qty 100) | $31.20 | [DATA_NEEDED] - ceramic variant typically higher | $35-40 (industrial temp premium) | $40-50 (faster speed grade premium) | $25-30 (slower speed grade discount) |
Key Differentiators
- Surface-mount RQFP-240 package suitable for modern SMT assembly (vs EPM9560RC240-15)
- Balanced -15 ns speed grade (66 MHz class) (vs EPM9560SRC240-12 and EPM9560SRC240-20)
- Instant-on non-volatile EPROM configuration (vs FPGA alternatives (e.g., Cyclone, Spartan))
Design Notes
The EPM9560SRC240-15 in RQFP-240 package typically dissipates 0.5-1.5 W depending on switching activity. The RQFP package has a relatively high theta-JA (around 30-40 C/W) without forced airflow, so for industrial-temperature applications ensure the PCB thermal design keeps junction temperature below 125C. Estimated: at 1.0 W dissipation and theta-JA = 35 C/W, junction rise above ambient is 35C, so derate for ambient >90C. Add thermal vias under the die-attach pad and provide a minimum 2 oz copper pour for heat spreading.
For the EPM9560SRC240-15 RQFP-240 layout, place 0.1 uF decoupling capacitors as close as possible to every VCC pin, with one bulk 10-47 uF tantalum or ceramic capacitor near the device. The RQFP-240 has fine-pitch (typically 0.5 mm) leads on all four sides; use a 4-layer PCB with dedicated ground and power planes for signal-integrity and to minimize EMI. Provide a clock-distribution trace routed on the inner layer and kept away from I/O edges. JTAG TMS/TCK/TDO/TDI lines should be routed as a group with a 47 ohm series terminator on TCK.
Common design pitfalls for the EPM9560SRC240-15: (1) Mixing up RQFP-240 (SRC prefix, surface-mount) with PGA-240 (RC prefix, ceramic through-hole) - these are NOT footprint-compatible despite the same 240-pin count; (2) Assuming Quartus Prime supports MAX 9000 - it does NOT; you must use legacy MAX+PLUS II software or Quartus version 9.1 or earlier for design entry; (3) Forgetting that the EPM9560 is 5V-only - no 3.3V I/O tolerance; (4) Using the device in new designs without checking NRND/EOL status - it is NRND as of 2026-09-13, so production volumes are limited. Always verify pin-compatibility and timing margins against the latest datasheet revision before committing to a redesign.
Compliance Information
RoHS and lead-free compliance for EPM9560SRC240-15 is [DATA_NEEDED] and not stated in the Verified Web Data. Most legacy 5V CPLDs in RQFP packages predate RoHS mandates. The N-suffix variants (e.g., EPM9560RI240-15N) are typically lead-free; verify with the distributor's Certificate of Compliance before RoHS-critical applications.
