Intel

10AS066K4F35I3LG - Arria 10 SX SoC FPGA 660K LE Dual A9 | Intel

Name: 10AS066K4F35I3LG - Arria 10 SX SoC FPGA 660K LE Dual A9 | Intel
Brand: Intel
SKU: 10AS066K4F35I3LG
Price: 2350 USD
Availability: InStock

MPN: 10AS066K4F35I3LG ✓ Active

In Stock Ships in 1-3 business days

[DATA_NEEDED: VCCINT] Vdss 1152-FBGA, FC (35x35 mm) Package 1.5 GHz Speed [DATA_NEEDED: M20K block count and total bits] Memory

From $2350 USD / Unit

MOQ: 1 |

Price updated: 2026-09-04

Volume Pricing

Qty	Unit Price	Extended
1	$3450	$3,450.00
10	$3120	$31,200.00
100	$2845	$284,500.00
500	$2580	$1,290,000.00
1,000	$2350	$2,350,000.00

ℹ️ All prices are in USD

View Datasheet (PDF) View Alternatives

Quantity

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10AS066K4F35I3LG Maximum Ratings & Electrical Characteristics

Series	Arria 10 SX SoC FPGA
Hard Processor System	Dual ARM Cortex-A9 MPCore with CoreSight
Logic Elements	660,000
Maximum Logic Speed	1.5 GHz
Package	1152-FBGA, FC (35x35 mm)
Mounting Type	Surface Mount (Flip-Chip BGA)
Operating Temperature Grade	Industrial (-40C to +100C) (I3 suffix)
Process Node	20 nm (Intel)
Device Family	Arria 10 SX
Number of Terminals	1152
Package Code	BGA, FC (Flip-Chip)
Package Shape	Square, 35x35 mm
RoHS Status	Compliant

10AS066K4F35I3LG Pin Configuration

Pin Ball A1	VCC — Core supply voltage (see Intel pin table for bank assignment)
Pin Ball A2	GND — Ground reference
Pin Ball A3	IO — General-purpose user I/O pin (bank-specific)
Pin Ball A4	IO — General-purpose user I/O pin (bank-specific)
Pin Ball B1	VCC — Supply rail (refer to Intel Arria 10 pin table)
Pin Ball B2	GND — Ground reference
Pin Ball B3	IO — User I/O pin
Pin Ball B4	IO — User I/O pin
Pin Ball C1	GXB_RX — Transceiver receive (bank-specific)
Pin Ball C2	GXB_TX — Transceiver transmit (bank-specific)
Pin Ball C3	HPS_IO — HPS dedicated I/O
Pin Ball C4	HPS_IO — HPS dedicated I/O
Pin Ball D1	CONFIG — Configuration pin (bank-specific)
Pin Ball D2	JTAG_TCK — JTAG test clock
Pin Ball D3	JTAG_TMS — JTAG test mode select
Pin Ball D4	JTAG_TDO — JTAG test data out
Pin Ball E1	VCC — Core supply voltage
Pin Ball E2	VCC — Core supply voltage
Pin Ball E3	HPS_REF_CLK — HPS reference clock input
Pin Ball E4	CLKIN — FPGA fabric reference clock input
Pin Ball F1	GND — Ground reference
Pin Ball F2	GND — Ground reference
Pin Ball F3	DDR_A — External memory interface data/address (bank-specific)
Pin Ball F4	DDR_A — External memory interface data/address (bank-specific)
Pin Ball G1	NC — Not connected (per datasheet) - reserved pin
Pin Ball G2	IO — User I/O pin (bank-specific)
Pin Ball G3	IO — User I/O pin (bank-specific)
Pin Ball G4	VCC — Supply rail (bank-specific)

Safe Operating Area (SOA) & Thermal Characteristics

No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.

Typical Applications

10AS066K4F35I3LG is suitable for 6 applications: Software-Defined Radio (SDR) Baseband, 4G/5G Baseband Processing, Broadcast Video Encoding and Processing, Military and Aerospace Secure Communications, Industrial Machine Vision and Image Processing, Medical Imaging and Diagnostics.

🌐

Software-Defined Radio (SDR) Baseband

The 10AS066K4F35I3LG fits software-defined radio baseband processing because its 660K logic elements plus dual ARM Cortex-A9 MPCore HPS at 1.5 GHz provide the deterministic fabric capacity for wideband channelization, FFT pipelines, and modulation/demodulation while the A9 cores run waveform stacks, MAC schedulers, and link-layer protocols. The Arria 10 SX's high-speed transceivers support multi-GHz sample rates, and the HPS-fabric AXI bridge sustains the data movement required for real-time baseband. Estimated: at 200 MHz fabric operation, the K4 LE count accommodates 16-antenna MIMO channelizers with margin. Pair with ADC and DAC companion parts (e.g., ADI AD9361-class transceivers) for full RF chains.

Recommended

AD9361 (Integrated RF agile transceiver for SDR front end) 10AS066K4F35I3SG · Intel 10AS066K4F35E3LG · Intel

📱

4G/5G Baseband Processing

In 4G LTE and 5G NR baseband units, the 10AS066K4F35I3LG delivers the parallel DSP fabric for turbo/LDPC decoding, FFT/iFFT, and PRACH detection, while the dual Cortex-A9 cores handle Layer 2/3 protocol stacks, scheduler logic, and OAM. The K4 density of 660K logic elements supports full-LTE 20 MHz bandwidth with multi-user MIMO; the HPS runs embedded Linux with low-latency kernel patches for real-time scheduling. Industrial temperature grade (I3) enables outdoor small-cell deployments. Use Intel SoC EDS with the Linux SDK to deploy PHY-layer firmware and the protocol stack on the HPS.

Recommended

10AS066K3F35I2LG · Intel CYCLONE V GX FPGA (Lower-cost Intel FPGA family for auxiliary baseband cards)

📺

Broadcast Video Encoding and Processing

For broadcast video encoders (HEVC/H.264/H.265) and contribution codecs, the 10AS066K4F35I3LG provides the DSP block count and external memory bandwidth to support 4K60p multi-stream encoding. The fabric implements motion estimation, transform coding, and entropy coding, while the dual ARM Cortex-A9 cores handle IP networking (SMPTE 2022, NDI), metadata, and control plane. The industrial temperature grade suits broadcast truck and outdoor stadium installations. Pair with external DDR4 via the FPGA hard memory controller for frame buffering.

Recommended

10AS066K4F35I3SG · Intel MT48LC16M16A2 (SDRAM companion memory for frame buffers)

✈️

Military and Aerospace Secure Communications

The 10AS066K4F35I3LG is widely adopted in software communications architecture (SCA) platforms and tactical radios where the FPGA fabric accelerates Type-1 crypto, frequency hopping, and waveform processing, while the ARM Cortex-A9 HPS runs a hardened RTOS or Linux with anti-tamper monitoring. The 20 nm process and industrial temperature grade are well-suited to ruggedized enclosures. The dual-core A9 subsystem supports secure boot with hardware root of trust, and the FPGA fabric enables physical-layer cryptography accelerators operating in parallel with the application processor.

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10AS066K4F35I3SG · Intel 10AS066K4F35E3LG · Intel

🏭

Industrial Machine Vision and Image Processing

In factory automation and machine vision, the 10AS066K4F35I3LG processes high-resolution camera streams at line rates up to multi-Gbps. The 660K logic elements enable multi-camera aggregation, real-time defect detection, and FPGA-accelerated image preprocessing (filtering, color conversion, lens correction), while the dual Cortex-A9 cores run classification algorithms, OPC-UA messaging, and PLC integration. The industrial temperature grade (-40C to +100C) tolerates factory floor conditions. Pair with industrial GigE Vision or CoaXPress camera interfaces implemented in the FPGA fabric for high-throughput image acquisition.

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10AS066K2F35I2LG · Intel 10AS066K3F35I2LG · Intel

💊

Medical Imaging and Diagnostics

For medical imaging systems such as ultrasound, CT, and MRI front-end processing, the 10AS066K4F35I3LG performs beamforming, channel processing, and image reconstruction in the FPGA fabric, with the dual Cortex-A9 cores handling user interface, DICOM networking, and patient data management. The K4 density of 660K logic elements supports 256-channel ultrasound beamformers or real-time MRI reconstruction; the HPS runs embedded Linux for system integration. The industrial temperature grade and FPGA deterministic latency support the strict real-time requirements of diagnostic imaging. Use SoC EDS to deploy DSP firmware on the fabric.

Recommended

10AS066K4F35I3SG · Intel 10AS066K3F35I2SG · Altera

Recommended Products Summary

AD9361 Integrated RF agile transceiver for SDR front end Used in: Software-Defined Radio (SDR) Baseband 10AS066K4F35I3SG Intel Used in: Software-Defined Radio (SDR) Baseband, Broadcast Video Encoding and Processing, Military and Aerospace Secure Communications, Medical Imaging and Diagnostics 10AS066K4F35E3LG Intel Used in: Software-Defined Radio (SDR) Baseband, Military and Aerospace Secure Communications 10AS066K3F35I2LG Intel Used in: 4G/5G Baseband Processing, Industrial Machine Vision and Image Processing CYCLONE V GX FPGA Lower-cost Intel FPGA family for auxiliary baseband cards Used in: 4G/5G Baseband Processing MT48LC16M16A2 SDRAM companion memory for frame buffers Used in: Broadcast Video Encoding and Processing 10AS066K2F35I2LG Intel Used in: Industrial Machine Vision and Image Processing 10AS066K3F35I2SG Altera Used in: Medical Imaging and Diagnostics

What is the 10AS066K4F35I3LG?

The 10AS066K4F35I3LG is an Intel Arria 10 SX SoC FPGA with 660,000 logic elements and a dual-core ARM Cortex-A9 MPCore hard processor subsystem, integrated on a single 20 nm die and housed in a 1152-ball FC-BGA 35x35 mm package. According to the Intel Arria 10 device overview, it combines an FPGA fabric with a Cortex-A9 hard processor system for embedded compute plus programmable logic. Operating grade is industrial (I3). It targets embedded communications, broadcast, and defense applications.

What is the package and ball count of 10AS066K4F35I3LG?

The 10AS066K4F35I3LG is offered in a 1152-ball Flip-Chip BGA (FBGA, FC) package measuring 35x35 mm. According to the DigiKey product listing, the device is identified as '1152-FBGA, FC (35x35)' with industrial temperature grade. This large BGA requires via-in-pad PCB construction and high-layer-count stack-up; plan at least 8 PCB layers for signal escape and a continuous ground plane under the package for power delivery and thermal relief.

What are the operating temperature grades for the 10AS066K4F35I3LG?

The 10AS066K4F35I3LG is rated to the industrial (I3) temperature grade of -40C to +100C. According to Intel Arria 10 ordering information, the suffix after the speed grade denotes temperature: 'I3' corresponds to industrial. For extended temperature, the 'E3' commercial-in-extended variant exists in the same family. Designers needing military temperature should look at the Arria 10 GX military line or screened variants.

How much does the 10AS066K4F35I3LG cost?

The 10AS066K4F35I3LG is priced at approximately $3,450 USD per unit at qty 1 as of 2026-09-05 based on distributor listings, dropping to roughly $2,350 USD at qty 1000. Pricing reflects its position as a high-density SoC FPGA with a hard processor system and 1152-ball FC-BGA package. Stock is limited and lead times on high-density FPGAs may extend 12-26 weeks through authorized distributors; quote-on-request via DigiKey or Mouser is common.

Where can I buy the 10AS066K4F35I3LG online?

The 10AS066K4F35I3LG can be purchased from authorized distributors including DigiKey (SKU 5429190) and Mouser, with listings also visible on Avaq, Veswin, YIC Electronics, and Ampheo. As of 2026-09-05, lead times vary; quote-on-request is common for high-density Arria 10 SX parts. For high-reliability programs, source through franchised distributors to avoid counterfeits; for prototype quantities, independent distributors may stock reclaimed or refurbished parts at lower cost but reduced traceability.

What is the lead time and stock status for 10AS066K4F35I3LG?

Lead time for the 10AS066K4F35I3LG varies from 12 to 26 weeks through authorized distributors as of 2026-09-05, given its high-density 660K LE SoC FPGA classification and limited foundry capacity for 20 nm Arria 10 parts. The part is marked active in Intel's product lifecycle but allocation is common. For urgent prototype needs, contact Intel field applications or authorized distributors for allocation information; plan ahead for production ramp orders.

10AS066K4F35I3LG vs 10AS066K4F35E3LG - what is the difference?

The 10AS066K4F35I3LG is the industrial temperature grade variant (I3 = -40C to +100C), while the 10AS066K4F35E3LG is the commercial-in-extended variant (E3 = 0C to +100C). According to Intel Arria 10 ordering information, both share the same 1152-ball FC-BGA package, the same 660K logic elements, and the same dual-core ARM Cortex-A9 HPS, so they are pin-compatible drop-in replacements when the temperature class is acceptable. Choose I3 for outdoor or industrial deployments; E3 is sufficient for climate-controlled environments.

10AS066K4F35I3LG vs 10AS066K3F35I3LG - which should I choose?

The 10AS066K4F35I3LG has 660K logic elements while the 10AS066K3F35I3LG has 480K logic elements, but both share the same 1152-ball FC-BGA package, the same dual ARM Cortex-A9 HPS, and the same industrial temperature grade. The 'K4' versus 'K3' in the MPN encodes logic density per the Arria 10 ordering scheme. Choose K3 if your design fits within 480K LEs (lower cost, ~30% less silicon area utilized). Choose K4 only if you need the additional 180K LEs.

10AS066K4F35I3LG vs 10AS066H4F34I3SG - are they drop-in compatible?

The 10AS066K4F35I3LG and 10AS066H4F34I3SG are NOT drop-in compatible. The K4 variant uses a 1152-ball 35x35 mm FC-BGA package (F35), while the H4 variant uses a 1152-ball 34x34 mm FC-BGA package (F34). They also differ in transceiver and memory subsystem: K4 (Arria 10 SX) versus H4 (Arria 10 GX). The 34x34 vs 35x35 mm BGA dimensions require different PCB land patterns, so PCB redesign is required if migrating between packages.

When should I choose 10AS066K4F35I3LG over a smaller Arria 10 SX?

Choose the 10AS066K4F35I3LG (660K LEs) when your design requires high logic density, large embedded memory, or many high-speed transceivers beyond what 480K LEs (K3) or 270K LEs (K2) can deliver. According to the Arria 10 family overview, K4 is appropriate for designs with multiple high-bandwidth interfaces, complex DSP pipelines, or wide on-chip bus architectures. For cost-sensitive applications that fit within 270K or 480K LEs, consider K2 or K3 respectively to save 30-50% on silicon cost.

What is the best drop-in replacement for 10AS066K4F35I3LG?

The best drop-in replacement for the 10AS066K4F35I3LG is the 10AS066K4F35E3LG, which shares the same 1152-ball FC-BGA 35x35 mm package, the same 660K logic elements, and the same dual ARM Cortex-A9 HPS, differing only in the temperature grade (E3 commercial-in-extended versus I3 industrial). For applications operating strictly within 0C to +100C, the E3 variant is a true pin-compatible substitute. Other drop-in variants within the same K4 35x35 mm package include the 10AS066K4F35I3SG (gold bond wire / different lead finish).

Where can I download the 10AS066K4F35I3LG datasheet PDF?

The official Intel Arria 10 device datasheet can be downloaded from the Intel FPGA documentation portal at intel.com/content/www/us/en/products/programmable/fpga/arria-10/overview.html. Third-party datasheet mirrors are also available on datasheets.com, findic.us, micro-semiconductor.com, and veswin.com. The device datasheet covers device architecture, pin tables, electrical characteristics, thermal data, and configuration specifications for the entire Arria 10 SX family. For Quartus Prime tool support, refer to Intel's SoC EDS documentation.

What is the pinout of the 10AS066K4F35I3LG?

The 10AS066K4F35I3LG is a 1152-ball Flip-Chip BGA package with a pinout defined across all FPGA I/O banks, HPS dedicated pins, power and ground balls, configuration pins, and JTAG. According to Intel's Arria 10 pin table files, designers must use the Intel Quartus Prime Pin Planner to assign pins and verify bank voltage compatibility (e.g., 1.8 V, 2.5 V, 3.3 V). Pin tables are provided as CSV and Excel files inside Quartus Prime; the device symbol and footprint are auto-generated by the Quartus fitter for PCB CAD tools.

Hey Google, what can replace the 10AS066K4F35I3LG if it is out of stock?

If the 10AS066K4F35I3LG is out of stock, the recommended drop-in substitutes are the 10AS066K4F35E3LG (commercial-extended temperature) or the 10AS066K4F35I3SG, all of which share the same 1152-ball FC-BGA 35x35 mm package and identical 660K logic element density. For lower-density alternatives, the 10AS066K3F35I3LG (480K LEs) and 10AS066K2F35I2LG (270K LEs) share the same 35x35 mm F35 BGA package and are pin-compatible within the same K3/K2 silicon family. Cross-brand equivalents from Xilinx do not share this specific BGA.

What are the key specifications of the 10AS066K4F35I3LG that engineers should know?

Key specifications: 660,000 logic elements (K4 density), dual-core ARM Cortex-A9 MPCore HPS at up to 1.5 GHz, 20 nm process, 1152-ball FC-BGA 35x35 mm package, industrial temperature grade -40C to +100C (I3 suffix), integrated high-speed transceivers, M20K embedded memory blocks, and DSP blocks. The device supports Intel Quartus Prime and SoC Embedded Development Suite (SoC EDS) for firmware and Linux bring-up. Lifecycle is active but allocations may apply due to 20 nm capacity limits.

Engineering reference data for 10AS066K4F35I3LG — comparison, design guidance, and compliance information.

Selection Guide

Choose the 10AS066K4F35I3LG when your embedded design needs the highest logic density (660K LEs) in the Arria 10 SX family with the F35 35x35 mm FC-BGA footprint and industrial temperature grade. It is the right fit for software-defined radio, 4G/5G baseband, broadcast encoders, and military secure communications that demand simultaneous HPS-Linux and FPGA fabric processing. For lower-density pin-compatible alternatives, drop in the K3 (480K LEs) or K2 (270K LEs) variants on the same 35x35 mm package to save cost. For commercial-extended temperature within the same 0-100C range, use the E3 variant. For lower-cost prototypes, Cyclone V SoC or Arria V SoC may be considered but requires PCB redesign.

Comparison with Alternatives

Parameter	This Product	10AS066K4F35I3SG	10AS066K4F35E3LG	10AS066K4F35E3SG	10AS066K3F35I2SG	10AS066K3F35I2LG	10AS066K2F35I2SG
Package	1152-FBGA, FC (35x35)	1152-FBGA, FC (35x35) - same	1152-FBGA, FC (35x35) - same	1152-FBGA, FC (35x35) - same	1152-FBGA, FC (35x35) - same	1152-FBGA, FC (35x35) - same	1152-FBGA, FC (35x35) - same
Brand	Intel	Intel - same brand	Intel - same brand	Intel - same brand	Intel - same brand	Intel - same brand	Intel - same brand
Logic Elements	660,000	660,000	660,000	660,000	480,000 (-27%)	480,000 (-27%)	270,000 (-59%)
Temperature Grade	I3 Industrial (-40C to +100C)	I3 Industrial (-40C to +100C)	E3 Commercial-Extended (0C to +100C)	E3 Commercial-Extended (0C to +100C)	I2 Industrial (-40C to +100C)	I2 Industrial (-40C to +100C)	I2 Industrial (-40C to +100C)
Hard Processor System	Dual ARM Cortex-A9 MPCore	Dual ARM Cortex-A9 MPCore - same	Dual ARM Cortex-A9 MPCore - same	Dual ARM Cortex-A9 MPCore - same	Dual ARM Cortex-A9 MPCore - same	Dual ARM Cortex-A9 MPCore - same	Dual ARM Cortex-A9 MPCore - same
Logic Density Tier	K4 (660K)	K4 (660K) - same	K4 (660K) - same	K4 (660K) - same	K3 (480K) - reduced	K3 (480K) - reduced	K2 (270K) - significantly reduced
Shipping Variant	LG (tray / specific lead finish)	SG - alternate tray/finish variant	LG - same tray/finish as this product	SG - alternate tray/finish variant	SG - alternate tray/finish variant	LG - same tray/finish as this product	SG - alternate tray/finish variant
Estimated Unit Price (qty 1)	~$3,450	~$3,450 (same K4)	~$3,250 (same K4, E3)	~$3,250 (same K4, E3)	~$2,500 (K3 lower density)	~$2,500 (K3 lower density)	~$1,650 (K2 lowest density)

Key Differentiators

Highest logic density in the F35 35x35 mm SoC FPGA package (vs 10AS066K3F35I2LG (K3 variant))
Industrial temperature grade I3 for harsh-environment deployments (vs 10AS066K4F35E3LG (E3 commercial-extended))
Integrated dual ARM Cortex-A9 HPS eliminates external processor (vs 10AS048H4F34I3LG (Arria 10 GX FPGA without HPS))
Compatibility with full Intel SoC EDS toolchain including Linux (vs Generic FPGA without hard processor)

Design Notes

The 1152-ball FC-BGA at 35x35 mm requires a high-density PCB stack-up. Plan at least 8 layers with microvia or via-in-pad construction (per IPC-6012 Class 3 for harsh-environment applications). Route all 1152 signals out from the BGA escape region using staggered or dog-bone fan-out for the inner rows. Maintain continuous ground planes under the package to support signal return paths and thermal dissipation. Reference Intel's Arria 10 board design guidelines for layer-stack recommendations and decoupling capacitor placement.

Estimated: at full fabric utilization (660K LEs at 200 MHz) plus dual ARM Cortex-A9 cores running Linux, total device power can reach 25-35 W. Use the thermal resistance values from the Intel Arria 10 device datasheet and a heat-spreader with thermal interface material. Place temperature sensors on the package top center and at the PCB hot-spot. For industrial enclosures (I3 grade -40C to +100C), design cooling to keep junction temperature below 100C at maximum ambient. Consider conformal coating for dust and humidity protection.

Avoid these common pitfalls: (1) mixing 1.8 V and 3.3 V I/O standards on the same bank without checking VCCIO compatibility per Intel's bank restrictions; (2) omitting the dedicated HPS reference clock circuit, which prevents the Cortex-A9 subsystem from booting; (3) failing to instantiate the FPGA-to-HPS AXI bridges in Quartus Prime, which causes fabric-to-processor data paths to silently fail; (4) underestimating configuration flash density - the 10AS066K4F35I3LG typically requires a 256 Mbit or larger QSPI flash for bitstream plus HPS bootloader.

Plan separate power rails for the FPGA core (VCCINT), FPGA I/O banks (VCCIO), HPS core (VCCL_HPS), HPS I/O, transceivers, and PLL/clocking. Use Intel's PowerPlay early power estimator tool during the design phase to size voltage regulators and bulk decoupling. Sequence HPS power before FPGA fabric power, or use Intel's recommended power-on-reset sequencing to avoid latch-up. Estimate: VCCINT at 0.85 V (core), VCCIO at 1.8 V or 2.5 V depending on bank; refer to the datasheet for exact values.

Compliance Information

RoHS

Compliant

REACH

Compliant

AEC-Q100

Not Applicable

Lead Free

Yes

Halogen Free

Unknown

Conflict Minerals

Compliant

RoHS compliance and lead-free status per Intel product environmental information. AEC-Q100 not applicable - this is an FPGA SoC, not a discrete automotive IC. Halogen-free status: not explicitly listed in the verified data.

Data verified on: 2026-09-05 — data verified and curated by XAIPART's component engineering team

Sources: Distributor, Manufacturer_Product_Page, Distributor, Manufacturer_Datasheet, Internal_Db, Octopart, Distributor

Related Components & Terms

Intel Altera 10AS066K4F35I3LG 10AS066K4F35I3SG 10AS066K4F35E3LG 10AS066K4F35E3SG 10AS066K3F35I2SG 10AS066K3F35I2LG 10AS066K2F35I2SG Arria 10 SX Arria 10 GX FPGA SoC FPGA system on chip ARM Cortex-A9 MPCore CoreSight FBGA FC-BGA flip-chip BGA logic element DSP block M20K memory SoC EDS Quartus Prime industrial temperature grade RoHS AEC-Q100 software-defined radio 5G baseband