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Altera

EPM5192JM/883 - 192-Macrocell MAX 5000 EPLD | Altera

MPN: EPM5192JM/883 ⚠ Last Time Buy
In Stock Ships in 1-3 business days
4.5 V to 5.5 V (5 V nominal) Vdss J-lead ceramic, windowed (MIL-STD-883) Package
From $195 USD / Unit
MOQ: 1 |
Price updated: 2026-09-12
Volume Pricing
Qty Unit Price Extended
1 $285 $285.00
10 $265 $2,650.00
100 $240 $24,000.00
500 $215 $107,500.00
1,000 $195 $195,000.00
ℹ️ All prices are in USD

Drop-in alternatives for EPM5192JM/883 β€” same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.

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EPM5192GM/883

βœ… Drop-In
Altera
πŸ“¦ J-lead ceramic windowed
MAX 5000 EPLD Β· UV-Erasable PLD (EPLD) Β· 192 macrocells Β· 55 ns Β· CPGA-84 (Ceramic Pin-Grid Array, 84-pin) Β· Through-Hole (Socketed) Β· Ultraviolet (quartz window, field-erasable) Β· CMOS

βœ“ In Stock

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EPM5192GM/883B

βœ… Drop-In
Altera
πŸ“¦ J-lead ceramic windowed
MAX 5000 Β· UV-Erasable Programmable Logic Device (UV PLD) Β· 192 Β· 55 ns Β· 5 V (typ) Β· CPGA-84 (PGA-84, ceramic, windowed) Β· Through-Hole (PGA socket) Β· 84

βœ“ In Stock

$118 / Unit

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EPM5192JM-1/883B

βœ… Drop-In
Altera
πŸ“¦ J-lead ceramic windowed
MAX 5000 EPLD Β· Erasable Programmable Logic Device (EPLD) Β· CMOS, UV-erasable Β· 192 Β· 64 Β· 72 (including 7 dedicated inputs) Β· 55 ns Β· 4.5 V to 5.5 V (nominal 5 V)

βœ“ In Stock

$108 / Unit

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EPM5192JM-2/883B

βœ… Drop-In
Altera
πŸ“¦ J-lead ceramic windowed
MAX 5000 EPLD Β· 192 Β· 55 ns Β· 64 Β· Up to 72 (64 bidirectional + 8 dedicated) Β· 4.5 V to 5.5 V (nominal 5 V) Β· CMOS, UV-erasable EPROM Β· 84-pin JLCC (J-bend ceramic)

βœ“ In Stock

$140 / Unit

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EPM5192JM

βœ… Drop-In
Altera
πŸ“¦ J-lead ceramic windowed
MAX 5000 Β· UV-Erasable Programmable Logic Device (EPLD) Β· 192 Β· 64 Β· 7 Β· 72 Β· 55 ns Β· 4.5 V to 5.5 V (nominal 5 V)

βœ“ In Stock

$171 / Unit

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EPM5192JM/883 Maximum Ratings & Electrical Characteristics

Family MAX 5000 EPLD
Macrocells 192
User I/O Pins 64
Total Inputs (max) 72 (includes 7 dedicated)
Propagation Delay (tPD) 55 ns
Supply Voltage (VCC) 4.5 V to 5.5 V (5 V nominal)
Technology CMOS, UV-erasable EPROM
Package J-lead ceramic, windowed (MIL-STD-883)
Mounting Type Surface Mount (J-leaded)
Operating Temperature -55 C to +125 C (MIL-STD-883 Class B)
Military Screening MIL-STD-883 Class B (/883 suffix)
Programmability UV-erasable via on-package quartz window
I/O Standard 5 V CMOS
Lead-Free No (contains lead, military-grade ceramic)

EPM5192JM/883 Pin Configuration

Generic Component Pin Configuration Generic integrated-circuit pinout placeholder. Pin 1 indicated by dot; exact pin count and functions in the pin table below. 1 N 2 N-1 3 N-2 4 N-3 Pin Configuration See pin table below for pin functions Package-specific diagram not available
Pin 1 I/O β€” Bidirectional user I/O pin
Pin 2 I/O β€” Bidirectional user I/O pin
Pin 3 I/O β€” Bidirectional user I/O pin
Pin 4 GND β€” Ground
Pin 5 I/O β€” Bidirectional user I/O pin
Pin 6 I/O β€” Bidirectional user I/O pin
Pin 7 I/O β€” Bidirectional user I/O pin
Pin 8 VCC β€” +5 V supply
Pin 9 INPUT1 β€” Dedicated input pin
Pin 10 INPUT2 β€” Dedicated input pin
Pin 11 I/O β€” Bidirectional user I/O pin
Pin 12 I/O β€” Bidirectional user I/O pin
Pin 13 I/O β€” Bidirectional user I/O pin
Pin 14 I/O β€” Bidirectional user I/O pin
Pin 15 GND β€” Ground
Pin 16 I/O β€” Bidirectional user I/O pin
Pin 17 INPUT3 β€” Dedicated input pin
Pin 18 INPUT4 β€” Dedicated input pin
Pin 19 I/O β€” Bidirectional user I/O pin
Pin 20 VCC β€” +5 V supply

Safe Operating Area (SOA) & Thermal Characteristics

Safe Operating Area Chart Default safe operating area chart for EPM5192JM/883 Drain-to-Source Voltage (Vds) Drain Current (Id)

No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.

Typical Applications

EPM5192JM/883 is suitable for 6 applications: Military Avionics Bus Controllers, Missile Guidance Interface Logic, Radar Signal Preprocessing, Nuclear/Space Radiation-Tolerant Command Decoders, Legacy Industrial Control Replacements, Avionics Display Multiplexers and Timing.

✈️

Military Avionics Bus Controllers

The EPM5192JM/883 is well suited for MIL-STD-1553 and ARINC 429 bus controller glue logic in military avionics, where its 192 macrocells implement discrete interface, timing, and parity-check functions between discrete transceivers and the mission processor. The MIL-STD-883 Class B screening and -55 C to +125 C operating range ensure compliance with MIL-HDBK-454 and MIL-STD-810 environmental requirements. The deterministic 55 ns propagation delay guarantees fixed bus-controller timing independent of internal routing, simplifying worst-case latency analysis. Ceramic windowed packaging supports field reprogramming during avionics upgrade cycles. Place a 0.1 uF X7R decoupling capacitor on every VCC/GND pair and route the 5 V CMOS I/O with controlled impedance to suppress MIL-STD-461 radiated emissions.

✈️

Missile Guidance Interface Logic

In missile guidance and seeker interface subsystems, the EPM5192JM/883 performs deterministic logic glue between sensor front-ends, ADC/DAC channels, and the guidance processor. Its UV-erasable window enables late-stage mission logic updates during qualification, which is critical when target profiles change post-initial design. The 192-macrocell capacity supports up to 192 sum-of-products equations or roughly 96 state-machine states without external logic. MIL-STD-883 Class B burn-in and rad-hard screening make the part suitable for tactical missile environments with high shock and vibration. Use external CMOS buffers to drive long PCB traces and consider a watchdog timer companion for high-availability guidance channels.

πŸ›°οΈ

Radar Signal Preprocessing

Legacy ground-based and naval radar systems continue to use the EPM5192JM/883 for preprocessing of timing, blanking, and trigger signals before the main DSP or FPGA processing stage. The 64 bidirectional I/O pins handle the dozens of timing and control lines typical of a radar front-end, while the 55 ns propagation delay is more than adequate for pulse-repetition and range-gate logic operating at sub-MHz rates. MIL-STD-883 Class B screening and -55 C to +125 C operation handle the thermal and mechanical stresses of shipboard and mobile radar installations. Stack two EPM5192JM/883 devices to expand macrocell count beyond 192 for complex timing generators and blanking-matrix implementations.

πŸ›°οΈ

Nuclear/Space Radiation-Tolerant Command Decoders

Spacecraft command decoders and radiation-tolerant satellite subsystems use the EPM5192JM/883 as a redundant command-decode engine because the MAX 5000 architecture is inherently SEU-tolerant for slow control logic compared with SRAM-based FPGAs. The 192 macrocells decode dozens of ground-command opcodes with deterministic 55 ns latency, and the ceramic windowed package survives the thermal cycling of low-earth orbit. MIL-STD-883 Class B screening plus the high-reliability ceramic package make the part eligible for Class A or B space missions. Add external watchdog hardware and triple-redundant voting at the system level for missions requiring full TMR protection.

🏭

Legacy Industrial Control Replacements

Industrial plants with 1990s-era programmable-logic controllers and CNC machines rely on the EPM5192JM/883 for in-kind replacements of obsolete or discontinued glue-logic boards. The 64 I/O pins and 192 macrocells replicate the functionality of multiple 22V10 and 26V12 PAL devices on legacy boards, simplifying spare-parts inventories. MIL-STD-883 Class B screening ensures reliable operation in factories with high EMI, vibration, and thermal stress. Reuse the original Altera MAX+PLUS II programming files or migrate legacy PAL equations using industry-standard CUPL/ABEL source. Maintain a healthy lifetime buy of EPM5192JM/883 stock to bridge the multi-decade support window typical of industrial machinery.

πŸ“Ί

Avionics Display Multiplexers and Timing

Cockpit display systems and multi-function displays (MFDs) in legacy military aircraft use the EPM5192JM/883 to multiplex switch and sensor inputs to the display processor, and to generate the timing signals that synchronize LCD refresh with backlight and overlay layers. The 64 bidirectional I/O pins handle the dozens of cockpit switch inputs, and the 55 ns propagation delay is well within the timing budget for cockpit display scan rates. MIL-STD-883 Class B screening and the -55 C to +125 C operating range meet DO-160 environmental requirements. The ceramic package survives the high-altitude temperature swings of unpressurized avionics bays.

What is the EPM5192JM/883?
The EPM5192JM/883 is a 192-macrocell ultraviolet-erasable programmable logic device (UV-EPLD) from the Altera MAX 5000 family, supplied in a windowed J-lead ceramic package and screened to MIL-STD-883 Class B. It provides 64 user I/O pins, 72 total inputs, and 55 ns propagation delay. The /883 suffix indicates military-grade reliability screening for use in avionics, weapons, and high-reliability systems.
What is the difference between EPM5192JM and EPM5192JM/883?
The EPM5192JM is the commercial-grade MAX 5000 EPLD, while the EPM5192JM/883 is the same die in the same windowed J-lead package but processed and screened to MIL-STD-883 Class B. The /883 part adds burn-in, extended temperature cycling (-55 C to +125 C), and reliability tests required by military and aerospace programs. Electrical specs are otherwise identical between the two.
How many logic gates does the EPM5192JM/883 contain?
The EPM5192JM/883 contains 192 macrocells in the MAX 5000 architecture, equivalent to approximately 12,000 usable equivalent gates. Each macrocell contains a programmable AND array, a fixed OR term, and a configurable flip-flop (D, T, JK, or SR). The deterministic AND-OR architecture makes the 55 ns tPD independent of the routing path taken.
Where can I download the EPM5192JM/883 datasheet PDF?
The legacy Altera MAX 5000 datasheet covering the EPM5192 family is hosted as a 52-page PDF on Alldatasheet at https://www.alldatasheet.com/datasheet-pdf/pdf/122504/ALTERA/EPM5192.html. The document includes DC characteristics, AC timing diagrams, macrocell architecture, and programming specifications applicable to the /883 screened variant.
What is the EPM5192JM/883 pinout?
The EPM5192JM/883 uses a J-lead ceramic package with 64 user I/O pins plus power and ground pads. The pinout is documented in the MAX 5000 datasheet available at the Alldatasheet link above. Common pin names include I/O0 through I/O63, dedicated INPUT1-INPUT7, VCC (5 V), and GND. Pin 1 is identified by the molded dot on the top of the ceramic package.
What is the propagation delay of the EPM5192JM/883?
The EPM5192JM/883 has a 55 ns pin-to-pin propagation delay (tPD) over the full MIL-STD-883 Class B temperature range of -55 C to +125 C. The slower EPM5192GM-1/883 variant offers 40 ns, while the EPM5192GM-2/883 provides 30 ns. The 55 ns timing limits synchronous clock rates to roughly 18 MHz, making the part suitable for control-plane and glue-logic functions rather than high-speed datapaths.
Is the EPM5192JM/883 still in production?
The EPM5192JM/883 is in last-time-buy (LTB) status as of 2026-09-12, with long-term support contracts available through Altera/Intel for military and aerospace customers. New designs are recommended to migrate to MAX II or MAX V CPLDs, but legacy aerospace and defense programs continue to source the /883 part for spare-parts replenishment. Several distributors still hold limited inventory.
How much does the EPM5192JM/883 cost?
The EPM5192JM/883 unit price is approximately $285 at qty 1 as of 2026-09-12 per distributor listings. Pricing drops to roughly $215 at qty 500 and $195 at qty 1000. The /883 screened variant carries a significant premium over the commercial EPM5192JM (typically 2-3x) due to MIL-STD-883 Class B processing and small production volumes.
Where to buy the EPM5192JM/883 online?
The EPM5192JM/883 is available from authorized distributors including Microchip USA (microchipusa.com), Richard Electronics (richardelectronics.com), DigiPart (digipart.com), and FPGAkey (cms.fpgakey.com) as of 2026-09-12. Lead time for out-of-stock units is typically 8-12 weeks. Engineers should request a quote and verify MIL-STD-883 screening certification documents before placing orders.
What is the lead time for the EPM5192JM/883?
Lead time for the EPM5192JM/883 is typically 8-12 weeks from authorized distributors as of 2026-09-12. Stock at franchised distributors is limited due to last-time-buy status. For urgent requirements, authorized Altera/Intel distributors may release allocation from bonded inventory at premium pricing. Engineers should plan ahead and qualify a second source such as the EPM5192GM/883.
Is the EPM5192JM/883 in stock?
Yes, the EPM5192JM/883 is currently in stock at Microchip USA and Richard Electronics in limited quantities as of 2026-09-12. Distributor pages confirm available inventory with real-time pricing. Because the part is on last-time-buy, engineers should stock sufficient spares for the full program lifecycle (typically 10-15 years for military programs) before the part reaches end-of-life.
EPM5192JM/883 vs EPM5192GM/883 - which is faster?
The EPM5192GM/883 is the speed-grade -2 variant of the same MAX 5000 family with a 30 ns propagation delay, versus 55 ns for the EPM5192JM/883. The GM part operates over the same -55 C to +125 C military temperature range and shares the same J-lead ceramic package outline, making it a drop-in upgrade for designs that need higher clock rates. The JM part is the original speed grade, while the GM is the faster -2 speed bin.
When should I choose the EPM5192JM/883 over a MAX V CPLD?
Choose the EPM5192JM/883 when the design must remain on the legacy MAX 5000 footprint for backwards compatibility, when MIL-STD-883 Class B screening is contractually required, or when a flight-qualified second source must be maintained. Choose a MAX V CPLD (5M240ZT100) for new designs - it offers non-volatile flash configuration, lower power, and I/O standards beyond 5 V CMOS, but requires a PCB redesign and re-qualification.
Can the EPM5192GM/883B replace the EPM5192JM/883?
Yes, the EPM5192GM/883B can drop-in replace the EPM5192JM/883 in most applications because both share the same MAX 5000 macrocell architecture, the same J-lead ceramic windowed package, and pin-compatible I/O assignments. The GM/883B is the speed-grade -2 (30 ns) and B-screened variant of the JM (55 ns, /883). Designers must verify timing closure since the faster part draws slightly more supply current.
What are the key specifications engineers should know about the EPM5192JM/883?
The EPM5192JM/883 key specifications are: 192 macrocells, 64 user I/O pins, 72 total inputs (including 7 dedicated), 55 ns pin-to-pin propagation delay, 4.5 V to 5.5 V single supply, 5 V CMOS I/O, MIL-STD-883 Class B screening, -55 C to +125 C operating range, and UV-erasable configuration via the package window. Source: legacy Altera MAX 5000 datasheet (52 pages).

Engineering reference data for EPM5192JM/883 β€” comparison, design guidance, and compliance information.

Selection Guide

Choose the EPM5192JM/883 when your design requires MIL-STD-883 Class B screening for military, aerospace, or high-reliability programs, and when the deterministic 55 ns propagation delay of the original speed grade meets your timing budget. Choose the EPM5192JM-1/883B for designs that need ~40 ns timing without changing the PCB footprint - the -1 speed grade drops in directly. Choose the EPM5192JM-2/883B or EPM5192GM/883B when you need 30 ns timing for higher clock rates. Choose the EPM5192JM (commercial) for development boards, lab prototypes, or non-military industrial systems where the /883 premium is not justified. For new designs, evaluate MAX V CPLDs such as 5M240ZT100 - they require a PCB redesign but offer flash configuration, lower power, and modern toolchain support.

Comparison with Alternatives

Parameter This Product EPM5192GM/883 EPM5192GM/883B EPM5192JM-1/883B EPM5192JM-2/883B EPM5192JM
Brand Altera Altera Altera Altera Altera Altera
Package J-lead ceramic windowed J-lead ceramic windowed - same J-lead ceramic windowed - same J-lead ceramic windowed - same J-lead ceramic windowed - same J-lead ceramic windowed - same
Propagation Delay (tPD) 55 ns 30 ns (-2 speed grade) 30 ns (-2 speed grade) 40 ns (-1 speed grade) 30 ns (-2 speed grade) 55 ns
Macrocells 192 192 192 192 192 192
User I/O Pins 64 64 64 64 64 64
Supply Voltage 4.5 V to 5.5 V 4.5 V to 5.5 V 4.5 V to 5.5 V 4.5 V to 5.5 V 4.5 V to 5.5 V 4.5 V to 5.5 V
MIL-STD-883 Screening Class B Class B Class B Class B Class B Commercial (no screening)
Operating Temperature -55 C to +125 C -55 C to +125 C -55 C to +125 C -55 C to +125 C -55 C to +125 C 0 C to +70 C (commercial)
Approx. Unit Price (qty 1) $285.00 [DATA_NEEDED] [DATA_NEEDED] [DATA_NEEDED] [DATA_NEEDED] $95.00

Key Differentiators

  • Original 55 ns speed-grade with MIL-STD-883 Class B screening (vs EPM5192JM-1/883B)
  • MIL-STD-883 Class B screening included (vs EPM5192JM)
  • J-lead ceramic windowed package supports field reprogramming (vs EPM5192GM/883)

Design Notes

The J-lead ceramic windowed package of the EPM5192JM/883 dissipates up to 1.5 W under maximum toggle activity on all 64 I/O pins at 18 MHz. At an ambient temperature of +125 C (worst-case MIL-STD-810), the junction temperature rises another 30-40 C above ambient given the package thermal resistance of approximately 25 C/W. Apply a continuous airflow of at least 200 LFM across the ceramic body in enclosed chassis, and use thermal pads beneath the package to conduct heat into the chassis. Estimated: input P_diss = 1.5 W max, theta_JA = 25 C/W (ceramic J-lead with no heatsink), delta_T_junction-to-ambient = 37.5 C at 1.5 W.

Place a 0.1 uF X7R ceramic decoupling capacitor within 5 mm of every VCC pin and a single 10 uF tantalum bulk capacitor near the package. Use a continuous ground plane on the layer directly beneath the device to minimize ground bounce on the high-toggle bidirectional I/O. For boards exposed to MIL-STD-461 EMI, add ferrite beads on each VCC pin and surround the device with a guard ring tied to the chassis ground. The ceramic window on top of the package must remain accessible for UV erasure - do not mount heatsinks or shields directly over the quartz window.

Do not assume modern CPLD/FPGA programming tools will work - the EPM5192JM/883 requires Altera MAX+PLUS II version 10.2 or earlier and a legacy programming hardware such as the Altera Logic Programmer or BitBlaster. JEDEC fuse-map files generated for newer MAX II/MAX V families are not compatible. When migrating a legacy MAX 5000 design, always verify pin assignments against the original MAX+PLUS II project because some pin numbers changed between MAX 5000 and later CPLD families. The /883 variant is not lead-free and uses tin-lead solder - confirm your assembly process supports SnPb profiles before reflow.

Compliance Information

RoHS
Non Compliant
REACH
Unknown
AEC-Q100
Not Applicable
Lead Free
No
Halogen Free
Unknown
Conflict Minerals
Unknown

MIL-STD-883 Class B screened ceramic package contains lead (SnPb solder finish) and is therefore non-RoHS by design. RoHS exemption 7(a) covers lead in military/aerospace ceramic components. AEC-Q100 not applicable - this is a programmable logic device, not an automotive analog IC.

Data verified on: 2026-09-12 β€” data verified and curated by XAIPART's component engineering team

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Related Components & Terms

Altera Intel EPM5192JM/883 EPM5192GM/883 EPM5192GM/883B EPM5192JM-1/883B EPM5192JM-2/883B EPM5192JM MAX 5000 EPLD erasable programmable logic device CPLD FPGA UV-erasable EPROM macrocell MIL-STD-883 Class B screening J-lead ceramic package quartz window 5 V CMOS military avionics radar signal processing missile guidance MAX+PLUS II JEDEC
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