Xilinx

XC3090L-8TQ144I - 6K-Gate CMOS FPGA, 80 MHz, 144-TQFP | Xilinx

MPN: XC3090L-8TQ144I βœ— End of Life
In Stock Ships in 1-3 business days
3.3 V Vdss 8 mA Id TQFP-144 (TQ144, LFQFP, gull-wing) Package 50 to 85 MHz Speed
From $51.95 USD / Unit
MOQ: 1 |
Price updated: 2026-09-13
Volume Pricing
Qty Unit Price Extended
1 $78.5 $78.50
10 $71.2 $712.00
100 $63.85 $6,385.00
500 $57.4 $28,700.00
1,000 $51.95 $51,950.00
ℹ️ All prices are in USD

Drop-in alternatives for XC3090L-8TQ144I β€” same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.

Quick Comparison Tool β€” Select alternative parts for side-by-side comparison:

XC3090L-8TQ144C

βœ… Drop-In
Xilinx
πŸ“¦ TQFP-144 (TQ144)
XC3000 (XC3090L) Β· Field Programmable Gate Array (FPGA) Β· CMOS, low-power (L suffix) Β· 320 Β· ~5000 Β· 6000 Β· 80 MHz Β· 6.7 ns max

βœ“ In Stock

$25 / Unit

View Datasheet β†’

XC3090L-7TQ176I

βœ… Drop-In
Xilinx
πŸ“¦ TQFP-176 (TQ176)
XC3000L Low-Voltage Logic Cell Array Β· 320 CLBs Β· Approx. 9,000 Β· 3.3 V Β· 3.3 V (5 V tolerant option) Β· -7 Β· TQFP-176 Β· 176

βœ“ In Stock

$55.2 / Unit

View Datasheet β†’

XC3195A-8TQ144C

βœ… Drop-In ⚠️ 参数待ιͺŒθ―
πŸ“¦ TQFP-144 (TQ144)
same XC3000-series TQ144 footprint, 484 CLBs vs 320 CLBs (+51%), same bitstream family

πŸ“‹ Reference alternative (not in catalog)

XC3090L-8TQ144I Maximum Ratings & Electrical Characteristics

Family XC3000L
Device Type Field Programmable Gate Array (FPGA)
Number of CLBs 320
Maximum Usable Gates 6000
Nominal Equivalent Gate Count 5000
System Clock Rate 50 to 85 MHz
Flip-Flop Toggle Rate 190 to 370 MHz
Logic Delay 1.55 to 4.1 ns
Supply Voltage 3.3 V
Output Sink Current 8 mA
Output Source Current 8 mA
Quiescent / Power-Down Current (max) 5 mA
Operating Temperature Grade Industrial (-40 C to +85 C)
Package TQFP-144 (TQ144, LFQFP, gull-wing)
Process Technology CMOS, SRAM-based configuration
Configuration Interface Serial/parallel master/slave modes via external PROM
Architecture Compatibility XC3000A, XC3000L, XC3100A, XC3100L families
Mounting Type Surface Mount (gull-wing)

XC3090L-8TQ144I Pin Configuration

TQFP-144 Package Pinout Diagram TQFP-144 20x20mm, P0.5mm, JEDEC MS-026. 1 36 TQFP-144
Pin 1 I/O β€” User I/O pin
Pin 2 I/O β€” User I/O pin
Pin 3 I/O β€” User I/O pin
Pin 4 I/O β€” User I/O pin
Pin 5 I/O β€” User I/O pin
Pin 6 I/O β€” User I/O pin
Pin 7 I/O β€” User I/O pin
Pin 8 I/O β€” User I/O pin
Pin 9 I/O β€” User I/O pin
Pin 10 I/O β€” User I/O pin
Pin 11 I/O β€” User I/O pin
Pin 12 I/O β€” User I/O pin
Pin 13 M1 β€” Configuration mode select 1
Pin 14 GND β€” Ground
Pin 15 M0 β€” Configuration mode select 0
Pin 16 M2 β€” Configuration mode select 2
Pin 17 VCC β€” +3.3 V supply
Pin 18 DONE β€” Configuration complete indicator (open-drain)
Pin 19 I/O β€” User I/O pin
Pin 20 I/O β€” User I/O pin
Pin 21 I/O β€” User I/O pin
Pin 22 I/O β€” User I/O pin
Pin 23 I/O β€” User I/O pin
Pin 24 I/O β€” User I/O pin
Pin 25 I/O β€” User I/O pin
Pin 26 I/O β€” User I/O pin
Pin 27 I/O β€” User I/O pin
Pin 28 I/O β€” User I/O pin
Pin 29 I/O β€” User I/O pin
Pin 30 I/O β€” User I/O pin
Pin 31 GND β€” Ground
Pin 32 VCC β€” +3.3 V supply
Pin 33 I/O β€” User I/O pin
Pin 34 I/O β€” User I/O pin
Pin 35 I/O β€” User I/O pin
Pin 36 I/O β€” User I/O pin
Pin 37 I/O β€” User I/O pin
Pin 38 I/O β€” User I/O pin
Pin 39 I/O β€” User I/O pin
Pin 40 I/O β€” User I/O pin
Pin 41 I/O β€” User I/O pin
Pin 42 I/O β€” User I/O pin
Pin 43 I/O β€” User I/O pin
Pin 44 I/O β€” User I/O pin
Pin 45 GCK β€” Global clock input
Pin 46 I/O β€” User I/O pin
Pin 47 I/O β€” User I/O pin
Pin 48 GND β€” Ground
Pin 49 I/O β€” User I/O pin
Pin 50 I/O β€” User I/O pin
Pin 51 I/O β€” User I/O pin
Pin 52 I/O β€” User I/O pin
Pin 53 I/O β€” User I/O pin
Pin 54 I/O β€” User I/O pin
Pin 55 I/O β€” User I/O pin
Pin 56 I/O β€” User I/O pin
Pin 57 I/O β€” User I/O pin
Pin 58 I/O β€” User I/O pin
Pin 59 I/O β€” User I/O pin
Pin 60 VCC β€” +3.3 V supply
Pin 61 I/O β€” User I/O pin
Pin 62 I/O β€” User I/O pin
Pin 63 I/O β€” User I/O pin
Pin 64 I/O β€” User I/O pin
Pin 65 I/O β€” User I/O pin
Pin 66 I/O β€” User I/O pin
Pin 67 I/O β€” User I/O pin
Pin 68 I/O β€” User I/O pin
Pin 69 I/O β€” User I/O pin
Pin 70 I/O β€” User I/O pin
Pin 71 I/O β€” User I/O pin
Pin 72 GND β€” Ground
Pin 73 I/O β€” User I/O pin
Pin 74 I/O β€” User I/O pin
Pin 75 I/O β€” User I/O pin
Pin 76 I/O β€” User I/O pin
Pin 77 I/O β€” User I/O pin
Pin 78 I/O β€” User I/O pin
Pin 79 I/O β€” User I/O pin
Pin 80 I/O β€” User I/O pin
Pin 81 I/O β€” User I/O pin
Pin 82 I/O β€” User I/O pin
Pin 83 I/O β€” User I/O pin
Pin 84 I/O β€” User I/O pin
Pin 85 I/O β€” User I/O pin
Pin 86 I/O β€” User I/O pin
Pin 87 I/O β€” User I/O pin
Pin 88 I/O β€” User I/O pin
Pin 89 I/O β€” User I/O pin
Pin 90 I/O β€” User I/O pin
Pin 91 I/O β€” User I/O pin
Pin 92 I/O β€” User I/O pin
Pin 93 I/O β€” User I/O pin
Pin 94 I/O β€” User I/O pin
Pin 95 I/O β€” User I/O pin
Pin 96 VCC β€” +3.3 V supply
Pin 97 I/O β€” User I/O pin
Pin 98 I/O β€” User I/O pin
Pin 99 I/O β€” User I/O pin
Pin 100 I/O β€” User I/O pin
Pin 101 I/O β€” User I/O pin
Pin 102 I/O β€” User I/O pin
Pin 103 I/O β€” User I/O pin
Pin 104 I/O β€” User I/O pin
Pin 105 I/O β€” User I/O pin
Pin 106 I/O β€” User I/O pin
Pin 107 I/O β€” User I/O pin
Pin 108 I/O β€” User I/O pin
Pin 109 I/O β€” User I/O pin
Pin 110 I/O β€” User I/O pin
Pin 111 I/O β€” User I/O pin
Pin 112 I/O β€” User I/O pin
Pin 113 I/O β€” User I/O pin
Pin 114 I/O β€” User I/O pin
Pin 115 I/O β€” User I/O pin
Pin 116 I/O β€” User I/O pin
Pin 117 I/O β€” User I/O pin
Pin 118 I/O β€” User I/O pin
Pin 119 I/O β€” User I/O pin
Pin 120 GND β€” Ground
Pin 121 I/O β€” User I/O pin
Pin 122 I/O β€” User I/O pin
Pin 123 I/O β€” User I/O pin
Pin 124 I/O β€” User I/O pin
Pin 125 I/O β€” User I/O pin
Pin 126 I/O β€” User I/O pin
Pin 127 I/O β€” User I/O pin
Pin 128 I/O β€” User I/O pin
Pin 129 I/O β€” User I/O pin
Pin 130 I/O β€” User I/O pin
Pin 131 I/O β€” User I/O pin
Pin 132 I/O β€” User I/O pin
Pin 133 I/O β€” User I/O pin
Pin 134 I/O β€” User I/O pin
Pin 135 I/O β€” User I/O pin
Pin 136 I/O β€” User I/O pin
Pin 137 I/O β€” User I/O pin
Pin 138 I/O β€” User I/O pin
Pin 139 I/O β€” User I/O pin
Pin 140 I/O β€” User I/O pin
Pin 141 INIT β€” Configuration initialization (open-drain)
Pin 142 VCC β€” +3.3 V supply
Pin 143 RESET β€” Configuration reset (active-low)
Pin 144 CCLK β€” Configuration clock input

Safe Operating Area (SOA) & Thermal Characteristics

Safe Operating Area Chart Default safe operating area chart for XC3090L-8TQ144I Drain-to-Source Voltage (Vds) Drain Current (Id)

No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.

Typical Applications

XC3090L-8TQ144I is suitable for 7 applications: Industrial Glue Logic Replacement, Legacy Telecommunications Backplane Interface, Test and Measurement Instrumentation, Aerospace and Defense Retrofit Designs, Custom VLSI Prototyping and Emulation, Industrial Bus Interface Bridges, Long-Lifecycle Medical Device Controllers.

🏭

Industrial Glue Logic Replacement

The XC3090L-8TQ144I replaces legacy 74LS/74F discrete glue logic on industrial control boards, integrating state machines, address decoding, and bus interfacing into a single reprogrammable device. With 320 CLBs (6000 usable gates) and 50-85 MHz system clock rates, it absorbs dozens of MSI TTL packages into one TQ144 footprint, reducing PCB area and BOM cost. Industrial -40 C to +85 C grade supports factory-floor deployment. Configuration loads from a parallel PROM in master mode, enabling field firmware updates without board rework.

🌐

Legacy Telecommunications Backplane Interface

Telecommunications backplanes built in the late 1990s and early 2000s use XC3000L-series FPGAs for TDM bus multiplexing, framing, and line-interface glue. The XC3090L-8TQ144I is a direct long-lifecycle replacement, with the 3.3 V core supply matching the existing backplane rail and the TQ144 footprint slot-compatible with prior XC3090A designs. 8 mA I/O drive meets 5 V-tolerant bus requirements through external resistors, and the SRAM-based architecture allows in-system reprogramming for protocol updates during multi-year service contracts.

πŸ”§

Test and Measurement Instrumentation

The XC3090L-8TQ144I serves as reconfigurable timing logic, trigger sequencer, or custom pattern generator inside test-and-measurement instruments such as oscilloscopes, logic analyzers, and bench-top signal sources. Its 1.55-4.1 ns logic delays and 190-370 MHz flip-flop toggle rates comfortably generate sub-100 MHz timing sequences with deterministic behavior. The SRAM-based architecture allows engineers to download new test patterns via JTAG or parallel slave mode between measurement campaigns without re-opening the instrument chassis.

✈️

Aerospace and Defense Retrofit Designs

Many aerospace platforms designed in the late 1990s use XC3000A/L-series FPGAs and require ongoing production support for spares and obsolescence management. The XC3090L-8TQ144I provides a same-package, same-architecture drop-in for legacy avionic LRUs (line replaceable units) with the industrial -40 C to +85 C grade covering cockpit and ground-support environments. Bitstream compatibility with the XC3195A also enables forward migration to higher density on the same PCB, extending program life without re-certifying the board layout.

πŸ–₯️

Custom VLSI Prototyping and Emulation

Universities and ASIC prototyping labs use XC3090L-8TQ144I devices as pre-silicon verification platforms for medium-complexity custom logic. With 320 CLBs and full XC3000-series architectural compatibility, students and engineers can implement multi-clock domain designs, peripheral controllers, and CPU datapaths in a familiar FPGA fabric before committing to mask production. The TQ144 package supports standard 0.5 mm-pitch breakout boards and educational FPGA development kits.

🏭

Industrial Bus Interface Bridges

The XC3090L-8TQ144I bridges legacy industrial buses such as ISA, VME, and parallel I/O channels to modern microcontrollers and SoCs, where the 3.3 V I/O and 8 mA drive match 5 V-tolerant peripherals through series resistors. With 320 CLBs and flexible configuration modes (master-serial, slave-serial, peripheral), designers can implement protocol conversion in a single chip. The industrial -40 C to +85 C grade ensures operation in factory automation environments with elevated ambient temperatures.

πŸ’Š

Long-Lifecycle Medical Device Controllers

Medical device manufacturers building controllers for infusion pumps, blood analyzers, and patient monitors on 15-20 year product cycles use the XC3090L-8TQ144I as a stable, mature FPGA platform. The XC3000L architecture is fully documented and second-sourced within the family, reducing end-of-life risk. The TQ144 footprint and 3.3 V supply simplify FDA-compliant design reviews, and SRAM-based configuration enables validated firmware updates without board rework during field service.

Recommended Products Summary

XC1736 Serial configuration PROM for bitstream storage Used in: Industrial Glue Logic Replacement, Test and Measurement Instrumentation, Custom VLSI Prototyping and Emulation, Long-Lifecycle Medical Device Controllers XC1765 Larger configuration PROM for multi-bitstream designs Used in: Industrial Glue Logic Replacement, Industrial Bus Interface Bridges XC3090A-8TQ144I 5 V variant for legacy 5 V-only backplanes (same TQ144 footprint) Used in: Legacy Telecommunications Backplane Interface XC3195A-8TQ144C Higher-density XC3100 family alternative for expansion Used in: Legacy Telecommunications Backplane Interface, Custom VLSI Prototyping and Emulation EPM9560RC240-15 Intel Used in: Test and Measurement Instrumentation XC3090L-8TQ144C Xilinx Used in: Aerospace and Defense Retrofit Designs XC3090L-7TQ176I Xilinx Used in: Aerospace and Defense Retrofit Designs EPM9320RC208-20 Altera Used in: Industrial Bus Interface Bridges OPA627SM Texas Instruments Used in: Long-Lifecycle Medical Device Controllers
What is the XC3090L-8TQ144I?
The XC3090L-8TQ144I is a Xilinx XC3000L-family CMOS Field Programmable Gate Array with 320 CLBs, up to 6000 usable gates, and a 5000-gate nominal equivalent count. According to the manufacturer datasheet, it ships in a 144-pin TQFP package and operates from a 3.3 V supply with 50-85 MHz system clock rates and 1.55-4.1 ns logic delays.
How many logic gates does the XC3090L-8TQ144I contain?
The XC3090L-8TQ144I provides 320 Configurable Logic Blocks (CLBs) supporting up to 6000 usable gates, with a nominal equivalent gate count of 5000. The 22 x 22 CLB array, distributed interconnect, and on-chip tri-state buffers are documented in the XC3000L family datasheet. Gate-count estimates vary by synthesis-tool assumptions; the manufacturer figure is the canonical reference.
What is the operating temperature range of the XC3090L-8TQ144I?
The XC3090L-8TQ144I carries the 'I' temperature-grade suffix and operates from -40 C to +85 C (industrial). According to the manufacturer datasheet ordering information, the suffix 'C' indicates the commercial 0 C to +70 C grade. Engineers should select the correct grade based on the target deployment environment.
What package does the XC3090L-8TQ144I use?
The XC3090L-8TQ144I is packaged in a 144-pin Thin Quad Flat Pack (TQFP, Xilinx code TQ144 / industry code LFQFP) with gull-wing leads and a square body. Pinout is identical to other XC3000A/L and XC3100A/L TQ144 variants, simplifying board-level migration within the family.
What is the difference between XC3090L and XC3090A?
The XC3090L is the low-voltage 3.3 V variant of the XC3000 family, while the XC3090A operates from 5 V. According to the manufacturer datasheet, both share identical architecture, pinout, and bitstream compatibility when packaged in the same footprint. Designers migrating a 5 V design should review I/O voltage tolerance and decoupling requirements before swapping the suffix.
How do I configure the XC3090L-8TQ144I at power-up?
The XC3090L-8TQ144I configures at power-up from an external serial or parallel PROM such as XC1736 or XC1765, controlled by the M0/M1/M2 mode pins and the DONE pin. According to Xilinx application notes, master-serial mode is the most common for standalone operation; slave-serial and peripheral modes support multi-FPGA chains and microprocessor-driven configuration respectively.
Is the XC3090L-8TQ144I pin-compatible with the XC3195A in TQ144?
Yes, the XC3000L and XC3100A families are 100% architecture and pin-out compatible in the same package, so the XC3090L-8TQ144I is pin-compatible with the XC3195A in the TQ144 footprint. Designers should note that XC3195A has more CLBs (484 vs 320), allowing logic expansion on an existing board without layout changes.
Where can I buy the XC3090L-8TQ144I online?
The XC3090L-8TQ144I can be purchased from authorized distributors such as DigiKey, Mouser, and Avnet, and from franchised brokers handling mature Xilinx silicon. As of 2026-09-13, distributor listings show limited stock reflecting the part's mature status; for production volumes, buyers should confirm lifecycle and date code with the supplier.
What is the price of the XC3090L-8TQ144I?
The XC3090L-8TQ144I lists at approximately USD 78.50 in unit quantities as of 2026-09-13 per distributor data, with volume discounts available down to roughly USD 51.95 at 1000-piece reels. Pricing varies by date code, packaging, and supplier; always request a formal quote for current market pricing and lead time.
What is the lead time for the XC3090L-8TQ144I?
The XC3090L-8TQ144I is in Not Recommended for New Designs (NRND) status, and lead time varies by supplier and inventory depth; brokers typically quote 6-12 weeks for production orders as of 2026-09-13. Buyers should confirm date code, RoHS compliance, and traceability documents with the supplier before placing volume orders.
XC3090L-8TQ144I vs XC3090L-8TQ144C - which should I choose?
The XC3090L-8TQ144I is the industrial -40 C to +85 C grade and the XC3090L-8TQ144C is the commercial 0 C to +70 C grade of the same die in the same TQ144 package. Choose the 'I' suffix for outdoor, automotive, or industrial deployments; choose the 'C' suffix for benign indoor commercial products to benefit from lower pricing.
What is the best drop-in replacement for the XC3090L-8TQ144I?
The best drop-in replacement is the XC3090L-8TQ144C, which uses the same die, package (TQ144), and pinout but with a commercial temperature grade. For higher logic capacity in the same footprint, the XC3195A-8TQ144C is also pin-compatible within the XC3000 architecture family per the manufacturer datasheet compatibility statement.
Can the XC3195A replace the XC3090L-8TQ144I directly?
Yes, the XC3195A in the TQ144 package is pin-compatible with the XC3090L-8TQ144I and uses the same XC3000-series bitstream architecture. Per Xilinx, the XC3195A offers 484 CLBs versus 320 CLBs in the XC3090L, giving more logic capacity for upward migration on existing TQ144 boards without PCB rework.
Where can I download the XC3090L-8TQ144I datasheet PDF?
The XC3090L-8TQ144I datasheet PDF is available on the Xilinx website, on distributor document portals (DigiKey, Mouser), and via the archive at datasheet4u.com. The canonical Xilinx document covers the XC3000A/L and XC3100A/L families together because they share architecture, pinout, and configuration bitstream formats.
Where can I find the XC3090L-8TQ144I pinout?
The XC3090L-8TQ144I pinout is documented in the Xilinx XC3000L datasheet package-pin tables for the TQ144 variant, including dedicated I/O bank assignments, global clock pins (GCK), configuration mode pins (M0/M1/M2), and DONE/INIT/RESET pins. Designers should also reference the Xilinx FPGA reference schematics library for the TQ144 symbol and footprint.
What is the difference between the XC3090L-8TQ144I and an EPM9560 CPLD?
The XC3090L-8TQ144I is an SRAM-based FPGA with 320 CLBs and SRAM configuration (volatile, requires external PROM), while the EPM9560 is an EEPROM-based MAX9000 CPLD with non-volatile configuration. According to manufacturer datasheets, the FPGA offers higher logic density and reprogrammability in-system; the CPLD offers instant-on behavior and simpler configuration. They are pin-compatible only by coincidence and not by design.

Engineering reference data for XC3090L-8TQ144I β€” comparison, design guidance, and compliance information.

Selection Guide

Choose the XC3090L-8TQ144I when you need a mature, second-sourced Xilinx FPGA in the TQ144 footprint with industrial -40 C to +85 C temperature grade for long-lifecycle industrial, telecom, aerospace, or medical designs. Choose the XC3090L-8TQ144C for the same architecture at lower cost when only the commercial 0-70 C range is required. Migrate to the XC3195A-8TQ144C when you need 51% more CLBs on the same PCB. Choose the XC3090L-7TQ176I only when 176 pins are available and you need the same industrial-grade silicon in a higher-I/O package. Avoid using this part in new designs unless long-term availability through franchised brokers is acceptable.

Comparison with Alternatives

Parameter This Product XC3090L-8TQ144C XC3090L-7TQ176I XC3195A-8TQ144C
Package TQFP-144 (TQ144) TQFP-144 (TQ144) - same TQFP-176 (TQ176) TQFP-144 (TQ144) - same
Brand Xilinx Xilinx Xilinx Xilinx
Family XC3000L XC3000L XC3000L XC3100A
Number of CLBs 320 320 320 484
Maximum Usable Gates 6000 6000 6000 [DATA_NEEDED]
Supply Voltage 3.3 V 3.3 V 3.3 V 5 V
Operating Temperature -40 C to +85 C (Industrial) 0 C to +70 C (Commercial) -40 C to +85 C (Industrial) 0 C to +70 C (Commercial)
System Clock Rate 50-85 MHz 50-85 MHz 50-85 MHz [DATA_NEEDED]
Lifecycle Status NRND NRND NRND NRND

Key Differentiators

  • Industrial -40 C to +85 C operating grade in same TQ144 package (vs XC3090L-8TQ144C)
  • Drop-in compatible with higher-density XC3195A on same TQ144 PCB (vs XC3195A-8TQ144C)
  • Mature 3.3 V SRAM-based FPGA with full second-source within XC3000 family (vs EPM9560RC208-15)

Design Notes

The XC3090L-8TQ144I core operates from 3.3 V (VCCINT pins 17, 32, 60, 96, 142). Place one 0.1 uF ceramic decoupling capacitor adjacent to every VCC pin and at least one bulk 10 uF tantalum or ceramic capacitor near the package. Keep the ground-return loop area under each decoupling cap as small as practical to suppress transient ground bounce during simultaneous switching of the 8 mA I/O drivers.

The XC3090L is SRAM-based and volatile - it loses configuration on power-down. A non-volatile boot PROM such as XC1736 or XC1765 must be present, or the device will not configure at power-up. The DONE pin (pin 18) is open-drain and requires an external pull-up to VCC. Mode pins M0/M1/M2 (15/16/13) must be tied to defined logic levels through 4.7 kohm resistors, not left floating.

Route the global clock pin (GCK, pin 45) as a short, impedance-controlled trace with a guard ground on both sides to limit jitter. Place the configuration clock (CCLK, pin 144) on a separate signal layer from user I/O to avoid coupling during the configuration window. Maintain 0.5 mm-pitch TQ144 breakout with via-in-pad only if the PCB fab supports it; otherwise fan out on inner layers to reduce package stress.

Compliance Information

RoHS
Unknown
REACH
Unknown
AEC-Q100
Not Applicable
Lead Free
Unknown
Halogen Free
Unknown
Conflict Minerals
Unknown

Compliance status not explicitly stated in the verified web data. XC3090L family dates from the late 1990s; lead-free and RoHS variants are typically marked with a 'Pb-free' suffix or supplied via RoHS-compliant assembly houses. Confirm with the supplier before volume purchase.

Data verified on: 2026-09-13 β€” data verified and curated by XAIPART's component engineering team

Related Searches

XC3090L-8TQ144I XC3090L-8TQ144I datasheet Xilinx XC3090L-8TQ144I XC3000L FPGA 6000 gates TQFP-144 FPGA 320 CLBs XC3090L-8TQ144I industrial FPGA XC3090L-8TQ144I vs XC3090L-8TQ144C XC3090L drop-in replacement XC3195A XC3090L-8TQ144I buy price lead time Xilinx XC3000 series NRND alternatives XC3090L configuration PROM XC1736 what is a SRAM-based FPGA XC3000

Related Components & Terms

Xilinx XC3090L-8TQ144I XC3090L XC3090A XC3195A XC3000L XC3100A XC3000A Field Programmable Gate Array FPGA Configurable Logic Block CLB TQFP-144 TQ144 LFQFP CMOS SRAM XC1736 XC1765 RoHS industrial temperature grade configuration PROM bitstream programmable logic device logic ICs
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