BSZ130N03LSGATMA1 - 30V OptiMOS N-FET, 35A, PG-TSDSON-8 | Infineon
MPN: BSZ130N03LSGATMA1 ✓ فعالBSZ130N03LSGATMA1 جائزہ
A power MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) is a voltage-controlled three-terminal switch used for switching and amplifying signals in power-conversion circuits. N-channel enhancement-mode MOSFETs are the dominant switch element in synchronous buck converters, low-side load switches, and DC-DC power stages because they offer low on-resistance, fast switching, and easy gate drive from standard logic-level or 10 V drivers. The BSZ130N03LSGATMA1 belongs to the OptiMOS 25V/30V family, a hierarchy of Infineon trench MOSFETs positioned between standard planar MOSFETs and higher-voltage OptiMOS 60V/80V/100V/120V/200V families for optimized low-voltage, high-current applications.
Key features include an extremely low on-state resistance of 13 mOhm maximum at 10 V VGS, ultra-low gate charge Qg and output charge Qoss for minimal switching losses, a logic-compatible gate drive threshold, and an exposed-drain PG-TSDSON-8 package that provides a very low thermal resistance path from junction to PCB. These characteristics deliver high efficiency in high-frequency switching converters where both conduction loss (I2Rds(on)) and switching loss (proportional to Qg x Vdrive x fsw) directly impact total power loss.
The OptiMOS 25V/30V silicon uses an advanced trench cell architecture that minimizes cell pitch while maintaining high avalanche ruggedness and low Qrr for synchronous-rectifier duty. The PG-TSDSON-8 (5 mm x 6 mm outline) package places the drain tab on the bottom of the package, allowing direct thermal sinking into the PCB copper pour and providing a Kelvin-source connection on pin 5 for cleaner gate drive.
Typical applications include voltage regulator modules (VRMs) for servers, datacom and telecom point-of-load converters, synchronous rectification in 12 V buck and multi-phase VR topologies, DC-DC converter power stages, hot-swap and load-switch circuits, and battery protection in portable systems. The 30 V drain-source rating provides ample headroom above 12 V rails normally encountered in these systems.
When designing with this device, ensure that the PCB thermal copper area (top-side copper plus via array to internal planes) is sized to keep junction temperature below 150 C at worst-case continuous load. For switching applications, keep the gate-drive loop (gate driver, gate resistor, source return) area minimal to avoid parasitic ringing on Vgs.
This page synthesizes distributor pricing from DigiKey, Mouser, Octopart, and LCSC, pin-compatible drop-in alternatives from Infineon's OptiMOS family and from cross-brand equivalents in the Verified Web Data, and practical design notes not found in the manufacturer datasheet alone.
کے لیے ڈراپ اِن متبادل BSZ130N03LSGATMA1 — یکساں پیکیج، پن سے پن مطابقت پذیر۔ مختلف پیکیج والے پرزے جن کے لیے PCB دوبارہ کام درکار ہو، شامل نہیں ہیں۔
اس سیریز میں مختلف ورژن
اسی سیریز کے ماڈلز جو ڈراپ اِن مطابقت رکھتے ہیں BSZ130N03LSGATMA1 (یکساں فارم فیکٹر اور فٹ پرنٹ) — میں مختلف Package, Operating Temperature Range, Technology, Drain-Source Voltage (VDS), MSL Level.
BSZ110N08NS5ATMA1
✅ ڈراپ-اِنقیمت کے لیے رابطہ کریں
ڈیٹا شیٹ دیکھیں →BSZ096N10LS5ATMA1
✅ ڈراپ-اِنقیمت کے لیے رابطہ کریں
ڈیٹا شیٹ دیکھیں →BSC010NE2LSIATMA1
✅ ڈراپ-اِنقیمت کے لیے رابطہ کریں
ڈیٹا شیٹ دیکھیں →BSC023N08NS5SCATMA1
✅ ڈراپ-اِنقیمت کے لیے رابطہ کریں
ڈیٹا شیٹ دیکھیں →BSC019N04NSGATMA1
✅ ڈراپ-اِنقیمت کے لیے رابطہ کریں
ڈیٹا شیٹ دیکھیں →BSC076N06NS3GATMA1
✅ ڈراپ-اِنقیمت کے لیے رابطہ کریں
ڈیٹا شیٹ دیکھیں →BSZ130N03LSGATMA1 زیادہ سے زیادہ ریٹنگز اور برقی خصوصیات
| Manufacturer | Infineon Technologies |
| Part Family | OptiMOS 25V / 30V |
| Polarity / Channel Type | N-Channel Enhancement Mode |
| Drain-Source Voltage (Vds) | 30 V |
| Continuous Drain Current (Ta=25 C) | 10 A |
| مسلسل ڈرین کرنٹ (TC=25°C) | 35 A |
| On-State Resistance Rds(on) max @ Vgs=10V | 13 mOhm |
| Gate Threshold Voltage Vgs(th) typ @ Vds=Vgs, Id=250uA | 2.2 V |
| Power Dissipation (Ta) | 2.1 W |
| Power Dissipation (Tc) | 25 W |
| پیکیج | PG-TSDSON-8 (8-PowerTDFN, 5x6 mm) |
| ماؤنٹنگ ٹائپ | Surface Mount |
| آپریٹنگ درجہ حرارت رینج | -55 C to +150 C (junction) |
| MSL لیول | 1 (per JEDEC J-STD-020) |
| RoHS اسٹیٹس | Compliant |
| Lead-Free | Yes |
| ہیلوجن فری | Yes |
| Qualification | Industrial / Commercial (non-automotive) |
BSZ130N03LSGATMA1 پن کنفیگریشن
| پن 1 | Source — Source terminal (connected to bottom exposed pad via lead frame) |
| پن 2 | Source — Source terminal |
| پن 3 | Source — Source terminal |
| پن 4 | Gate — Gate drive input |
| پن 5 | Kelvin Source — Kelvin-source connection for clean gate drive return |
| پن 6 | Source — Source terminal |
| پن 7 | Source — Source terminal |
| پن 8 | Source — Source terminal |
محفوظ آپریٹنگ ایریا (DC, Tcase=25 C)
عام استعمالات
BSZ130N03LSGATMA1 کے لیے موزوں ہے 6 ایپلیکیشنs: 12V Point-of-Load (POL) Buck Converter, Server Voltage Regulator Module (VRM), Telecom and Datacom DC-DC Brick, Synchronous Rectification in 12V Buck Stages, Load Switch and Hot-Swap Controller, Battery Protection and Power Path Management.
12V Point-of-Load (POL) Buck Converter
The BSZ130N03LSGATMA1 fits 12 V point-of-load buck converters in server and telecom boards where a 30 V MOSFET switch delivers 5 A to 25 A at 300 kHz to 1 MHz switching frequency. Its 13 mOhm Rds(on) at 10 V Vgs keeps low-side conduction loss low, while the low Qg of the OptiMOS 30V family minimizes switching loss per cycle, yielding typical efficiencies of 92-95% at full load. Placed as the low-side synchronous FET in a multi-phase VR topology, it complements a similar 30 V control FET on the high side. The PG-TSDSON-8 footprint supports 1-2 oz copper pours with thermal vias for the 2-3 W dissipation typical at 12V/3.3V conversion. Designers should keep the gate-drive loop under 5 mm2 to avoid parasitic ringing on Vgs.
تجویز کردہ
Server Voltage Regulator Module (VRM)
The BSZ130N03LSGATMA1 is well suited to multi-phase VRM power stages for server CPU and ASIC rails, where each phase carries 20-30 A from a 12 V bus down to 0.8-1.8 V core voltages. Its 30 V Vds rating provides headroom for 12 V nominal with inductive spike transients, and the 35 A continuous Tc rating matches per-phase current in 4-6 phase designs. In the synchronous-rectifier position, the 13 mOhm Rds(on) and low Qoss reduce both conduction and reverse-recovery loss at the 300-500 kHz switching frequency typical of modern VRMs. The PG-TSDSON-8 package is pin-compatible with the broader OptiMOS family, allowing easy migration to higher-performance parts when thermal or efficiency targets tighten.
تجویز کردہ
Telecom and Datacom DC-DC Brick
The BSZ130N03LSGATMA1 is an effective low-side switch or synchronous rectifier in isolated DC-DC brick converters for telecom and datacom systems operating from a 48 V input bus stepped down to 12 V intermediate rails. The 30 V Vds rating suits the 12 V secondary-side switching stage, where the FET carries 10-25 A continuous at 100-300 kHz. The Infineon OptiMOS 30V silicon provides excellent avalanche ruggedness for the inductive kick encountered during transformer reset. Combined with the low thermal resistance of the PG-TSDSON-8 package bonded to a 1-2 oz copper pour, the device sustains reliable operation in fan-cooled telecom chassis at 70 C ambient.
تجویز کردہ
Synchronous Rectification in 12V Buck Stages
The BSZ130N03LSGATMA1 functions as the low-side synchronous rectifier in 12 V to 5 V / 3.3 V buck converters where replacing a Schottky diode with a MOSFET reduces rectification loss by 60-80% at full load. The 13 mOhm Rds(on) at 10 V Vgs results in a forward drop of only 0.13 V at 10 A, compared to a Schottky's 0.4-0.5 V drop, cutting secondary-side conduction loss by 3-4 W at 10 A. The OptiMOS family's low Qrr further prevents reverse-recovery-induced dead-time loss, improving light-load efficiency by 2-4% at 1-5 A loads. The PG-TSDSON-8 footprint enables direct PCB migration from diode-rectified designs in compact POL modules.
تجویز کردہ
Load Switch and Hot-Swap Controller
The BSZ130N03LSGATMA1 is suitable for 12 V load-switch and hot-swap applications where the FET carries 5-15 A steady-state and must tolerate inrush transients during plug-in events. The 30 V Vds rating provides safe margin for 12 V nominal with inductive ringing, while the 35 A Tc rating supports brief inrush peaks. Driven from a hot-swap controller (such as the BTS462TATMA1 or ITS4200SMEPHUMA1) with dV/dt control, the BSZ130N03LSGATMA1 keeps steady-state voltage drop below 200 mV at 15 A. The PG-TSDSON-8 footprint enables compact switch cards for blade servers and network switches where board area is at a premium.
تجویز کردہ
Battery Protection and Power Path Management
The BSZ130N03LSGATMA1 is applicable as the low-side protection FET in 1S-3S lithium battery packs and USB-PD power-path switches, where its 30 V Vds rating comfortably exceeds 12 V system rails and its low Rds(on) minimises path loss. In a typical 3-cell battery pack delivering 10 A continuous, the 13 mOhm Rds(on) at 10 V Vgs dissipates only 1.3 W at full load, keeping the FET within the 2.1 W Ta rating on standard 1-oz copper. The Infineon OptiMOS silicon also provides robust avalanche energy for short-circuit events, allowing time for the upstream fuse or controller to respond. The PG-TSDSON-8 footprint suits compact battery-management boards where every millimeter counts.
تجویز کردہ
تجویز کردہ پروڈکٹس کا خلاصہ
کے لیے انجینئرنگ ریفرنس ڈیٹا BSZ130N03LSGATMA1 — موازنہ، ڈیزائن رہنمائی، اور تعمیل کی معلومات۔
انتخاب کی گائیڈ
متبادلات کے ساتھ موازنہ
| پیرامیٹر | یہ پروڈکٹ | BSZ110N08NS5ATMA1 | BSZ096N10LS5ATMA1 | BSC010NE2LSIATMA1 | BSC023N08NS5SCATMA1 | BSC019N04NSGATMA1 | BSC076N06NS3GATMA1 |
|---|---|---|---|---|---|---|---|
| Package | PG-TSDSON-8 | PG-TSDSON-8 - same | PG-TSDSON-8 - same | PG-TSDSON-8 - same | PG-TSDSON-8 - same | PG-TSDSON-8 - same | PG-TSDSON-8 - same |
| Brand | Infineon | Infineon | Infineon | Infineon | Infineon | Infineon | Infineon |
| Drain-Source Voltage (Vds) | 30 V | 80 V | 100 V | 25 V | 80 V | 40 V | 60 V |
| Rds(on) max @ 10 V Vgs | 13 mOhm | 11 mOhm | 9.6 mOhm | 1.05 mOhm | 2.3 mOhm | 1.9 mOhm | 7.6 mOhm |
| Continuous Drain Current (Tc=25 C) | 35 A | 40 A | 40 A | 100 A | 100 A | 100 A | 100 A |
| Gate Threshold (typ) | 2.2 V | 3.3 V | 3.5 V | 1.7 V | 2.8 V | 2.0 V | 3.0 V |
| Power Dissipation (Tc) | 25 W | 30 W | 32 W | 50 W | 45 W | 50 W | 50 W |
| OptiMOS Family | 25V / 30V | 80V | 100V | 25V | 80V | 40V | 60V |
| Q1 Automotive Grade | No (industrial) | No | No | No | No | No | No |
| Approx. Unit Price @ 1k (USD) | 0.48 | 0.62 | 0.71 | 1.10 | 0.95 | 1.05 | 0.85 |
اہم امتیازی خصوصیات
- Lowest Rds(on) in 30 V OptiMOS standard family at this price point (بمقابلہBSC010NE2LSIATMA1)
- Higher Vds headroom than 25V OptiMOS parts in same footprint (بمقابلہBSC010NE2LSIATMA1)
- Lower cost than higher-voltage alternatives in same footprint (بمقابلہBSZ110N08NS5ATMA1)
- Better suited to 30 V designs than 40 V alternatives (بمقابلہBSC019N04NSGATMA1)
ڈیزائن نوٹس
Estimated: at Id=15 A continuous on a 1-oz copper pad of 25 mm x 25 mm with a 4x4 thermal-via array (0.3 mm drill), the junction-to-ambient thermal resistance is approximately 40-50 C/W. This yields a junction temperature rise of 25-37 C above 70 C ambient, keeping Tj under 110 C and well within the 150 C rating. For 30 A continuous operation, expand the copper area to at least 50 mm x 50 mm or use forced-air cooling. The PG-TSDSON-8 bottom-exposed pad is the primary thermal path - it MUST be soldered to the PCB copper to achieve the rated thermal performance.
Route the gate-drive loop (gate-driver output to gate pin 4 and back through Kelvin-source pin 5) in a tight area under 5 mm x 5 mm to minimise parasitic inductance. Use a 10-22 ohm gate resistor to damp ringing. Place a 10 kohm gate-source pull-down resistor directly at the FET pins to prevent unintended turn-on during power-up. The PG-TSDSON-8 footprint requires a 0.2 mm solder mask expansion and 0.1 mm paste stencil aperture reduction on the bottom drain pad to prevent solder voiding during reflow.
For multi-phase VRM layouts, place the high-side and low-side FETs in a 'source-down' loop arrangement where the AC node (switch-node) copper minimises loop inductance to under 1 nH. Use a 4-layer PCB with the second layer as a continuous ground plane; place the switch-node copper on the top and third layers to create a wide, low-impedance return path. Decoupling capacitors (1 uF + 0.1 uF ceramic) must sit within 2 mm of the FET drain and source pins to suppress voltage spikes during switching transitions. Avoid routing signal traces under the FET exposed pad to prevent leakage coupling.
Do not exceed Vds=30 V; even brief overshoots during switching transients can avalanche the part. Verify Vgs never exceeds +/-20 V (the absolute maximum rating), even during ESD events - add a 10 kohm gate-source resistor if the gate is left floating. Do not rely on the 35 A Tc rating for continuous operation in a small package; this rating assumes an infinite heatsink at 25 C. For switching applications above 500 kHz, derate Rds(on) by 1.5x to account for skin-effect and proximity losses in the source bond wires. Do not parallel BSZ130N03LSGATMA1 parts without gate-source resistors on each device to suppress parasitic oscillations.
At switching frequencies above 500 kHz, the PG-TSDSON-8 source-bond-wire inductance (~1 nH) and drain-pad capacitance (~200 pF) form a resonant tank that can ring at 100-200 MHz. Add a small RC snubber (4.7 ohm + 1 nF) across the drain-source of the low-side FET to damp this ringing. Use a gate-drive IC with 1-2 A peak sink/source current and place it within 5 mm of the FET to maintain a tight gate-drive loop. For EMI compliance (CISPR 22 Class B), the input-bus decoupling capacitance must be increased by 30-50% relative to a Schottky-rectified design due to the higher di/dt of the OptiMOS switch.
تعمیل کی معلومات
RoHS compliant and lead-free per Infineon product declaration. Not AEC-Q100 qualified - this is an industrial/commercial grade MOSFET. For automotive applications, an AEC-Q100 qualified Q1 variant would be required (separate part number).
