BSC146N10LS5ATMA1 - 100V 44A OptiMOS 5 N-MOSFET | Infineon
MPN: BSC146N10LS5ATMA1 ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $1.85 | $1.85 |
| 10 | $1.62 | $16.20 |
| 100 | $1.31 | $131.00 |
| 500 | $1.05 | $525.00 |
| 1,000 | $0.89 | $890.00 |
| 5,000 | $0.74 | $3,700.00 |
Drop-in alternatives for BSC146N10LS5ATMA1 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
BSC090N10NS5ATMA1
✅ Drop-In ⚠️ 参数待验证📋 Reference alternative (not in catalog)
BSC190N10LS5ATMA1
✅ Drop-In ⚠️ 参数待验证📋 Reference alternative (not in catalog)
BSC027N06LS5ATMA1
✅ Drop-In✓ In Stock
$0.66 / Unit
View Datasheet →IAUZ40N06S5L050ATMA1
✅ Drop-In✓ In Stock
$0.71 / Unit
View Datasheet →BSZ150N10LS3GATMA1
✅ Drop-In✓ In Stock
$0.65 / Unit
View Datasheet →BSC118N10NSGATMA1
✅ Drop-In✓ In Stock
$0.78 / Unit
View Datasheet →BSC146N10LS5ATMA1 Maximum Ratings & Electrical Characteristics
| Technology | OptiMOS 5 (logic-level) |
| Polarity / Channel Type | N-Channel |
| Drain-Source Voltage (VDS) max | 100 V |
| Continuous Drain Current (ID) at Tc=25 C | 44 A |
| RDS(on) max at VGS=10 V | 14.6 mOhm |
| Gate-Source Voltage (VGS) max | ±20 V |
| Gate Threshold Voltage (VGS(th)) | Logic-level (typ. ~1.7 V) |
| Power Dissipation (Ta) | 2.5 W |
| Power Dissipation (Tc) | 52 W |
| Operating Temperature Range | -55 C to +150 C (TJ max) |
| Package | PG-TDSON-8-6 (SuperSO8 5x6 mm) |
| Mounting Type | Surface Mount |
| MSL Level | 1 (per JEDEC J-STD-020) |
| RoHS Status | Compliant |
BSC146N10LS5ATMA1 Pin Configuration
| Pin 1 | Source — Source (Sense) |
| Pin 2 | Source — Source |
| Pin 3 | Source — Source |
| Pin 4 | Gate — Gate |
| Pin 5 | Drain — Drain |
| Pin 6 | Drain — Drain |
| Pin 7 | Drain — Drain |
| Pin 8 | Drain — Drain |
| Pin EP | Drain (Exposed Pad) — Drain / Thermal pad |
Safe Operating Area (estimated from datasheet family)
Typical Applications
BSC146N10LS5ATMA1 is suitable for 6 applications: 48 V Telecom Hot-Swap / OR-ing, USB-PD / Adapter Buck Synchronous Rectifier, Motor Drive Half-Bridge (eMobility, BLDC Fans), Synchronous Rectification in Isolated DC-DC Modules, 12 V / 24 V Battery Protection FET (eTools), Point-of-Load Conversion in Server / Industrial Auxiliary Rails.
48 V Telecom Hot-Swap / OR-ing
The BSC146N10LS5ATMA1's 100 V VDS provides a 2x derating margin above the 48 V telecom rail, and its 44 A ID rating handles 600 W hot-swap cards. The 14.6 mOhm RDS(on) at VGS = 10 V keeps conduction loss low for OR-ing FETs where a single device carries full load current continuously. Place a 10 kohm gate-source resistor and a TVS clamp on the drain to suppress transient overshoot during hot-plug insertion events.
Recommended
USB-PD / Adapter Buck Synchronous Rectifier
In USB-PD and laptop adapter buck stages, the BSC146N10LS5ATMA1 acts as the low-side synchronous rectifier, complementing a high-side 100 V-rated FET. Its OptiMOS 5 low RDS(on) x Qg product minimizes switching loss at 200-400 kHz switching frequencies, and the logic-level gate threshold allows direct 5 V drive from common buck controllers. The SuperSO8 footprint keeps the power loop area small, reducing parasitic inductance and ringing.
Recommended
Motor Drive Half-Bridge (eMobility, BLDC Fans)
For eMobility and small BLDC fan half-bridges on 24-48 V rails, the BSC146N10LS5ATMA1 provides the low-side switch with 14.6 mOhm RDS(on) minimizing conduction loss during PWM duty cycles up to 100 percent. Its logic-level VGS(th) eliminates the need for a gate-driver charge pump when paired with a 5 V or 12 V microcontroller PWM, reducing BOM cost. Verify SOA at the worst-case locked-rotor current pulse duration.
Recommended
Synchronous Rectification in Isolated DC-DC Modules
In isolated 48 V to 5 V or 12 V DC-DC bricks, the BSC146N10LS5ATMA1 serves as the secondary-side synchronous rectifier. Its 100 V VDS handles the reflected primary voltage plus ringing with safe margin, and the low RDS(on) reduces rectifier loss which dominates efficiency at high load currents. The SuperSO8 footprint allows dual-side cooling for higher power density in quarter-brick and sixteenth-brick form factors.
Recommended
12 V / 24 V Battery Protection FET (eTools)
For battery protection in cordless eTools operating from 12-24 V Li-ion packs, the BSC146N10LS5ATMA1 provides the load-side disconnect switch with 100 V VDS that easily exceeds any fault-mode transient voltage on the battery rail. The 14.6 mOhm RDS(on) at VGS = 10 V keeps voltage drop under 1.5 V at 100 A peak discharge, and the SuperSO8 footprint supports automated high-volume assembly.
Recommended
Point-of-Load Conversion in Server / Industrial Auxiliary Rails
In server and industrial PLC auxiliary rails converting 24-48 V down to 12 V or 5 V, the BSC146N10LS5ATMA1 acts as the switching or synchronous FET. Its OptiMOS 5 technology delivers lower RDS(on) x Qg than previous generations, enabling higher switching frequencies that shrink inductor size. The 100 V VDS rating provides robust transient immunity for hot-plug and load-dump events common in industrial environments.
Recommended
Recommended Products Summary
Engineering reference data for BSC146N10LS5ATMA1 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | BSC090N10NS5ATMA1 | BSC190N10LS5ATMA1 | BSC118N10NSGATMA1 | BSC027N06LS5ATMA1 | IAUZ40N06S5L050ATMA1 | BSZ150N10LS3GATMA1 |
|---|---|---|---|---|---|---|---|
| Package | PG-TDSON-8-6 (SuperSO8 5x6) | PG-TDSON-8-6 - same | PG-TDSON-8-6 - same | PG-TDSON-8-6 - same | PG-TDSON-8-6 - same | PG-TDSON-8-6 - same | PG-TSDSON-8 - close |
| Brand | Infineon Technologies | Infineon Technologies | Infineon Technologies | Infineon Technologies | Infineon Technologies | Infineon Technologies | Infineon Technologies |
| VDS max | 100 V | 100 V | 100 V | 100 V | 60 V | 60 V | 100 V |
| ID max (Tc=25 C) | 44 A | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] |
| RDS(on) max (VGS=10 V) | 14.6 mOhm | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] |
| Technology | OptiMOS 5 (logic-level) | OptiMOS 5 (standard-level) | OptiMOS 5 (logic-level) | OptiMOS 5 (standard-level) | OptiMOS 5 (logic-level) | OptiMOS 5 (logic-level) | OptiMOS 3 (logic-level) |
| Power Dissipation (Tc) | 52 W | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] |
| Gate Drive Level | Logic-level (typ. 1.7 V Vth) | Standard-level | Logic-level | Standard-level | Logic-level | Logic-level | Logic-level |
| RoHS Status | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
Key Differentiators
- OptiMOS 5 platform with best-in-class RDS(on) x Qg (vs BSZ150N10LS3GATMA1 (OptiMOS 3))
- Logic-level VGS(th) eliminates gate driver requirement (vs BSC118N10NSGATMA1 (standard-level))
- 100 V VDS class covers 48 V telecom and industrial buses with margin (vs BSC027N06LS5ATMA1 (60 V))
Design Notes
Estimated: at PD = 2.5 W on a standard 1 sq-in. JEDEC FR-4 2 oz copper pad, theta_JA is around 50 C/W, giving a 125 C junction temperature rise over ambient. For continuous 44 A operation at Tc = 25 C you must keep PCB dissipation well below 2.5 W; otherwise mount on a heatsink or use copper pour of at least 6 sq-cm with thermal vias. The Tc rating of 52 W assumes infinite heatsink; thermal design must combine RDS(on) loss and switching loss at your operating frequency.
Lay out the high-current loop (input cap to drain to source to input cap) as small as possible, ideally under 5 nH. Place the gate-drive return directly to the source sense pin to avoid parasitic inductance that can ring VGS during fast dV/dt events. Use a 4-layer PCB with continuous ground plane under the SuperSO8 footprint; stitch vias around the thermal pad with 0.3 mm drill on a 1.0 mm pitch grid.
Estimated: do not exceed VGS = ±20 V or risk oxide rupture; if your gate driver swings to 12 V or higher, add a 10 V Zener clamp on the gate. In high dV/dt switching applications always add a 10 kohm or larger gate-source resistor to hold the FET off during unexpected dv/dt-induced turn-on events. Do not use this part on 48 V rails without derating for transient overshoot - confirm worst-case bus spike stays below 80 V VDS for reliability margin.
The OptiMOS 5 process delivers low Qg, but at high switching frequencies the gate-charge current can still disturb shared gate-driver ground returns. Use a dedicated gate-drive return trace separate from the power source return; star-ground at the source sense pin. For paralleled MOSFETs, add individual 10-ohm gate resistors to suppress parasitic oscillation between devices. Use a ferrite bead on the gate if ringing exceeds 30 percent of VGS during turn-off.
Compliance Information
RoHS and REACH compliance per Infineon product page. Not AEC-Q100 qualified - this is a commercial/industrial MOSFET, not an automotive grade part. Halogen-free status not stated in provided data, set to unknown per data authenticity rules.