IRFH5301TRPBF - 30V 100A N-Channel HEXFET MOSFET | Infineon
MPN: IRFH5301TRPBF ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $0.84 | $0.84 |
| 10 | $0.71 | $7.10 |
| 100 | $0.58 | $58.00 |
| 500 | $0.49 | $245.00 |
| 1,000 | $0.41 | $410.00 |
| 3,000 | $0.36 | $1,080.00 |
IRFH5301TRPBF Overview
An N-channel power MOSFET is a voltage-controlled three-terminal device whose drain-source channel conductivity is modulated by a gate electric field. In modern synchronous buck converters, OR-ing stages, and battery protection circuits, the MOSFET replaces a Schottky diode or bipolar pass element to achieve dramatically lower conduction loss. The "HEXFET" cell architecture pioneered by International Rectifier (now Infineon) lays thousands of parallel cells across the die to minimize RDS(on) per unit silicon area, and the "StrongIRFET" technology line extends this approach with optimized figures of merit for 30 V-100 V rails.
Key features include 1.85 mOhm max RDS(on) at VGS=10 V, 100 A peak TC current handling, gate charge of 37 nC typical, and JEDEC-qualified reliability. The PQFN (5x6) package uses an exposed drain pad that doubles as the thermal pad, yielding a very low junction-to-case thermal resistance. Logic-level drive eliminates the need for a gate-driver charge pump in 5 V systems, simplifying PCB area and BOM cost.
Architecturally, the IRFH5301TRPBF uses a single N-channel die without an integrated Schottky or co-packaged driver. Its low Qg of 37 nC keeps switching loss low in 12 V synchronous-rectification applications, while the wide safe operating area (SOA) supports transient in-rush conditions such as bus hot-swap. Compared to a Schottky diode, the MOSFET reduces forward drop from ~0.4 V to <0.05 V at 35 A, cutting rectifier loss by an order of magnitude.
Typical applications include OR-ing MOSFETs in 12 V redundant power buses, synchronous rectifiers for buck converters, battery-operated DC motor inverters, and in-rush current limiters on plug-in cards. The 30 V rating also makes it ideal for low-side switching in USB-PD, PoE, and e-fuse subsystems.
When designing with this part, ensure the gate drive rise/fall times are fast enough to avoid linear-region heating, and use a Kelvin-source connection when high di/dt is expected. The exposed pad must be soldered to a sufficient copper area (>=1 sq inch) to keep the junction within its thermal rating under full load.
This page synthesizes distributor pricing, drop-in alternatives in the same PQFN (5x6) footprint, and practical PCB thermal notes that are not present in the manufacturer datasheet.
Drop-in alternatives for IRFH5301TRPBF — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with IRFH5301TRPBF (same form factor and footprint) — differing in Operating Temperature Range, Package, Technology, Drain-to-Source Voltage (VDS), Qualification.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
BSC050N04LSGATMA1
✅ Drop-In✓ In Stock
$0.41 / Unit
View Datasheet →IRF7854TRPBF
✅ Drop-In✓ In Stock
$0.48 / Unit
View Datasheet →IRFH5301TRPBF Maximum Ratings & Electrical Characteristics
| FET Type | N-Channel |
| Technology | HEXFET (StrongIRFET) |
| Drain-to-Source Voltage (VDS) | 30 V |
| Continuous Drain Current (TA, 25C) | 35 A |
| Continuous Drain Current (TC, 25C) | 100 A |
| RDS(on) Max @ VGS=10V | 1.85 mOhm |
| Total Gate Charge (Qg) | 37 nC (typical) |
| Power Dissipation (TA) | 3.6 W |
| Power Dissipation (TC) | 110 W |
| Operating Temperature Range | -55C to +150C (junction) |
| Package | PQFN (5x6 mm) Single Die |
| Mounting Type | Surface Mount |
| Gate Drive Logic Level | Optimized for 5 V VGS drive |
| RoHS / Halogen-Free | RoHS compliant, Halogen-free |
| Qualification | JEDEC standard |
IRFH5301TRPBF Pin Configuration
| Pin 1 | Gate — Gate drive input (logic-level, optimized for 5V VGS) |
| Pin 2 | Source — Source connection (Kelvin-source pin) |
| Pin 3 | Source — Source connection |
| Pin 4 | Source — Source connection |
| Pin 5 | Drain — Drain connection (also exposed thermal pad) |
Safe Operating Area (DC)
Typical Applications
IRFH5301TRPBF is suitable for 6 applications: 12V Bus OR-ing MOSFET, Synchronous Buck Converter Low-Side Switch, Battery-Operated DC Motor Inverter, Hot-Swap / In-Rush Current Limiter, USB-PD and PoE Load Switch, Telecom 12V/24V Point-of-Load Conversion.
12V Bus OR-ing MOSFET
The IRFH5301TRPBF is widely used as an OR-ing MOSFET in 12 V redundant power distribution systems (telecom, server, and industrial). Its 1.85 mOhm RDS(on) at VGS=10 V produces ~5 mV drop at 35 A, far below the ~400 mV of a Schottky diode, dramatically reducing dissipation and improving system efficiency. The logic-level VGS(th) ensures full enhancement directly from a 5 V gate driver, eliminating the need for a charge pump. The PQFN (5x6) footprint allows compact SMD placement on the rear of a power-supply PCB, with the exposed pad serving as both drain and heatsink. Compared with traditional P-channel OR-ing parts, this N-channel solution drops the high-side gate drive complexity while keeping fast reverse-current blocking for hot-swap safety. Designers should include a TVS clamp on VGS to protect against transient over-voltage during bus faults. The StrongIRFET cell design provides high avalanche energy, which is essential for OR-ing turn-off events where inductive kick-back is significant.
Recommended
Synchronous Buck Converter Low-Side Switch
In 12 V-input synchronous buck converters up to 30 A, the IRFH5301TRPBF serves as the low-side switch paired with a high-side N-channel FET. Its 37 nC total gate charge keeps switching loss minimal at 300-500 kHz switching frequencies, while the 1.85 mOhm RDS(on) reduces conduction loss to ~5 W at 35 A. The PQFN (5x6) package has a top-side exposed pad that simplifies PCB layout and doubles as a thermal via field, enabling direct heat extraction into inner copper layers. Designers favor this part because its logic-level gate drive is compatible with standard 5 V PWM controller outputs, eliminating gate-drive boost circuitry. The 100 A pulsed current capability supports inductor ripple peaks during load transients without SOA violation. Compared with DPAK-packaged FETs, the PQFN form factor reduces footprint by ~60 percent and lowers package parasitic inductance by ~50 percent, improving switching efficiency in point-of-load regulators for FPGA and ASIC power rails.
Recommended
Battery-Operated DC Motor Inverter
The IRFH5301TRPBF is a strong choice for low-voltage brushed and brushless DC motor drives used in cordless tools, drones, and battery-powered actuators. The 30 V VDS comfortably covers 6S Li-ion (25.2 V) and 12 V lead-acid bus voltages, while the 100 A pulsed rating supports motor in-rush at startup. Its low RDS(on) reduces thermal stress on the FET during stall conditions, extending reliability. Logic-level gate drive allows direct PWM control from a 3.3 V or 5 V MCU GPIO or driver, simplifying the inverter PCB. The PQFN (5x6) surface-mount package is preferred in drones and compact tools where PCB real estate and weight are at a premium. Compared to using multiple smaller MOSFETs in parallel, the single 100 A part reduces BOM count, gate-charge energy per cycle, and switching node parasitic inductance. Pair with a half-bridge gate driver such as IR2304SPBF for a complete 3-phase inverter solution.
Recommended
Hot-Swap / In-Rush Current Limiter
For plug-in card and e-fuse applications, the IRFH5301TRPBF operates as a low-side in-rush current limiter that prevents downstream bulk-capacitor surge when a board is inserted into a live backplane. With 1.85 mOhm RDS(on) and 100 A pulsed rating, it absorbs the initial charging transient with minimal heat rise. Designers operate the FET in linear mode for a few milliseconds (controlled by the gate ramp capacitor), then fully enhance it for low-loss steady-state conduction. The logic-level VGS(th) allows simple RC-based gate ramp control from a comparator circuit. The PQFN (5x6) footprint fits the standard e-fuse area on PCI-Express and ATCA backplane cards. Compared with using a mechanical relay, the MOSFET offers nanosecond turn-off on fault detection, much faster cycle life, and zero contact bounce. Add a TVS across VDS for over-voltage protection during card insertion into an inductive bus.
Recommended
USB-PD and PoE Load Switch
The IRFH5301TRPBF suits 5 V-20 V USB Power Delivery (USB-PD) and Power-over-Ethernet (PoE) load-switch designs where compact footprint and low loss are critical. Its 30 V VDS covers USB-PD extended-power-range (EPR) 28 V rails, and 1.85 mOhm RDS(on) holds dissipation under 200 mW at 5 A load, eliminating the need for a heatsink. Logic-level gate drive lets the FET be controlled directly by a Type-C controller GPIO. The PQFN (5x6) package fits within the tight Type-C connector area, including the high-current VBUS paths. Compared with traditional P-channel load switches, this N-channel part cuts conduction loss by more than 50 percent and improves thermal performance in sealed enclosures. The 100 A pulsed rating also supports downstream short-circuit detection and disconnect without exceeding SOA. Add a gate pull-down resistor to ensure default-off behavior on controller power-up.
Recommended
Telecom 12V/24V Point-of-Load Conversion
In telecom and networking infrastructure, the IRFH5301TRPBF is a workhorse for 12 V or 24 V point-of-load (POL) DC-DC converters feeding FPGAs, ASICs, and high-speed SerDes. Its 1.85 mOhm RDS(on) and 37 nC Qg enable >96 percent efficiency at 300 kHz switching frequency with continuous 20 A loads, while the 100 A pulsed rating covers transient load steps common in digital ICs. The PQFN (5x6) footprint and exposed thermal pad enable cooling through inner PCB copper layers, ideal for stacked telecom cards where top-side airflow is limited. Logic-level gate drive simplifies the bootstrap circuit on the high-side switch and reduces overall BOM cost. The StrongIRFET technology provides robust short-circuit withstand for demanding telecom reliability standards. Compared with older DPAK parts, the PQFN saves ~60 percent PCB area and reduces switching node inductance, improving transient response in the POL output.
Recommended
Recommended Products Summary
Engineering reference data for IRFH5301TRPBF — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | BSC050N04LSGATMA1 | IRF7854TRPBF |
|---|---|---|---|
| Package | PQFN (5x6) | PQFN (5x6) - same | PQFN (5x6) - same |
| Brand | Infineon Technologies | Infineon Technologies | Infineon Technologies |
| FET Type | N-Channel Single | N-Channel Single | N-Channel Single |
| Drain-to-Source Voltage (VDS) | 30 V | 40 V | 30 V |
| Continuous Drain Current (TA) | 35 A | 32 A | 30 A |
| RDS(on) Max @ VGS=10V | 1.85 mOhm | 5.0 mOhm | 3.0 mOhm |
| Gate Charge (Qg) | 37 nC | 26 nC | 32 nC |
| Technology | StrongIRFET | OptiMOS | StrongIRFET |
| Gate Drive Logic Level | Yes (5V optimized) | Yes (5V optimized) | Yes (5V optimized) |
Key Differentiators
- Lowest RDS(on) in 30V StrongIRFET PQFN (5x6) family (vs IRF7854TRPBF)
- Logic-level gate drive compatibility (vs BSC050N04LSGATMA1)
- Industry-standard PQFN (5x6) footprint (vs TO-220 packaged alternatives)
Design Notes
Estimated: At continuous 35 A load with VGS=10V and TJ=100C, the IRFH5301TRPBF dissipates approximately P = I^2 x RDS(on) = 35^2 x 0.002 = ~2.5 W in the PQFN (5x6) package. The exposed drain pad must be soldered to at least 1 square inch of 2 oz copper on the top layer, with thermal via arrays to inner copper planes, to keep junction temperature rise below 50C. For 35 A continuous at TA=25C, multi-layer PCB thermal design is essential; for pulses <100 ms, the SOA envelope shown in the datasheet permits operation up to 100 A.
Recommended: Route the gate trace as a Kelvin-source connection by tying the gate return directly to the source pad (pins 2-4) rather than to the drain tab. This eliminates the source-bond-wire inductance from the gate-drive loop and prevents gate-oscillation at high di/dt. Use a 10 ohm gate resistor and place it within 5 mm of the gate pin. Add a 100 kohm gate-to-source pull-down resistor to ensure the FET stays off during controller power-up.
Critical: Do not exceed 30 V VDS in steady state. Inductive loads such as OR-ing bus switches and motor windings can produce VDS spikes 2-3x the supply voltage at turn-off. Always include a TVS clamp (e.g., 33 V SMBJ) across VDS to VSS to protect the FET. Also verify that VGS does not exceed the +/-20 V absolute maximum - some gate-driver bootstrap circuits can exceed this during startup if not properly clamped.
Recommended: The PQFN (5x6) package has all source pins (2-4) on one side and the drain on the bottom exposed pad. Use a star-ground topology with the input bulk capacitor, output inductor, and load all returning to a single point near the source pins. Avoid routing high-current traces over the gate pad area to minimize capacitive coupling. For synchronous buck layouts, place the high-side and low-side FETs in a half-bridge configuration with a 5-10 mm gate-drive loop.
Compliance Information
RoHS compliant and halogen-free per Infineon datasheet marking ('HALOGEN FREE AND ROHS COMPLIANT, PLASTIC'). Qualified to JEDEC standard. Not AEC-Q100 qualified - not intended for automotive applications. For automotive-grade StrongIRFET equivalents, look for AU-prefixed part numbers.
