EPM5128GM883B - 128-Macrocell UV EPLD MAX 5000 | Altera
MPN: EPM5128GM883B β End of Life| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $245 | $245.00 |
| 10 | $220.5 | $2,205.00 |
| 100 | $196 | $19,600.00 |
| 500 | $176.4 | $88,200.00 |
| 1,000 | $159.25 | $159,250.00 |
Drop-in alternatives for EPM5128GM883B β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool β Select alternative parts for side-by-side comparison:
EPM5128GM883B-2
β Drop-Inπ Reference alternative (not in catalog)
EPM5128GM/883B
β Drop-Inβ In Stock
$2.1 / Unit
View Datasheet βEPM5128GM/883
β Drop-In β οΈ εζ°εΎ ιͺθ―β In Stock
$162 / Unit
View Datasheet βEPM5128GM883B Maximum Ratings & Electrical Characteristics
| Family | MAX 5000 |
| Device Type | UV EPLD (Erasable Programmable Logic Device) |
| Macrocells | 128 |
| Logic Array Blocks (LABs) | 8 |
| User I/O Pins | 52 |
| Dedicated Inputs | 7 |
| Propagation Delay (tpd) | 55 ns |
| External Clock Inputs | 1 |
| Technology | CMOS |
| Configuration Memory | UV-erasable EPROM |
| Interconnect | Programmable Interconnect Array (PIA) |
| Package | PGA-883 (ceramic pin grid array) |
| Operating Temperature | -55C to +125C (military) |
| Qualification | MIL-STD-883 Class B (suffix 883B) |
| Program/Erase Method | UV-erasable |
EPM5128GM883B Pin Configuration
| Pin 1 | I/O β User I/O pin (group A) |
| Pin 2 | I/O β User I/O pin (group A) |
| Pin 3 | I/O β User I/O pin (group A) |
| Pin 4 | I/O β User I/O pin (group A) |
| Pin 5 | I/O β User I/O pin (group A) |
| Pin 6 | I/O β User I/O pin (group A) |
| Pin 7 | I/O β User I/O pin (group A) |
| Pin 8 | I/O β User I/O pin (group A) |
| Pin 9 | VCC β +5V supply |
| Pin 10 | INPUT/DATA β Dedicated input or data pin |
| Pin 11 | INPUT/DATA β Dedicated input or data pin |
| Pin 12 | INPUT/DATA β Dedicated input or data pin |
| Pin 13 | INPUT/DATA β Dedicated input or data pin |
| Pin 14 | INPUT β Dedicated input |
| Pin 15 | INPUT β Dedicated input |
| Pin 16 | INPUT β Dedicated input |
| Pin 17 | GND β Ground |
| Pin 18 | I/O β User I/O pin (group B) |
| Pin 19 | I/O β User I/O pin (group B) |
| Pin 20 | I/O β User I/O pin (group B) |
| Pin 21 | I/O β User I/O pin (group B) |
| Pin 22 | I/O β User I/O pin (group B) |
| Pin 23 | I/O β User I/O pin (group B) |
| Pin 24 | I/O β User I/O pin (group B) |
| Pin 25 | I/O β User I/O pin (group B) |
| Pin 26 | GND β Ground |
| Pin 27 | I/O β User I/O pin (group C) |
| Pin 28 | I/O β User I/O pin (group C) |
| Pin 29 | I/O β User I/O pin (group C) |
| Pin 30 | I/O β User I/O pin (group C) |
| Pin 31 | I/O β User I/O pin (group C) |
| Pin 32 | I/O β User I/O pin (group C) |
| Pin 33 | I/O β User I/O pin (group C) |
| Pin 34 | I/O β User I/O pin (group C) |
| Pin 35 | VCC β +5V supply |
| Pin 36 | I/O β User I/O pin (group D) |
| Pin 37 | I/O β User I/O pin (group D) |
| Pin 38 | I/O β User I/O pin (group D) |
| Pin 39 | I/O β User I/O pin (group D) |
| Pin 40 | I/O β User I/O pin (group D) |
| Pin 41 | I/O β User I/O pin (group D) |
| Pin 42 | I/O β User I/O pin (group D) |
| Pin 43 | I/O β User I/O pin (group D) |
| Pin 44 | GND β Ground |
| Pin 45 | I/O β User I/O pin (group E) |
| Pin 46 | I/O β User I/O pin (group E) |
| Pin 47 | I/O β User I/O pin (group E) |
| Pin 48 | I/O β User I/O pin (group E) |
| Pin 49 | I/O β User I/O pin (group E) |
| Pin 50 | I/O β User I/O pin (group E) |
| Pin 51 | I/O β User I/O pin (group E) |
| Pin 52 | I/O β User I/O pin (group E) |
| Pin 53 | VCC β +5V supply |
| Pin 54 | I/O β User I/O pin (group F) |
| Pin 55 | I/O β User I/O pin (group F) |
| Pin 56 | I/O β User I/O pin (group F) |
| Pin 57 | I/O β User I/O pin (group F) |
| Pin 58 | I/O β User I/O pin (group F) |
| Pin 59 | I/O β User I/O pin (group F) |
| Pin 60 | I/O β User I/O pin (group F) |
| Pin 61 | I/O β User I/O pin (group F) |
| Pin 62 | GND β Ground |
| Pin 63 | I/O β User I/O pin (group G) |
| Pin 64 | I/O β User I/O pin (group G) |
| Pin 65 | I/O β User I/O pin (group G) |
| Pin 66 | I/O β User I/O pin (group G) |
| Pin 67 | I/O β User I/O pin (group G) |
| Pin 68 | I/O β User I/O pin (group G) |
| Pin 69 | I/O β User I/O pin (group G) |
| Pin 70 | I/O β User I/O pin (group G) |
| Pin 71 | VCC β +5V supply |
| Pin 72 | I/O β User I/O pin (group H) |
| Pin 73 | I/O β User I/O pin (group H) |
| Pin 74 | I/O β User I/O pin (group H) |
| Pin 75 | I/O β User I/O pin (group H) |
| Pin 76 | I/O β User I/O pin (group H) |
| Pin 77 | I/O β User I/O pin (group H) |
| Pin 78 | I/O β User I/O pin (group H) |
| Pin 79 | I/O β User I/O pin (group H) |
| Pin 80 | GND β Ground |
| Pin 81 | INPUT β Dedicated input |
| Pin 82 | INPUT β Dedicated input |
| Pin 83 | INPUT β Dedicated input |
| Pin 84 | INPUT/CLK β Dedicated input or global clock |
| Pin 85 | I/O β User I/O pin (group I) |
| Pin 86 | I/O β User I/O pin (group I) |
| Pin 87 | I/O β User I/O pin (group I) |
| Pin 88 | I/O β User I/O pin (group I) |
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
EPM5128GM883B is suitable for 6 applications: Military Avionics Control Logic, Industrial Control Glue Logic, Bus Interface Adapter, Aerospace Satellite Subsystems, State Machine Controllers, Address Decoding Logic.
Military Avionics Control Logic
The EPM5128GM883B fits military avionics because its MIL-STD-883 Class B qualification, -55C to +125C operating range, and ceramic PGA-883 package meet the harsh-environment requirements of airborne platforms. Its 128 macrocells provide enough logic density for flight-control glue logic, sensor interface conditioning, and discrete-to-bus conversion circuits. The 55 ns propagation delay is acceptable for sub-MHz control loops where deterministic timing matters more than raw speed.
Recommended
Industrial Control Glue Logic
In industrial automation systems, the EPM5128GM883B replaces discrete TTL/CMOS glue logic arrays with a single programmable device. Its 52 I/O and 7 dedicated inputs handle multiple sensor inputs, control outputs, and bus interfaces. UV-erasable programmability allows field reconfiguration with a UV eraser, which is valuable for long-lifecycle industrial programs that span decades. The CMOS technology keeps quiescent current low for 24V-powered control cabinets.
Recommended
Bus Interface Adapter
The EPM5128GM883B serves as a bus interface adapter for legacy microprocessor systems, providing address decoding, wait-state generation, and protocol translation between incompatible bus standards. Its 128 macrocells handle full 24-bit address decoders with chip-select outputs and handshake logic. The PIA architecture delivers uniform interconnect delay, simplifying worst-case timing calculations for asynchronous bus cycles in 68k and x86 legacy platforms.
Recommended
Aerospace Satellite Subsystems
The EPM5128GM883B suits satellite subsystems requiring radiation-tolerant characteristics through its MIL-STD-883 Class B screening and ceramic hermetic PGA-883 package. Its 128 macrocells are sufficient for telemetry encoding, command decryption glue logic, and power-system sequencing in low-earth-orbit and geosynchronous platforms. UV-EPROM configuration is non-volatile and immune to configuration upsets that affect SRAM-based FPGAs in radiation environments.
Recommended
State Machine Controllers
Designers use the EPM5128GM883B to implement complex state machines for protocol handlers, sequencers, and finite-state control systems. Its macrocell flip-flops with product-term-based logic allow state encoding and transition equations to be implemented in a single device without external MSI glue. The deterministic PIA delay ensures state transitions occur at predictable intervals, eliminating metastability risks common in asynchronous FPGA designs.
Recommended
Address Decoding Logic
The EPM5128GM883B excels at memory and peripheral address decoding for 16-bit and 32-bit microprocessors. Its 52 I/O can drive 24-bit address inputs plus multiple chip-select outputs, replacing banks of 74LS138 decoder chips. The 55 ns propagation delay is compatible with 8-12 MHz microprocessors such as the 8086, 68k, and early ARM cores where propagation delay is a small fraction of the bus cycle.
Recommended
Recommended Products Summary
Engineering reference data for EPM5128GM883B β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | EPM5128GM883B-2 | EPM5128GM/883B | EPM5128GM/883 |
|---|---|---|---|---|
| Package | PGA-883 (ceramic) | PGA-883 (ceramic) - same | PGA-883 (ceramic) - same | PGA-883 (ceramic) - same |
| Brand | Altera | Altera | Altera | Altera |
| Macrocells | 128 | 128 | 128 | 128 |
| User I/O | 52 | 52 | 52 | 52 |
| Propagation Delay (tpd) | 55 ns | 45 ns (-18%) | 55 ns (same) | 55 ns (same) |
| MIL-STD-883 Class | Class B | Class B | Class B | Class B (equivalent) |
| LABs | 8 | 8 | 8 | 8 |
| Dedicated Inputs | 7 | 7 | 7 | 7 |
| Unit Price (qty 1, as of 2026-09-12) | $245.00 | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] |
Key Differentiators
- Faster speed-grade option in same package (vs EPM5128GM883B-2)
- MIL-STD-883 Class B screening (vs EPM5128GI (industrial-grade))
- UV-erasable, non-volatile configuration (vs MAX 7000 SRAM-based CPLDs)
Design Notes
The PGA-883 package requires through-hole sockets or pin-grid-array PCB footprints with plated through-holes on a 2.54 mm grid. For prototype builds, use a machined-pin PGA socket to allow device removal for UV erasure. For production builds, solder the device directly to the PCB using wave or hand soldering processes consistent with MIL-STD-883 assembly requirements. Maintain clearance around the ceramic package for thermal expansion and inspect solder joints per IPC-A-610 Class 3.
Programming the EPM5128GM883B requires a UV eraser because the device uses UV-erasable EPROM cells. A quartz window on the top of the PGA-883 package allows UV-C exposure for approximately 20 minutes for full erasure. Standard room fluorescent lighting does not erase the device, but cover the window during programming to prevent accidental erasure. Verify programming voltages and timing against the Altera MAX 5000 programming specification.
The EPM5128GM883B operates over -55C to +125C case temperature in military applications. Decoupling capacitors (one 0.1 uF ceramic per VCC pin and one 10 uF tantalum bulk per supply) must be placed within 5 mm of each VCC pin to suppress switching noise. The PGA-883 ceramic package provides low thermal resistance and can dissipate CMOS switching power without a heatsink in most designs, but verify junction temperature with derating curves for high-utilization designs.
Compliance Information
PGA-883 ceramic military package contains lead-based solder terminators and is not RoHS compliant. MIL-STD-883 Class B qualification per suffix 883B. Not applicable for AEC-Q100 (military/aerospace grade, not automotive).
