10AS066H2F34I2LG - Arria 10 SX SoC FPGA, 660K LE | Intel
MPN: 10AS066H2F34I2LG ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $12500 | $12,500.00 |
| 10 | $12100 | $121,000.00 |
| 100 | $11750 | $1,175,000.00 |
| 500 | $11400 | $5,700,000.00 |
| 1,000 | $11050 | $11,050,000.00 |
Drop-in alternatives for 10AS066H2F34I2LG — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
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10AS066H2F34I1HG
✅ Drop-In✓ In Stock
$3500 / Unit
View Datasheet →10AS066H2F34E2SG
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View Datasheet →10AS066H2F34E2LG
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$3250 / Unit
View Datasheet →10AS066H1F34I1HG
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$3720 / Unit
View Datasheet →10AS066H2F34E1HG
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View Datasheet →10AS066H2F34I2LG Maximum Ratings & Electrical Characteristics
| Manufacturer | Intel (formerly Altera) |
| Series | Arria 10 SX |
| Device Variant | 10AS066 |
| Logic Elements | 660,000 |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight |
| Process Technology | 20 nm |
| Core Supply Voltage | 0.9 V |
| Package | 1152-ball FC-FBGA (F34), 35 mm x 35 mm |
| Ball Pitch | 1.0 mm |
| Temperature Grade | Industrial (-40 C to +100 C ambient) |
| RoHS Status | Compliant |
| Lead-Free | Yes |
10AS066H2F34I2LG 1152-ball fc-fbga (f34), 35 mm x 35 mm Pin Configuration Guide
Complete pinout information for 10AS066H2F34I2LG (1152-ball fc-fbga (f34), 35 mm x 35 mm package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for 10AS066H2F34I2LG.
Refer to the datasheet for full pin configuration.
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
10AS066H2F34I2LG is suitable for 6 applications: Wireless Baseband Processing, Software-Defined Radio (SDR), Industrial Machine Vision Systems, Test and Measurement Instrumentation, Broadcast Video Processing, Medical Imaging Equipment.
Wireless Baseband Processing
The 10AS066H2F34I2LG fits wireless baseband processing because its 660K logic elements support multi-channel LTE/5G PHY layer datapath, while the integrated dual ARM Cortex-A9 MPCore runs the MAC scheduler and protocol stack. The Arria 10 SX fabric at the -2 speed grade achieves Fmax typically above 400 MHz, sufficient for CPRI and JESD204B interface implementations. According to the Arria 10 device handbook, the transceiver channels support multi-gigabit serial links to RFICs and data converters. Designers place the device between ADC/DAC banks and the host CPU, with Linux running on the HPS for control-plane tasks and FPGA fabric handling the real-time PHY.
Recommended
Software-Defined Radio (SDR)
The 10AS066H2F34I2LG is well suited to software-defined radio platforms where FPGA fabric performs high-sample-rate DSP and the ARM HPS runs GNU Radio or custom SDR control software. The dual Cortex-A9 cores provide sufficient headroom for Linux + SDR framework while the 660K logic elements implement FFTs, channelizers, and modulation/demodulation. Arria 10 SX transceivers handle ADC/DAC data at gigabit rates. Per Intel reference designs, the F34 FC-FBGA package supports enough transceiver channels for multi-antenna MIMO. The industrial temperature grade also suits military and outdoor SDR deployments.
Recommended
Industrial Machine Vision Systems
The 10AS066H2F34I2LG powers high-speed industrial machine vision by processing image sensor data in the FPGA fabric while the ARM HPS runs inspection algorithms and connects to factory networks. The 660K logic elements support multi-lane MIPI-CSI or LVDS image sensor aggregation, while the dual Cortex-A9 can run OpenCV-based defect detection. Industrial temperature grade (-40 C to +100 C ambient) supports factory-floor operation. The FPGA fabric typically implements Bayer demosaic, HDR merging, and real-time compression at frame rates above 60 fps.
Recommended
Test and Measurement Instrumentation
The 10AS066H2F34I2LG supports modular test and measurement instruments such as oscilloscopes, signal analyzers, and protocol analyzers because the FPGA fabric handles real-time waveform processing while the HPS runs Linux for UI, networking, and remote control. The 660K logic elements support parallel DSP for FFT, decimation, and trigger logic, and the Arria 10 transceivers interface to high-speed ADCs. According to vendor reference designs, the F34 BGA also exposes PCIe Gen3 x8 lanes for host backplane connectivity in PXI or AXIe chassis.
Recommended
Broadcast Video Processing
The 10AS066H2F34I2LG handles broadcast video processing such as HEVC/H.265 encoding, video routing, and color space conversion because the FPGA fabric implements parallel pixel processing and the dual Cortex-A9 manages stream multiplexing. The Arria 10 SX device family supports 12G-SDI and DisplayPort through its transceiver channels, while 660K logic elements sustain multi-stream 4K processing. The integrated HPS reduces board area and BOM compared with a discrete CPU + FPGA solution, which is valuable in broadcast studio and outside-broadcast equipment where space is constrained.
Recommended
Medical Imaging Equipment
The 10AS066H2F34I2LG supports medical imaging systems such as ultrasound, CT, and MRI preprocessing where the FPGA fabric performs beamforming and image reconstruction while the HPS handles patient interface and DICOM networking. The 660K logic elements allow real-time processing of multiple transducer channels, and the Arria 10 transceivers connect to high-channel-count ADC arrays. AiPCBA's datasheet summary notes this device is qualified for medical use, supporting IEC 60601-1 system designs when paired with appropriate isolation and power architecture.
Recommended
Recommended Products Summary
Engineering reference data for 10AS066H2F34I2LG — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | 10AS066H2F34I1HG | 10AS066H2F34E2SG | 10AS066H2F34E2LG | 10AS066H1F34I1HG | 10AS066H2F34E1HG |
|---|---|---|---|---|---|---|
| Brand | Altera (Intel) | Altera (Intel) | Altera (Intel) | Altera (Intel) | Altera (Intel) | Altera (Intel) |
| Package | 1152-FBGA (F34) 35x35 mm | 1152-FBGA (F34) 35x35 mm - same | 1152-FBGA (F34) 35x35 mm - same | 1152-FBGA (F34) 35x35 mm - same | 1152-FBGA (F34) 35x35 mm - same | 1152-FBGA (F34) 35x35 mm - same |
| Logic Elements | 660,000 | 660,000 | 660,000 | 660,000 | 660,000 | 660,000 |
| Speed Grade | -2 | -1 | -2 | -2 | -1 | -1 |
| Temperature Grade | Industrial (-40 C to +100 C) | Industrial | Extended | Extended | Industrial | Extended |
| Hard Processor System | Dual ARM Cortex-A9 | Dual ARM Cortex-A9 | Dual ARM Cortex-A9 | Dual ARM Cortex-A9 | Dual ARM Cortex-A9 | Dual ARM Cortex-A9 |
| Process Technology | 20 nm | 20 nm | 20 nm | 20 nm | 20 nm | 20 nm |
| Lifecycle Status (2026) | Extended product support | Extended product support | Extended product support | Extended product support | Extended product support | Extended product support |
Key Differentiators
- Same F34 BGA footprint with higher speed grade (vs 10AS066H2F34I1HG)
- Industrial temperature grade for cost-sensitive designs (vs 10AS066H2F34E2SG)
- Full resource set at speed grade -2 for maximum throughput (vs 10AS066H2F34E1HG)
Design Notes
The 1152-ball F34 FC-FBGA package with 1.0 mm ball pitch requires microvia or via-in-pad PCB technology for fan-out. Use a high-Tg (>=170 C) PCB material such as Megtron 6 or Rogers RO4350B for the transceiver regions to control insertion loss. Place all decoupling capacitors within 100 mils of their respective supply balls and use a power-plane stackup tuned for 0.9 V core current transients. Reference: Arria 10 PCB Design Guidelines in the device handbook.
Transceiver channels demand controlled-impedance (100 ohm differential) routing with length matching within 5 mil across lanes. Use Acorn or Saturn PCB footprints for transceiver breakouts to avoid impedance discontinuities at the BGA escape. For DDR3/DDR4 interfaces connected to the HPS, follow the Arria 10 External Memory Interface Handbook guidelines for fly-by topology, write leveling, and read deskew calibration.
The 35 mm x 35 mm F34 package dissipates between 10 W (idle) and 35 W (full fabric + transceivers + HPS). Attach a heat spreader or heatsink with thermal interface material rated for 0.1 C/W or lower. The exposed-die flip-chip BGA does not have an integrated lid, so case-to-ambient thermal resistance depends heavily on the heatsink and airflow. Estimate: at 25 W dissipation with a 1.0 C/W heatsink in still air, junction-to-ambient is approximately 4 C/W, yielding 100 C junction rise at 25 C ambient - within industrial limits but marginal.
Arria 10 is in Intel's extended-product support phase as of 2026-09-05, meaning new wafer starts are limited and most shipments come from distributor inventory. Designers committing to long production runs should negotiate last-time-buy commitments or qualify a migration path to Agilex 7 FPGAs before starting design. Note also that Quartus Prime Pro support for Arria 10 is in maintenance mode - new Quartus releases may add features for newer families but not for Arria 10.
Isolate the HPS and FPGA power domains on the PCB by using separate ferrite beads or filter networks on shared rails. This prevents high-current FPGA transients from coupling into the sensitive ARM Cortex-A9 core supply. Reference the Arria 10 Hardware Reference Manual for the power-tree diagram and recommended power-supply sequencing using a dedicated POR IC such as the LTC2934 or MAX34451.
Compliance Information
RoHS and lead-free confirmed per Altera/Intel product page. AEC-Q100 not applicable - this is a SoC FPGA, not an automotive-grade IC. Halogen-free status not explicitly stated in the verified data.
