IAUCN04S6N013TATMA1 - 40V N-Channel Automotive MOSFET | Infineon
MPN: IAUCN04S6N013TATMA1 ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $3.45 | $3.45 |
| 10 | $3.05 | $30.50 |
| 100 | $2.58 | $258.00 |
| 500 | $2.21 | $1,105.00 |
| 1,000 | $1.92 | $1,920.00 |
| 3,000 | $1.66 | $4,980.00 |
IAUCN04S6N013TATMA1 Overview
A power MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) is a voltage-controlled switch used in DC-DC converters, motor drives, and load switches. The Infineon IAUCN04S6N013T belongs to the OptiMOS™ 6 family, which is the latest generation of low-voltage MOSFETs optimised for lowest R<sub>DS(on)</sub> per mm² and best-in-class figure-of-merit (FOM = R<sub>DS(on)</sub> × Q<sub>g</sub>). As an automotive-qualified part, it also meets the broader product hierarchy: MOSFET -> discrete semiconductor -> power semiconductor -> semiconductor. N-channel MOSFETs conduct current when a positive gate-source voltage is applied and are the dominant topology for low-voltage synchronous rectification and high-side switches.
Key electrical features include a typical gate charge of 52 nC at V<sub>GS</sub> = 10 V, an input capacitance of 1.08 nF, an output capacitance of 3.7 nF, and a reverse-transfer capacitance of 51 pF. The threshold voltage V<sub>GS(th)</sub> is rated at 2.6 V (typical). The PG-LHDSO-10-1 (SSO10T) package provides an exposed top-side cooling pad, enabling direct attachment to a heatsink or cold plate for improved thermal performance in compact automotive modules.
Typical applications include 12 V automotive ECU power distribution, electric power steering (EPS) motor control, braking system actuators, body and chassis electronics, and high-current DC-DC converters. The part's ultra-low 1.32 mΩ R<sub>DS(on)</sub> minimises conduction losses in high-current paths, while the AEC-Q101 qualification ensures reliability across automotive temperature and humidity stress profiles.
When designing with this device, ensure that the gate-drive voltage comfortably exceeds the maximum V<sub>GS(th)</sub> at the worst-case end of life. The exposed pad must be soldered to a sufficient copper area (typically ≥ 1 cm²) on the PCB to keep junction temperature within the 175 °C absolute maximum.
This page synthesises distributor stock, drop-in same-package alternatives from the OptiMOS™ 6 family, and practical PCB/thermal design notes that are not duplicated in the manufacturer datasheet, giving procurement and design engineers a single decision-ready reference.
Drop-in alternatives for IAUCN04S6N013TATMA1 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with IAUCN04S6N013TATMA1 (same form factor and footprint) — differing in Package, Mounting Type, Automotive Qualification, Operating Junction Temperature, Product Family.
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View Datasheet →IAUCN04S6N013TATMA1 Maximum Ratings & Electrical Characteristics
| FET Type | N-Channel |
| Drain-Source Voltage (V<sub>DS</sub>) | 40 V |
| Continuous Drain Current (I<sub>D</sub>) | 230 A at T<sub>C</sub> |
| R<sub>DS(on)</sub> (max) | 1.32 mΩ at V<sub>GS</sub> = 10 V |
| Power Dissipation (P<sub>D</sub>) | 133 W at T<sub>C</sub> |
| Gate Threshold Voltage (V<sub>GS(th)</sub>) | 2.6 V (typ) |
| Total Gate Charge (Q<sub>g</sub>) | 52 nC at V<sub>GS</sub> = 10 V |
| Input Capacitance (C<sub>iss</sub>) | 1.08 nF |
| Output Capacitance (C<sub>oss</sub>) | 3.7 nF |
| Reverse Transfer Capacitance (C<sub>rss</sub>) | 51 pF |
| Operating Junction Temperature | -55 °C to +175 °C |
| Package | PG-LHDSO-10-1 (SSO10T) |
| Mounting Type | Surface Mount |
| Automotive Qualification | AEC-Q101 |
| RoHS Status | Compliant |
IAUCN04S6N013TATMA1 Pin Configuration
| Pin 1 | Source — Source (low-side) connection - shared pin 1 of SSO10T drain-source-source layout |
| Pin 2 | Source — Source (low-side) connection |
| Pin 3 | Source — Source (low-side) connection |
| Pin 4 | Source — Source (low-side) connection |
| Pin 5 | Gate — Gate control input |
| Pin 6 | Drain — Drain (high-side) connection |
| Pin 7 | Drain — Drain (high-side) connection |
| Pin 8 | Drain — Drain (high-side) connection |
| Pin 9 | Drain — Drain (high-side) connection |
| Pin 10 | NC — Not connected (per datasheet package outline) |
Safe Operating Area (DC)
Typical Applications
IAUCN04S6N013TATMA1 is suitable for 6 applications: 12V Automotive ECU Power Distribution, Electric Power Steering (EPS) Motor Drive, Braking System Actuator Switch, High-Current DC-DC Converter (Buck/Boost), Industrial 24V Brushless DC (BLDC) Motor Drive, Battery Management System (BMS) Protection Switch.
12V Automotive ECU Power Distribution
The IAUCN04S6N013TATMA1 fits 12V automotive ECU power distribution because its 40V V<sub>DS</sub> rating provides margin above the 24V jump-start and load-dump transients, while its 1.32 mΩ R<sub>DS(on)</sub> at 10V V<sub>GS</sub> minimises conduction losses in 100A+ load-switch paths. AEC-Q101 qualification guarantees reliability across automotive temperature cycling (-55 to +175 °C) and humidity bias. Placed between the battery rail and the ECU downstream bus via a high-side switch topology with gate pulled up through a 10 kΩ resistor, it dissipates roughly 13.2 W at 100 A - half the loss of a 5 mΩ alternative. The PG-LHDSO-10-1 exposed pad enables direct PCB-copper heatsinking, critical for sealed ECU enclosures. Compared to discrete DPAK MOSFETs, it offers 50% lower R<sub>DS(on)</sub> in the same PCB footprint.
Recommended
Electric Power Steering (EPS) Motor Drive
The IAUCN04S6N013TATMA1 is suitable for EPS motor drive half-bridges due to its 230A continuous I<sub>D</sub> rating and 133W P<sub>D</sub> at T<sub>C</sub>. Its 1.32 mΩ R<sub>DS(on)</sub> keeps conduction losses low even during peak steering-assist bursts of 150 A+, preserving battery range. AEC-Q101 qualification and -55 to +175 °C T<sub>j</sub> operation handle under-hood ambient stress. Placed in a 3-phase inverter leg with complementary high-side FETs and driven by a gate driver such as 1ED3127MU12FXUMA1, the part achieves switching frequencies up to 100 kHz without thermal runaway. Compared to IGBTs, this MOSFET reduces switching losses by 5-10×, enabling quieter steering assist.
Recommended
Braking System Actuator Switch
The IAUCN04S6N013TATMA1 fits braking system actuator (ESC/ABS) solenoid drive due to its AEC-Q101 qualification and 230 A I<sub>D</sub> surge capability. Braking actuators demand short, high-current pulses (50-200 A) to actuate valves; this part's 1.32 mΩ R<sub>DS(on)</sub> minimises voltage drop across the solenoid during pulse, ensuring consistent brake force. The PG-LHDSO-10-1 (SSO10T) package with exposed thermal pad dissipates pulse heat efficiently into the brake ECU housing. Placed as a low-side switch driven by TLE94104EPXUMA1 or BTS3256DAUMA1 multi-channel drivers, it achieves sub-100 µs response time required for ABS modulation. The MOSFET's 175 °C T<sub>j(max)</sub> provides thermal margin during worst-case repeated ABS cycling.
Recommended
High-Current DC-DC Converter (Buck/Boost)
The IAUCN04S6N013TATMA1 suits high-current 12V-to-low-voltage DC-DC converters because its 1.32 mΩ R<sub>DS(on)</sub> and 52 nC Q<sub>g</sub> deliver excellent FOM (R<sub>DS(on)</sub> × Q<sub>g</sub>) for synchronous-rectifier or buck-switch positions. At 200 kHz switching and 50 A load, conduction losses are roughly 3.3 W per FET versus 6+ W for older 5 mΩ parts, improving converter efficiency by 1-2 percentage points. AEC-Q101 qualification supports automotive auxiliary rails (e.g., 12V→5V, 12V→3.3V) in ADAS modules. Placed as the low-side synchronous rectifier in a buck converter driven by XDPL8105XUMA1 or TLD5191ESXUMA1, it minimises reverse-recovery loss. The PG-LHDSO-10-1 footprint simplifies PCB layout with a single drain pad and Kelvin source connection.
Recommended
Industrial 24V Brushless DC (BLDC) Motor Drive
The IAUCN04S6N013TATMA1 fits 24V industrial BLDC motor drive half-bridges thanks to its 40 V V<sub>DS</sub> rating, 230 A I<sub>D</sub>, and 1.32 mΩ R<sub>DS(on)</sub>. Although qualified to AEC-Q101 (automotive), it operates reliably in industrial 24V systems with proper derating. At 50 A continuous motor current, conduction loss is ~3.3 W per FET, half that of a 5 mΩ alternative, improving motor efficiency and reducing heatsink size. Placed in a 3-phase inverter driven by IRS2110SPBF or IR2109SPBF gate drivers, it achieves PWM switching up to 50 kHz with clean rise/fall times due to low Q<sub>g</sub> (52 nC). The PG-LHDSO-10-1 exposed pad enables direct mounting to a metal backplane or cold plate for continuous industrial duty.
Recommended
Battery Management System (BMS) Protection Switch
The IAUCN04S6N013TATMA1 fits 12V automotive BMS protection (disconnect/reconnect) switch roles because its 1.32 mΩ R<sub>DS(on)</sub> minimises parasitic loss in the always-on battery path, preserving standby range. At 100 A continuous (typical EV 12V aux load), conduction loss is just 13.2 W, half of a 5 mΩ alternative. AEC-Q101 qualification and -55 to +175 °C T<sub>j</sub> operation handle under-hood thermal stress. Placed as a high-side disconnect switch between the 12V battery and the vehicle electrical bus, driven by TLE92633BQXXUMA2 or BTS710336ESAXUMA1, it provides fast short-circuit protection (<10 µs) via the driver's desaturation detection. The PG-LHDSO-10-1 (SSO10T) footprint simplifies PCB layout with a single drain bond pad.
Recommended
Recommended Products Summary
Engineering reference data for IAUCN04S6N013TATMA1 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | IAUC60N04S6L030HATMA1 | IAUCN04S7N037GATMA1 | IAUCN04S7N027GATMA1 | IAUCN04S7N015GATMA1 |
|---|---|---|---|---|---|
| Brand | Infineon Technologies | Infineon Technologies | Infineon Technologies | Infineon Technologies | Infineon Technologies |
| Package | PG-LHDSO-10-1 (SSO10T) | PG-LHDSO-10-1 (SSO10T) - same | PG-LHDSO-10-1 (SSO10T) - same | PG-LHDSO-10-1 (SSO10T) - same | PG-LHDSO-10-1 (SSO10T) - same |
| V<sub>DS</sub> (max) | 40 V | 40 V | 40 V | 40 V | 40 V |
| Continuous I<sub>D</sub> (T<sub>C</sub>) | 230 A | 230 A (Tc) | 230 A (Tc) | 230 A (Tc) | 230 A (Tc) |
| R<sub>DS(on)</sub> (max) @ 10V | 1.32 mΩ | 3.0 mΩ | 3.7 mΩ | 2.7 mΩ | 1.5 mΩ |
| Automotive Qualification | AEC-Q101 | AEC-Q101 | AEC-Q101 | AEC-Q101 | AEC-Q101 |
Key Differentiators
- Lowest R<sub>DS(on)</sub> in the SSO10T family at 1.32 mΩ (vs IAUC60N04S6L030HATMA1)
- AEC-Q101 qualified for safety-critical automotive applications (vs Industrial-grade 40 V MOSFETs (e.g., generic IRF parts))
- PG-LHDSO-10-1 (SSO10T) package enables top-side cooling (vs DPAK / D²PAK MOSFETs (TO-252 / TO-263))
Design Notes
Estimated: at continuous 100 A and V<sub>GS</sub>=10 V, conduction loss is P=I²×R<sub>DS(on)</sub> ≈ 100²×0.00132 = 13.2 W. The PG-LHDSO-10-1 package with exposed top-side thermal pad has a junction-to-case thermal resistance of ~1.0 °C/W (per Infineon package outline). With proper PCB copper thermal pad (≥1 cm² on top and bottom layers tied by thermal vias), junction-to-ambient thermal resistance is ~25-30 °C/W, allowing continuous 100 A operation up to ~100 °C ambient. Without sufficient copper, the part will derate severely.
Place the gate driver as close as possible to the gate pin (pin 5) to minimise gate-loop inductance. Use a 10 Ω gate resistor to dampen ringing, and add a 10 kΩ pull-down on gate to ensure the FET stays off if the driver is disconnected. The exposed thermal pad must be soldered to a continuous copper pour of at least 25 mm² on the top layer, with an array of thermal vias (0.3 mm drill, 0.6 mm pitch) connecting to inner/bottom copper layers. Keep the high-dv/dt drain node physically separated from the gate trace to avoid capacitive turn-on (Miller effect).
Do not exceed V<sub>GS</sub>=±20 V absolute maximum - use a 12V gate-drive Zener clamp. V<sub>GS(th)</sub>=2.6V typical means a 5V logic drive may NOT fully enhance the FET, leaving it in the linear region with high loss - always drive with ≥10V. For PWM dimming or variable-frequency operation, ensure the dead-time between high-side and low-side FETs is at least 50 ns to prevent shoot-through. Repeated avalanche operation beyond the datasheet EAS rating will degrade the part - add a TVS diode or snubber for inductive loads.
The 1.08 nF C<sub>iss</sub> and 51 pF C<sub>rss</sub> mean the gate drive loop must be low-inductance (<10 nH) to achieve clean switching at >50 kHz. Use a Kelvin-source connection if available (or split the source bond wires into power and signal paths) to avoid source-inductance-induced gate-voltage drops. Place a 100 nF ceramic bypass cap directly at the driver V<sub>DD</sub> pin. For very high di/dt applications, add a small ferrite bead in series with the gate to suppress ringing.
Compliance Information
AEC-Q101 (automotive, not AEC-Q100) qualified per Infineon automotive product page. RoHS and REACH compliant. Lead-free and halogen-free per Infineon material declaration.
