IAUC100N04S6N028ATMA1 - 40V 100A OptiMOS 6 N-MOSFET | Infineon
MPN: IAUC100N04S6N028ATMA1 ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $0.85 | $0.85 |
| 10 | $0.74 | $7.40 |
| 100 | $0.65 | $65.00 |
| 500 | $0.55 | $275.00 |
| 1,000 | $0.48 | $480.00 |
| 3,000 | $0.42 | $1,260.00 |
Drop-in alternatives for IAUC100N04S6N028ATMA1 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
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View Datasheet →IAUC100N04S6N028ATMA1 Maximum Ratings & Electrical Characteristics
| Manufacturer | Infineon Technologies |
| Series | OptiMOS 6 40V |
| FET Type | N-Channel |
| Technology | MOSFET (Metal Oxide) |
| Drain-Source Voltage (V_DS) | 40 V |
| Continuous Drain Current (I_D) at T_C=25°C | 100 A |
| Pulsed Drain Current (I_DM) | 400 A |
| R_DS(on) max @ V_GS=10V | 2.8 mΩ (typical) |
| Gate Threshold Voltage (V_GS(th)) | 1.5 V to 2.5 V |
| Power Dissipation (P_D) at T_C=25°C | 62 W |
| Operating Temperature Range | -55 °C to +175 °C |
| Package | PG-TDSON-8 (TDSON-8) |
| Mounting Type | Surface Mount |
| Automotive Qualified | Yes |
| RoHS Status | Compliant |
IAUC100N04S6N028ATMA1 Pin Configuration
| Pin 1 | Source — Source connection (pin 1 of TDSON-8) |
| Pin 2 | Source — Source connection |
| Pin 3 | Source — Source connection |
| Pin 4 | Gate — Gate drive input |
| Pin 5 | Source — Source connection |
| Pin 6 | Source — Source connection |
| Pin 7 | Source — Source connection |
| Pin 8 | Source — Source connection / thermal pad internally connected to drain |
Safe Operating Area (estimated from datasheet SOA curves)
Typical Applications
IAUC100N04S6N028ATMA1 is suitable for 6 applications: 12V Automotive ECU Power Rail Switching, Battery Management System (BMS) Protection FET, Synchronous Rectification in 12V DC-DC Buck Converters, Hot-Swap / Inrush Current Limiting, Electric Power Steering (EPS) Motor Drive, Industrial 24V Bus Switching and OR-ing.
12V Automotive ECU Power Rail Switching
The IAUC100N04S6N028ATMA1's 40 V V_DS rating provides comfortable margin above 12 V nominal with load-dump transients up to 35 V, while 100 A continuous drain current supports high-current rail switching in engine ECUs. Its 2.8 mΩ typical R_DS(on) keeps conduction loss under 2.8 W at typical 30 A ECU load, and the automotive qualification ensures compliance with AEC-Q101 stress tests. Place it on a 1 oz copper pour of at least 100 mm² to maintain junction temperature below 150 °C at full load.
Recommended
Battery Management System (BMS) Protection FET
In 12 V lithium-ion BMS designs, the IAUC100N04S6N028ATMA1 serves as the low-side or high-side disconnect FET with its 100 A continuous rating providing substantial margin above typical 50 A discharge currents. The 2.8 mΩ R_DS(on) limits full-load dissipation to about 3.5 W at 35 A, allowing surface-mount PCB cooling without heatsinking. Automotive qualification matches BMS reliability requirements, and the PG-TDSON-8 footprint enables compact dual-FET back-to-back layouts for charge/discharge path isolation.
Recommended
Synchronous Rectification in 12V DC-DC Buck Converters
As the low-side synchronous rectifier in 12 V-to-3.3 V buck converters, the IAUC100N04S6N028ATMA1's low R_DS(on) of 2.8 mΩ reduces rectifier conduction loss versus a Schottky diode, improving overall efficiency by 3-5% at 20 A loads. Its 40 V V_DS comfortably handles 12 V input with spike margin, and its fast switching characteristic supports switching frequencies above 500 kHz. Use a gate driver like the IRS2302STRPBF to ensure fast transition times and minimize dead-time losses.
Recommended
Hot-Swap / Inrush Current Limiting
The IAUC100N04S6N028ATMA1 serves as the hot-swap control FET in 12 V automotive distribution modules where its 100 A continuous current supports full-load insertion. The 2.8 mΩ R_DS(on) maintains low voltage drop during steady-state operation, while the PG-TDSON-8 package provides the thermal headroom needed for sustained 100 A conduction. Add a gate-source resistor (10 kΩ) and gate-drive slew-rate control to manage inrush when hot-plugging capacitive loads.
Recommended
Electric Power Steering (EPS) Motor Drive
In EPS motor inverter stages, the IAUC100N04S6N028ATMA1's 100 A continuous drain current and 400 A pulsed rating handle the peak torque demands of column-assist and rack-assist EPS systems. The 2.8 mΩ R_DS(on) minimizes inverter losses during high-torque assist, while the automotive qualification matches the stringent reliability requirements for safety-critical steering functions. Pair with a three-phase gate driver such as the 6ED003L02F2XUMA1 for a complete inverter solution.
Recommended
Industrial 24V Bus Switching and OR-ing
Although the part is rated 40 V, the IAUC100N04S6N028ATMA1 is used in 24 V industrial bus systems where its 40 V V_DS provides adequate margin for transients. Its 100 A capability supports high-current OR-ing between redundant power supplies, and its 2.8 mΩ R_DS(on) limits drop to 140 mV at 50 A — well within most OR-ing controller thresholds. The surface-mount PG-TDSON-8 package simplifies automated assembly versus through-hole alternatives.
Recommended
Recommended Products Summary
Engineering reference data for IAUC100N04S6N028ATMA1 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | IAUC100N04S6N015ATMA1 | BSC014N04LSATMA1 | BSC018N04LSGATMA1 | IAUC60N06S5L073ATMA1 |
|---|---|---|---|---|---|
| Brand | Infineon | Infineon | Infineon | Infineon | Infineon |
| Package | PG-TDSON-8 | PG-TDSON-8 - same | PG-TDSON-8 - same | PG-TDSON-8 - same | PG-TDSON-8 - same |
| Drain-Source Voltage (V_DS) | 40 V | 40 V | 40 V | 40 V | 60 V (+50%) |
| Continuous Drain Current (I_D) | 100 A | 100 A | [DATA_NEEDED] | [DATA_NEEDED] | 60 A (-40%) |
| R_DS(on) typical | 2.8 mΩ | 1.5 mΩ (-46%) | 1.4 mΩ (-50%) | 1.8 mΩ (-36%) | 7.3 mΩ (+161%) |
| Power Dissipation (P_D) | 62 W | 62 W (same) | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] |
| Automotive Qualified | Yes | Yes | Yes | Yes | Yes |
| Operating Temperature | -55 °C to +175 °C | -55 °C to +175 °C | -55 °C to +175 °C | -55 °C to +175 °C | -55 °C to +175 °C |
Key Differentiators
- Cost-optimized 40V/100A in OptiMOS 6 family (vs IAUC100N04S6N015ATMA1)
- Lower R_DS(on) than legacy 40V MOSFETs (vs BSC097N06NSATMA1)
- Higher drain current capability than 60V-class parts (vs IAUC60N06S5L073ATMA1)
- Automotive-grade qualification with broad sourcing (vs Generic industrial MOSFETs)
Design Notes
At continuous 100 A and 2.8 mΩ R_DS(on), conduction loss reaches 28 W, requiring a copper pour of at least 200 mm² on a 2 oz copper layer to maintain junction temperature below 150 °C. The PG-TDSON-8 package provides R_thJC of approximately 2 °C/W, so thermal design must focus on the PCB copper-to-ambient path. Use thermal vias (0.3 mm diameter, 1 mm pitch) under the exposed pad for multi-layer heat extraction.
Keep the gate-drive loop area below 1 cm² to minimize parasitic inductance and prevent false turn-on from V_DS-induced Miller coupling. Place the gate-drive resistor (typically 10 Ω) as close to the gate pin as possible, and add a 10 kΩ gate-source pull-down resistor to ensure the FET stays off during MCU reset. Kelvin-source connection (pin 4 in PG-TDSON-8) should be used for high-frequency switching above 100 kHz to separate gate-drive return from power-source current path.
The PG-TDSON-8 package requires an exposed pad footprint with proper thermal via array. Recommended via pattern: 9 vias in a 3×3 grid, 0.3 mm diameter, 1.0 mm pitch, connected to internal ground/power planes. The exposed pad is internally connected to the drain terminal — ensure the PCB copper does not short to adjacent source traces. Solder paste stencil aperture should be 1:1 with the thermal pad plus additional openings for the source pins.
Avoid exceeding the maximum V_GS rating of ±20 V — even brief transients above this can degrade gate oxide. Add a 12 V Zener clamp on the gate-to-source path if the gate driver has any overshoot. Never operate the FET in linear mode (high V_DS with partial gate enhancement) for sustained periods, as the SOA curves show rapid power derating above 10 V V_DS. Verify avalanche energy (E_AS) for any unclamped inductive switching events.
To minimize ringing and EMI, add an RC snubber (typically 10 Ω + 1 nF) across the drain-source of the FET in switching applications. Use a ferrite bead in series with the gate-drive path to dampen high-frequency gate oscillations. For switching frequencies above 200 kHz, consider gate-drive slew-rate control via a gate resistor of 22-47 Ω to balance switching loss against EMI generation.
Compliance Information
AEC-Q101 automotive qualified per Infineon product page. RoHS compliant. Halogen-free status not explicitly stated in verified data — set to 'unknown'.