ISC080N10NM6ATMA1 - 100V OptiMOS 6 N-Channel MOSFET | Infineon
MPN: ISC080N10NM6ATMA1 ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $1.75 | $1.75 |
| 10 | $1.62 | $16.20 |
| 100 | $1.34 | $134.00 |
| 500 | $1.18 | $590.00 |
| 1,000 | $1.05 | $1,050.00 |
Drop-in alternatives for ISC080N10NM6ATMA1 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
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View Datasheet →ISC080N10NM6ATMA1 Maximum Ratings & Electrical Characteristics
| Manufacturer | Infineon Technologies |
| Product Family | OptiMOS™ 6 100V |
| Polarity / Channel Type | N-Channel |
| Drain-Source Voltage (VDS) Max | 100 V |
| Continuous Drain Current (ID) at Ta | 13 A |
| Continuous Drain Current (ID) at Tc | 75 A |
| Power Dissipation (PD) at Ta | 3 W |
| Power Dissipation (PD) at Tc | 100 W |
| On-Resistance RDS(on) Typ @ VGS=10V, ID=20A | 8.05 mΩ |
| Gate Threshold Voltage (VGS(th)) | 3.3 V at 36 µA |
| Package | PG-TDSON-8 FL (TDSON EP) |
| Mounting Type | Surface Mount |
| Operating Temperature Range | -55°C to +175°C (TJ max, per datasheet) |
| MSL Level | 1 (per JEDEC J-STD-020, per datasheet) |
| RoHS Status | Compliant |
| Lead-Free | Yes |
| Halogen-Free | Yes |
| Qualification | Industrial grade (per Infineon OptiMOS 6 100V family) |
ISC080N10NM6ATMA1 Pin Configuration
| Pin 1 | Source — Source (low-side connection) |
| Pin 2 | Source — Source (low-side connection) |
| Pin 3 | Source — Source (low-side connection) |
| Pin 4 | Gate — Gate drive input |
| Pin 5 | Source — Source (low-side connection) |
| Pin 6 | Source — Source (low-side connection) |
| Pin 7 | Source — Source (low-side connection) |
| Pin 8 | Source — Source (low-side connection) |
| Pin EP | Drain (Exposed Pad) — Drain connection; thermal pad for heat dissipation |
Safe Operating Area
Typical Applications
ISC080N10NM6ATMA1 is suitable for 6 applications: 48V Telecom Intermediate Bus Converter, Server and Datacom Point-of-Load Converters, Solar String Inverter and Micro-Inverter, Synchronous Rectification in SMPS, Brushless DC Motor Drive, E-Bike and Battery Management Power Stage.
48V Telecom Intermediate Bus Converter
The ISC080N10NM6ATMA1 is purpose-built for the synchronous-rectifier (SR) FET in 48 V-input telecom IBCs converting to 12 V or 5 V at 250-500 kHz. Its 100 V VDS rating comfortably exceeds the 48 V nominal plus transients (per ETSI EN 300 132-2), and the OptiMOS™ 6 thin-wafer process delivers low Qrr that suppresses body-diode reverse-recovery spikes in the SR stage. RDS(on) of 8.05 mΩ at 10 V VGS keeps conduction loss at ~6 W for a 30 A SR, leaving substantial thermal headroom. Compared to OptiMOS™ 5, switching loss drops 30-40% at the same drive conditions, enabling higher power density. Place the gate-source 10 kΩ resistor directly at the gate pad to suppress Miller-induced turn-on in the half-bridge.
Recommended
Server and Datacom Point-of-Load Converters
In 48 V-to-PoL converters for hyperscale datacom (e.g., Open Rack V3 bus-bar architectures), the ISC080N10NM6ATMA1 serves as the primary-side high-side FET in a two-stage buck or as the SR FET in a resonant LLC. The combination of 100 V VDS, low Qg, and 8.05 mΩ RDS(on) supports 600-1200 W converter stages switching at 300 kHz with peak efficiency above 97%. The TDSON-8 FL exposed-drain pad enables direct top-side cooling via thermal vias to an internal copper plane, critical for 1U rack-density designs where airflow is constrained. For 1500-3000 W designs, parallel two ISC080N10NM6ATMA1 with source-side 0.5 mΩ balancing resistors.
Recommended
Solar String Inverter and Micro-Inverter
The ISC080N10NM6ATMA1 fits the boost PFC and full-bridge stages of 1500 VDC-string solar inverters and the high-frequency link of micro-inverters. Its 100 V VDS rating covers the 60-80 VDC rectified bus typical of residential PV micro-inverters, and OptiMOS™ 6's low Qrr minimizes reverse-recovery loss in the hard-switched boost stage. The 75 A pulsed rating supports the inrush of the input capacitor bank during cold-start. Designers typically pair it with a SiC diode on the boost diode position for maximum efficiency above 50 kHz. AEC-Q100 qualification is NOT held - this part is industrial-grade and not for automotive PV inverter ECUs.
Recommended
Synchronous Rectification in SMPS
In 90-265 VAC-input offline SMPS with 12 V/24 V/48 V outputs, the ISC080N10NM6ATMA1 replaces Schottky diodes on the secondary-side synchronous-rectifier position to recover the diode forward-voltage loss. At a 5 V/30 A output, replacing two 30 V Schottky diodes with two parallel ISC080N10NM6ATMA1 typically saves 4-6 W and improves efficiency by 1.5-2.5%. The 100 V VDS rating supports 24 V-output converters with wide tolerance and transient load-dump conditions. Use a dedicated SR controller (e.g., NCP4306) for adaptive turn-off timing to avoid shoot-through and to optimize the body-diode conduction window.
Recommended
Brushless DC Motor Drive
The ISC080N10NM6ATMA1 functions as the low-side FET in 3-phase brushless DC (BLDC) motor drives for industrial pumps, fans, e-bike traction inverters up to 48 V, and small EV auxiliary drives. Its 13 A continuous TA rating supports 200-400 W motors, while the 75 A TC rating accommodates peak torque transients during acceleration. The 8.05 mΩ RDS(on) keeps conduction loss low enough that 4-layer PCB FR4 copper can dissipate the 100 W Tc rating with adequate thermal vias. Pair with a 3-phase gate driver such as the Infineon 6EDL04I06NT or BTN7971B for integrated bootstrap and protection.
Recommended
E-Bike and Battery Management Power Stage
In 36 V / 48 V e-bike controller power stages and 48 V battery-management protection FETs, the ISC080N10NM6ATMA1 provides efficient switching with its 100 V VDS rating headroom and 8.05 mΩ RDS(on). The OptiMOS™ 6 thin-wafer design minimizes conduction loss during cruise, extending range by 2-4% compared to older OptiMOS™ 3 generations. The 75 A TC rating comfortably covers the 20-30 A peak assist current of pedal-assist e-bikes. For BMS high-side protection, its low Qg enables fast disconnect in <2 µs when paired with a TI BQ76200 or similar AFE, providing short-circuit protection within a single PWM cycle.
Recommended
Recommended Products Summary
Engineering reference data for ISC080N10NM6ATMA1 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | IPD33CN10NGATMA1 | BSC060N10NS3GATMA1 | BSC117N08NS5ATMA1 | IPD034N06N3GATMA1 |
|---|---|---|---|---|---|
| Package | PG-TDSON-8 FL | PG-TDSON-8 FL - same | PG-TDSON-8 FL - same | PG-TDSON-8 FL - same | PG-TDSON-8 FL - same |
| Brand | Infineon Technologies | Infineon Technologies | Infineon Technologies | Infineon Technologies | Infineon Technologies |
| Family / Generation | OptiMOS 6 100V | OptiMOS 3 100V | OptiMOS 3 100V | OptiMOS 5 80V | OptiMOS 3 60V |
| VDS Max (V) | 100 | 100 | 100 | 80 | 60 |
| RDS(on) Typ (mΩ) at VGS=10V | 8.05 | 33 | 6 | 11.7 | 3.4 |
| Continuous ID @ TA=25°C (A) | 13 | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] | [DATA_NEEDED] |
| Power Dissipation (W) at TA=25°C | 3 | 3 (same family) | 3 (same family) | 3 (same family) | 3 (same family) |
| Switching Frequency Suitability | High (OptiMOS 6 thin wafer) | Lower (OptiMOS 3, higher Qg) | Lower (OptiMOS 3, higher Qg) | Medium (OptiMOS 5) | Lower (OptiMOS 3, higher Qg) |
Key Differentiators
- OptiMOS™ 6 thin-wafer process delivers lower Qg and Qrr vs OptiMOS™ 3 (vs IPD33CN10NGATMA1)
- Lower RDS(on) than OptiMOS™ 5 in the same footprint (vs BSC117N08NS5ATMA1)
- Higher VDS rating with comparable RDS(on) (vs IPD034N06N3GATMA1)
Design Notes
Estimated: at ID=13 A continuous on a 1 sq-inch 1 oz copper FR4 PCB, the TDSON-8 FL package dissipates approximately 1.4 W (13 A squared x 8.05 mΩ) into the exposed drain pad, requiring thermal vias (12-16 vias, 0.3 mm drill, 1 oz plating) to an internal copper plane. Without vias, junction temperature can exceed 150°C at 25°C ambient within minutes. For continuous operation above 20 A, place at least 1 sq-inch of top-side copper and 2 oz inner-plane copper under the exposed pad. Forced airflow of 1-2 m/s reduces RthJA by ~30%.
Keep the high-side and low-side FETs of a half-bridge within 5 mm of each other to minimize power-loop inductance. Place the gate-loop return (gate-drive IC ground to FET source) within 3 mm using a kelvin-source connection where possible. Use a 10-100 kΩ gate-source resistor to prevent Miller-induced turn-on during fast dv/dt transitions on the phase node. Per Infineon AN_201702_PL11_008, source-bond inductance above 1 nH can cause VGS spikes of 5-8 V at turn-off in 100 V designs.
Do not exceed VGS of +/-20 V (absolute maximum per OptiMOS 6 datasheet); a 12 V gate drive with a 10 kΩ gate resistor is the safe operating range. Do not parallel two ISC080N10NM6ATMA1 without source-balancing inductors or resistors of 0.5-1 mΩ, as RDS(on) positive temperature coefficient alone is insufficient to balance current at high di/dt. Finally, do not use ISC080N10NM6ATMA1 in circuits that exceed 100 VDS even transiently; avalanche breakdown can occur within nanoseconds and permanently damage the device.
Compliance Information
RoHS compliant per LCSC listing C3288845 and DigiKey product page. Not AEC-Q100 qualified - industrial grade only per Infineon OptiMOS 6 100V family datasheet. Halogen-free per Infineon product family specification.
